Signal and System34 (1)

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CHAPTER NO:10

BASIC I/O INTERFACE

BY Engr. Rehan AliShah


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The i/o address is stored in register DX as a 16-bitI/O address or in the byte (p8) immediatelyfollowing the opcode as an 8-bit address .

Intel call p(8) afixed address

it is stored in theROM and the 16-bit I/O Address called a variable

address.

Whenever data are transferred by using IN or OUT

instruction , often called PORT Number or port. in many dedicated task systems, only the right

most 8-bit of the address are decoded, to reducethe amount of cktry required for decoding.


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ISOLATED & MEMORY-MAPPED I/O

There are two different methods of interfacing I/O tothe microprocessor . Isolated and memory mappedi/o.

The most common I/O transfer technique used inIntel MPs based system is isolated I/O.

The term describe how the i/o locations areisolated from the memory system in the separateI/O address.

Fig 10.1 shows the both isolated and memorymapped address space for any Intel 80x86 to p4.


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The address for the isolated i/o device calledthe ports are separate from the memory.

A disadvantage of Isolated I/O is that thedata transferred b/w I/O and the Mps mustbe access by IN and OUT Instruction.

Separate control signal for I/O space are

developed (using M/IO and W/R).thesesignal indicate that an I/o port address.


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Memory mapped I/O does not use the IN andOUT Instruction. Instead it use any instructionthat transfers data b/w the Mps and memory.

The main advantage of memory mapped is thatany memory transfer instruction can be used toaccess the I/o device. Disadvantage is that a

portion of a memory system used as the I/omap.

Another advantage is that the IORC and IOWCsignal hv no function in memory mapped i/o.


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PERSONAL COMPUTER I/O MAP

The PC uses part of the I/O map fordedicated function.fig 10.2 shows the I/o mapfor the PC.

Note that i/o space b/w 0000H-03FFH arenormally reserved for the computer systemand ISA bus.

The i/o ports located at 0400H-FFFH aregenerally available for user application, mainboard function.


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BASIC INPUT & OUT PUT INTERFACE

The basic input device is set of Three statebuffer.

The basic out put device is set of datalatches.

The term IN refer to moving data from I/O toMPs where OUT refer data moving Mps to

I/O devices.


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BASIC INPUT INTERFACE

Three state buffer are used to construct 8-bitinput port depicted in fig 10.3 , the externalTTL data (simple toggle switch) are

connected to inputs of the buffer. Out putconnect to data bus.

The 8088 has data bus connection D0-D7.

The 80486 has D31-D0.

Pentium-Pentium 4 have D63-D0.


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Fig 10.3, allows the MP s to read the contentof 8 switches that connect to any 8-bitsection of data bus.

When the select signal SEL become a logic 0on SEL , the IN instruction execute.

When the MPs execute the IN instruction,

the I/O port is decoded to generate the logic0 on SEL.


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A 0 is placed on the output control inputs(1G& 2G) of the 47ALS244 buffer ,that causesthe data input connection (A) to output (Y).

If a logic 1 is placed out put control input ofthe 47ALS244 buffer, the device enter threestate high Impedance mode.

The basic input ckt is not optional and mustappear any time that input data areinterfaced to MPs.


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Latches are needed to hold the data becausewhen the Mps Execute an OUT instruction ,the data are only present on the data bus for

less than 1.0 s. without Latch.When out instruction execute , the data from

Al or Ax are transferred to latch via the data

bus.D inputs of 74ALS374 octal latch are

connected to the data bus to capture the output data, and Q outputs of Latch are

attached to LEDs.


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When Q output become logic 0 , the LEDlight. Each time that the OUT instructionexecutes. And the SEL signal to Latch

activates.

The data are held until the next Outinstruction executes , whenever the outputs

instruction is executed in ths ckt , the datafrom the Al register appear on the LEDs.


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PROGRAMMABLE PERIPHERAL INTERFACE 82C55


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The 82c55 is simple device to interface to themicroprocessor and program.

For read/ write operation, CS =0 and I/oaddress must be applied to A1-A0 .

Remaining ports are dont care terms asconcerns to 82c55.

Fig 10.18 shows the 82c55 connected to the80386sx.


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Function at 8-bit I/O ports addresses C0H (p-A) ,C2H (p-B) , C3H(p-C) , and C6Hcommand register.

This interface use the low bank of 80386sx ofI/O map.

82c55 direct connected to 80386sx except

for cs , the cs pin connected to 74ls138decoder.


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The reset input to the 82c55 initialize thedevice whenever the MPs is reset.

Notice that an 82c55 in interfaced to the

personal computer at port address 60H-63Hfor keyboard control , for speaker ,timer andother internal device.


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PROGRAMMING THE 82C55

The 82c55 is program through two internalregister that are showing in the fig 10.19 .

The bit 7th position select the command A or B.

Command byte A & B

1- the command byte A , it is program the functionof G-A and B.

2- Command byte B, set (1) or reset (0) bits ofport C ; only if the 82c55 is programmed in mode1 or 2.


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Group B pins (port B and lower port of portC) are programmed as either input or outputpins.

Group B operate in either mode 0 or mode1.

Mode 0:

- mode 0 is basic input /output mode thatallows the pins of group B to beprogrammed.

- mode 1 o eration is stored o eration for


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Group A pins (port A and upper port of C)are programmed as either input or outputpins.

The difference is between G-A & G-B.?

- G-A can operate in modes 0,1 and 2, mode2 is bidirectional mode of operation for port

A.


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If a 0 is placed in bit position 7 of thecommand byte , the command byte B isselected .

This command allows any bit to be set orreset of port C. if the 82c55 is operated ineither mode 1 or 2.

If the mode is not selected, this commandbyte is not used for programming.


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MODE 0 OPERATION

Mode 0 operation causes the 82c55 tofunction either.

- As a buffer input device or as a Latch

output device.

The fig 10.20 shows the 82c55 connected toa set of eight 7 segment LED displays.

In ths ckt both port A & B are programmed as(mode 0) simple latch output ports.


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Port A provide segment data inputs todisplay.

Port B provide a means of selecting one

display position at a time for multiplexing adisplay.

The 82c55 is interfaced to an 8088 MPs

through a PAL16L8 so that it function at i/oport number 0700H-07o3H.


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Signal and System34 (1)

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