Silicon on Insulator optical modulators for integration in Photonic Optical

Circuits

G. T. Reed, D. J. Thomson, F. Y. Gardes, G. Z. Mashanovich, Y. Hu. Optoelectronics Research Centre, University of Southampton, Southampton, Hampshire, SO17 1BJ, UK

L. Ke, P. W. Wilson. School of Electronics and Computer Sciences, University of Southampton, Southampton, Hampshire, SO17 1BJ, UK

L. Zimmermann, D. Knoll, S. Lischke. IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

H. Porte. PHOTLINE Technologies, ZI Les Tilleroyes – Trépillot, 16 rue Auguste Jouchoux, 25000 Besançon - France

B. Goll, H. Zimmermann. Vienna University of Technology, EMCE, Gußhausstr. 25/354, A-1040 Vienna, Austria

S-W. Chen, S. H. Hsu, Electrical Engineering, National Tsing Hua University Sec. 2, Kuang-Fu Rd., Hsinchu, Taiwan

J-M. Fedeli, CEA, LETI, Minatec Campus, 17 Rue des Martyrs, 38054 GRENOBLE FRANCE

K. Debnath, L. O’Faolain. School of Physics and Astronomy, University of St Andrews, Fife, Scotland, KY16 9SS

T. F. Krauss. Department of Physics, University of York, Yorkshire, YO10 5DD, UK

M. Aamer, A. Brimont, P. Sanchis. Nanophotonics Technology Center, Universitat Politècnica de València, Camino de Vera s/n, 46022 Valencia, Spain

A. Hakansson DAS Photonics, Universitat Politecnica Valencia, Camino de Vera s/n, 46022, Valencia, Spain

ABSTRACT

This paper summarises our work on modulators for integration, either as a front end approach, or a co-location of custom

electronic drivers, approaches that have yielded data rates up to 50Gb/s from a range of device variants. As well as more

conventional depletion based devices, we also report photonic crystal cavity based modulators for very low power

consumption, as well as other device variants aimed at improving device performance metrics.

Invited Paper

Optical Interconnects XIV, edited by Henning Schröder, Ray T. Chen, Alexei L. Glebov,Proc. of SPIE Vol. 8991, 89910K · © 2014 SPIE · CCC code: 0277-786X/14/$18

doi: 10.1117/12.2042911

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INTRODUCTION

The performance of optical modulators fabricated in silicon has improved dramatically in recent years, coinciding with significant research effort worldwide. This has been motivated by the general advantages of silicon photonics in the low cost production of photonics integrated circuits (PIC) with CMOS compatibility as well as the fact that the optical modulator is a key element in PICs for datacom and telecom applications. Silicon lacks a strong electro-optic effect as used in traditional photonic materials for modulation and therefore other techniques have been investigated. The most successful routes to modulation in silicon have been the hybridisation of other materials with the silicon waveguide or the use of the plasma dispersion effect which relates changes in free carrier densities with changes in refractive index and absorption [1]. Within the UK silicon photonics (UKSP) and HELIOS projects in Europe we have been working on different designs of plasma dispersion based silicon optical modulator as well as different routes for integration of the modulator with other photonic elements and electronics.

In this paper we overview two variants of conventional carrier depletion based phase modulators in two different silicon-on-insulator (SOI) overlayer thicknesses. The first which is based in 220nm silicon overlayer thickness has been incorporated into both Mach-Zehnder Interferometer (MZI) and ring resonator (RR) structures. In the MZI intensity modulator up to 50Gbit/s has been demonstrated whilst operation up to 40Gbit/s has been measured from the RR. DPSK modulation up to 20Gbit/s has also been shown. The second phase modulator variant is based in a 400nm overlayer thickness SOI and has been designed to achieve polarisation independent operation. Operation at 10Gbit/s and 40Gbit/s with the same extinction ratio for both polarisations has been demonstrated. A novel wavelength division multiplexing (WDM) photonic crystal based cavity modulator is also demonstrated with operation below 1fJ/bit. Finally integration with electronics following both front-end, co-fabrication and back-end wire-bond approaches is demonstrated.

CONVENTIONAL PHASE MODULATORS

Within both projects the phase modulator designs have been based around the concept of self-aligned fabrication [2] to simplify fabrication and provide the potential for a reliable performance, high yield and low cost production. The self-aligned process works by using the same silicon dioxide layer as the hard mask through which to etch the optical rib waveguides to also guide the n-type implant. The first design, shown in figure 1, is based in SOI with a 220nm thick overlayer. The rib section of the waveguide (220nm x 400nm) and slab (100nm thick) to one side is doped p type (3e17.cm-3) and the slab to the other side doped n type (1.5e18.cm-3).

Fig. 1. Cross sectional diagram of the 220nm carrier depletion phase modulator.

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The second variant of phase modulator is shown in figure 4. This version is based in 400nm thick overlayer SOI. The waveguides fabricated can support the propagation of both fundamental TE and TM modes. Depletion is achieved at a pn junction that is wrapped around the top and two sides of the waveguide as shown in figure 4.

Fig. 4. Cross sectional diagram of the 400nm carrier depletion phase modulator.

The purpose of this design is to achieve polarisation independent modulation. This can be obtained by tailoring the position of the doped regions and the density of active dopants within them to match the modulation efficiency for the TE and TM polarisation modes. The p and n type regions are both doped to a level of ~1e18.cm-3. Operation at 10Gbit/s and 40Gbit/s with the same extinction ratio (6.5dB) for both TE and TM polarisations is demonstrated [7]. The eye diagrams obtained at 40Gbit/s are shown in figure 5.

Fig. 5. Optical eye diagrams obtained at 40Gbit/s for TE polarisation (left) and TM polarisation (right).

PHOTONIC CRYSTAL CAVITY MODULATOR

For ultra-low power applications we have demonstrated a series of photonic crystal cavity based modulators integrated with a single low refractive index waveguide. The basic layout is shown in Figure 6a. Light is coupled from a lensed fiber into the silicon nitride dielectric waveguide which is 500nm high and 1.5μm wide. This bus waveguide is positioned above the photonic crystal cavities. Figure 6b shows the cross section of the device where the cavity is embedded into a pin diode. Under forward bias, free carriers are injected into the intrinsic region providing a refractive

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change which is sufficient for intensity modulation. With a suitably designed PhC cavity, a low effective index mode may be matched to that of a silicon based resonator. The extinction ratio can be controlled by optimizing the physical gap between the waveguide and the cavity and by fine-tuning the propagation constant of the waveguide with respect to the k-space distribution of the cavity. Figure 6c shows the Fourier space distribution of the resonant mode of the PhC cavity used in this experiment. The white circle represents the light cone and the yellow ellipse represents the position of the Fourier components of the silicon nitride waveguide at the resonance wavelength of the PhC cavity. The coupling between the waveguide mode and PhC cavity mode can then be controlled by optimizing the overlap between the two Fourier spaces. To date moderate data rates have been demonstrated (1Gbit/s) but the modulation speed can be improved via the implementation of carrier depletion structures. The AC component of the power consumption was calculated as ~0.6fJ/bit at 1Gbit/s [8].

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Fig. 6. (a) Schematic of the photonic crystal modulator (b) Cross section of the Photonic Crystal Modulator (c) Fourier Space

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DEVICE INTEGRATION

We have carried out integration of modulators with electronics, both as back-end and front-end processes. Within the HELIOS project partners have collaborated to provide the first demonstration of frontend integration of a silicon photonics modulator with a BiCMOS driver [9]. The phase modulators used in this case are same as those described in figure 1. Phase modulators of 2mm length are inserted into both arms of a symmetrical MZI configured as shown in figure 7. DC Tuning sections (2.55mm) are included in both arms to allow the operating point to be electronically adjusted. The DC tuning element consists of a similar PN junction as used for the high speed phase modulator however a larger separation exists between the n+ and p+ regions and the waveguide edge to reduce optical losses.

The dual drive electronic driver is designed in IHP SG25H3 technology. Photonic SOI is not suitable for integration with high-performance bipolar transistors for two reasons: incompatibility with collector fabrication and the higher thermal resistance compared to bulk Silicon substrates normally used for high-performance BiCMOS processes. Therefore a process combining local-SOI areas with bulk-Si areas has been developed [10]. The starting substrate was photonic SOI,

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which is etched down to beyond the buried oxide, and then locally regrown by Si-epitaxy, finishing with chemical-mechanical polishing (CMP) to obtain surfaces at the same height for local-SOI and for bulk Silicon. After local-SOI fabrication the BiCMOS process follows a modified standard flow. Using this method it was possible to integrate photonics and electronics into the same substrate. Experimental results shown in figure 8 demonstrate optical modulation up to 10Gbit/s as targeted.

Fig. 7. MZI configuration used for the frontend BiCMOS integration.

Fig. 8. Optical eye diagram at 10Git/s obtained from the frontend integrated MZI modulator and BiCMOS driver.

Within the UKSP project a carrier depletion MZI based silicon optical modulator has been integrated with CMOS driving electronics using a wire bonding approach. An optical microscope image of the driver circuit wire bonded to the modulator is shown in Figure 9 together with an optical eye diagram obtained at 10Gbit/s. The MZI used is asymmetric and has 3.5mm phase modulators in either arm. The dual drive CMOS driver was fabricated using the IBM-8RF 130nm process [11]. Operation at 10Gbit/s as targeted by the design of the driver has been demonstrated.

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Fig. 9. Optical microscope image of the MZI modulator wire bonded to the CMOS driver (left) and optical eye diagram at 10Git/s

obtained (right).

Fig. 10. Optical microscope image of the optical detector wire bonded to the TIA (left) and optical eye diagram at 12.5Git/s obtained

(right).

Also within the UKSP project, a full single channel link with transmitter and receiver integrated electronics is demonstrated. The trans-impedance amplifier (TIA) was again fabricated using the IBM-8RF 130nm process. An optical microscope image of the TIA wire bonded to the optical detector is shown in figure 10 together with an electrical eye diagram obtained at 12.5Gbit/s.

SUMMARY

In this paper we have described the development of three different designs of optical modulators, together with details of their integration with electronics, and in one example, integration into an optical link. Modulation speeds up to 50Gb/s have been demonstrated using simple on-off keying or DPSK.

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ACKNOWLEDGEMENTS

This authors gratefully acknowledge funding from the EPSRC in the UK under the UK Silicon Photonics project, and financial support from FP7-224312 HELIOS project.

REFERENCES

[1] – G. T. Reed, G. Z. Mashanovich, F. Y. Gardes, M. Nedeljkovic, Y. Hu, D. J. Thomson, K. Li, P. R. Wilson, S-W. Chen and S. S. Hsu, “Recent breakthroughs in carrier depletion based silicon optical modulators,” Accepted for publication in Nanophotonics, 2013.

[2] – D. J. Thomson, F. Y. Gardes, S. Liu, H. Porte, L. Zimmermann, J-M Fedeli, Y. Hu, M. Nedeljkovic, X. Yang, P. Petropoulos, and G. Z. Mashanovich, “High performance Mach Zehnder based silicon optical modulators,” IEEE Journal of Selected Topics in Quantum Electronics, 2013.

[3] – D. J. Thomson, F. Y. Gardes, Y. Hu, G. Mashanovich, M. Fournier, P. Grosse, J-M. Fedeli and G. T. Reed, “High contrast 40Gbit/s optical modulation in silicon,” Optics Express, 19(12), pp. 11507 – 11516, 2011.

[4] – D. J. Thomson, F. Y. Gardes, J-M. Fedeli, S. Zlatanovic, Y. Hu, B. P. P. Kuo, E. Myslivets, N. Alic, S. Radic, G. Z. Mashanovich, and G. T. Reed, “50-Gb/s silicon optical modulator,” IEEE Photonics Technology Letters 24(4), pp. 234-236, 2012.

[5] - D. J. Thomson, F. Y. Gardes, D. C. Cox, J-M. Fedeli, G. Z. Mashanovich, and G. T. Reed, “Self-aligned silicon ring resonator optical modulator with focused ion beam error correction,” Journal of Optical Society of America B, vol. 30(2), pp. 445-449, 2013.

[6] – M. Aamer, D. J. Thomson, A. M. Gutierrez, A. Brimont, F. Y. Gardes, G. T. Reed, Jean-Marc Fedeli, A. Hakansson, and P. Sanchis, “10Gbit/s error-free DPSK link using a push-pull dual-drive silicon modulator,” Optics Communications, vol. 304, pp. 107-110, 2013.

[7] - F. Y. Gardes, D. J. Thomson, N. G. Emerson, and G. T. Reed, “40 Gb/s silicon photonics modulator for TE and TM polarisations,” Optics Express, 19(12), pp. 11804-11814, 2011.

[8] – K. Debnath, L. O’Faolain, F. Gardes, A. Steffan, G. Reed, and T. Krauss, "Cascaded modulator architecture for WDM applications," Optics Express, 20, pp. 27420-27428, 2012.

[9] – D. J. Thomson, H. Porte, B. Goll, D. Knoll, S. Lischke, F. Y. Gardes, Y. Hu, G. T. Reed, H. Zimmermann, L. Zimmermann, “Silicon carrier depletion modulator with 10Gbit/s driver realized in high-performance photonic BiCMOS,” Laser & Photonics Reviews, DOI: 10.1002/lpor.201300116, 2013.

[10] – D. Knoll, H. H. Richter, B. Heinemann, S. Lischke, Y. Yamamoto, L. Zimmermann and B. Tillack, “Substrate design and thermal budget tuning for integration of photonics components in a high performance SiGe:C BiCMOS process,” ECS Transactions, 50, 297, (2012).

[11] – K. Li and P. Wilson, “An improved push-pull driver using 0.13μm CMOS” In: 2013 IEEE International Symposium on Circuits and Systems, ISCAS, (2013).

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