Silicon Substrates

8/20/2019 Silicon Substrates

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Semiconductor Substrates


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Semiconductor Substrates

Question: Why do we care about the semiconductor substrate

crystal structure, defects and impurities?Answer: Because the electronic device properties strongly depend on the

properties of the semiconductor wafers themselves.

Example: Different material substrates have different carrier mobilities, which

determine how fast your device can operate. For instance, at room temperature,

under low impurity doping concentrations,

Material Electron Mobility (cm2/(Vs)) Hole Mobility (cm2/(Vs))

GaAs 8000 320

GP 110 70

InP 5600 150

Si 1360 460

Ge 3900 1900

α-SiC 400 50


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Bulk Silicon: Electron and Hole Mobility

as a Function of Impurity Concentration

Note: This chart is for

room temperature T=300K


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Chapter-1 topics to be covered

Chapter Crystal structures and defectsTopics : Phase diagrams and solid solubility

Techniques used to fabricate semiconductor wafers

Materials used in microelectronics can be divided into 3 classifications

depending on their atomic order:

a) Crystal materials: These have a well defined lattice sites (ex: Wafer Substrates)

Note: The smallest building block of a crystal is a UNIT CELL, consisting of atoms, ions,

or molecules, whose geometric arrangement defines a crystal's characteristic

symmetry and whose repetition in space produces a crystal lattice.

b) Amorphous materials: These have no defined lattice sites (ex: Oxides)

c) Polycrystalline materials: Short ranging lattice sites (ex: Common Metals)


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Crystallography and crystal structure

Question: What is a crystal?

Answer: A crystal is an array of unit cells repeated in 3-dimensions.

Examples of common unit cells are:

Simple Cubic Body Centered Cubic Face Centered Cubic

A rock containing three crystals of pyrite (FeS2). The crystal structure of pyrite is primitive cubic, and this isreflected in the cubic symmetry of itsnatural crystal facets.


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Crystal structure (Unit Cell)

Question: Show that the maximum faction of the unit cell which can be filled

by hard sphere in the simple cubic and a face centered cubic lattices are 0.52

and 0.74 respectively?

Answer:


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Common Crystal Orientations

(100) has same properties as (010) and (001)The only difference is an arbitrary choice of coordinate system{100} refers to all three.

Miller Indices Planes


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14 electrons occupying the first 3 energy levels:

• 1s, 2s, 2p orbitals filled by 10 electrons

• 3s, 3p orbitals filled by 4 electron

To minimize the overall energy, the 3s and 3p

orbitals hybridize to form 4 tetrahedral 3sp orbitals.

Each has one electron and is capable of forming a

bond with a neighboring atom and they must obey

the Pauli exclusion principal.

Silicon Atom

Pauli Exclusion Principle: No

two electrons in an atom can

have identical 4 quantum

numbers n, l, m, s.


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Silicon and Germanium are Group IV

Semiconductors

• They have four valence electrons and need four more to complete their

valence shell.

• In a crystal this is done by forming covalent bonds with four nearest

neighbor atoms.

• Unfortunately, none of the basic cubic structures would therefore be

appropriate.


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Silicon and Germanium are Group IV

Semiconductors

WHY?

• Simple Cubic Crystal has six nearest neighbors

• Body Centered Cubic Crystal has eight nearest neighbors

• Face Centered Cubic Crystal has twelve nearest neighbors

But we need four nearest neighbors

This is called diamond structures


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Si, Ge and GaAs form the

diamond structure

a

This atom is at(a/4, a/4, a/4)and it’s four nearest neighbors(0, 0, a); (a/2, a/2, a);(0, a/2, a/2); (a/2, 0, a/2)

This crystal structure can also be thought of as two interlocking Face Centered CubicFCC lattices.GaAs also forms the same arrangement; however, when two elements are present, thecrystal has a reduced level of symmetry called Zincblend.

a/2


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So now we have an idea of what is: • Crystal structures (simple cube, body centered cube, face centered cube)

• Unit cells

• Crystallographic notation (Miller indices and Miller planes)• Diamond structure (Si, Ge and GaAs)

Continuing we need to know the following:

• Semiconductor crystal energy bands and defectsTopics:

– Discuss formation of a energy bands

– Surface energy concept

– Effect of defects on the surface energy

– Formation of energy levels in bandgap – Types of defects

– Gettering

– Effect of defects on device properties


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Pauli exclusion principal

Pauli Exclusion Principle: In 1925, Wolfgang Pauli gave physics his exclusion principle

as a way to explain the arrangement of electrons in an atom. No two electrons in anatom can have identical 4 quantum numbers n, l, m, s.

Silicon Atom

14 electrons occupying the first 3 energy levels:

• 1s, 2s, 2p orbitals filled by 10 electrons

• 3s, 3p orbitals filled by 4 electron

To minimize the overall energy, the 3s and 3p

orbitals hybridize to form 4 tetrahedral 3sp orbitals.

Each has one electron and is capable of forming a

bond with a neighboring atom and they must obey

the Pauli exclusion principal.


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Formation of energy band


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Isolated Atoms

Atoms in a solidWhen we bring atoms closer together to form a

solid, their wave functions begin to overlap, and

the electrons no longer can occupy the same

quantum states so the energy levels begin to

split, and eventually bands are formed.

Electrons in isolated atoms (which are far apart)

can occupy the same quantum states (can haveidentical 4 quantum numbers n, l, m, s)


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• A typical crystalline periodic potential, plotted along a line of ions.

• To simplify the calculations we assume thewells are rectangular.

• From the solution of the Schrödingerequation we get the band structure of thecrystalline solid, energy-momentum (E-k)

relationship. (V(x) is a periodic potential)

•

+

2

ℏ − Ψ = 0

Note: the solutions of the Schrodinger

equation tell us what states are available to asingle electron; we still need to know whichof these states are occupied. Electrons obeythe Pauli exclusion principal which excludesany 2 electrons of having the same set ofquantum numbers.

SIMPLE ONE DIMENSIONAL ENERGY BAND MODEL:


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Semiconductor Crystal

“ diamond cubic” lattice

• Each Si atom has 4nearest neighbors

• lattice constant = 5.431Å

Number of atoms in a unit cell:

• 4 atoms completely inside cell

• Each of the 8 atoms on corners are shared among cells

count as 1 atom inside cell

• Each of the 6 atoms on the faces are shared among 2

cells count as 3 atoms inside cell⇒ Total number inside the cell = 4 + 1 + 3 = 8

Cell volume:(.543 nm)3 = 1.6 x 10-22 cm3

Number of sil icon atoms per cm3

= (8 atoms) / (cell volume) = 5 x 1022 atoms/cm3

Remember according to the Pauli exclusion

principal:

No two electrons in an atom can have identical 4

quantum numbers.

Question: What is the number of silicon atoms per cm3 ?


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Formation of a Si energy band structure

In order not to violate the Pauli exclusion principal, the outer most levels have

to split and instead of orbits, energy band structures are formed in a crystal.

Perfect crystal Si structure without defects


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ENERGY BAND FORMATION: Ge Si GaAs

Atomic levels

a = infinitya = equilibrium

Lattice spacing

Allowed

bands

Interatomic

spacing a

E

CB

k – k

Direct Bandgap

(a) GaAs

E

CB

VB

Indirect Bandgap, E g

k – k

k cb

(b) Si

E

k – k

Phonon

(c) Si with a recombination center

E g

E c

E v

E c

E v

k vb VB

CB

E r

E c

E v

Photon

VB

(a) In GaAs the minimum of the CB is directly above the maximum of the VB. GaAs istherefore a direct bandgap semiconductor. (b) In Si, the minimum of the CB is displaced from

the maximum of the VB and Si is an indirect bandgap semiconductor. (c) Recombination of an electron and a hole in Si involves a recombination center .


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(a) Energy band diagram.

(b) Density of states (No. of

states per unit energy per

unit vol.)

(c) Fermi-Dirac probability

function (probability ofoccupancy of a state.)

(d) The product of g(E) and f(E)

is the energy density of

electrons in conduction band

(No. of electrons per unit

energy per unit vol.) The

area under nE(E) vs. E is the

electron concentration.

Note: pn=ni2 for all three cases.

(a) (b) (c) (d)

g(E) f(E) n AND p


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Concept of surface energy

• Consider the atoms in the bulk and surface region of a crystal.

• Surface: Atoms possess higher energy since they are less tightly bound.

• Bulk: Atoms possess lower energy since they are more tightly bound.

• The sum of all the excess energies of the surface atoms is the surface energy.

• Surface energy is of the essence of “energy”, and can be defined interms of Gibbs free energy:

γ ≡ (Energy required per surface atom)*(number of surface atoms/surface area)


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Crystallographic Planes in Si

Examples:

For FCC crystal:

γ (110) > γ (100) > γ

(111)

For BCC crystal:

γ (111) > γ (100) > γ (110)

Note: Any defect in thecrystal structure will

affect it’s surface energy.


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Formation of defect energy levels within the

Si bandgap

Impurities and defects

can create deep level

recombination centers

within the bandgap

Ed-states


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Beneficial Defects

• To control the conductivity of semiconductors, substitution impurities are

necessary to create free carriers.

Ef is a function of the impurity-doping level


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Semiconductor Crystal Defects

Any DEFECT in a crystal has associated with it a surface energy(The higher the surface area of the defect, higher the energy stored in the defect)

Crystal defects can be divided in 4 groups depending on their dimensionality:

Type Dimension Examples

Point 0 Vacancy, Interstitial, Frenkel defects

(Intrinsic - self-interstitial)

(Extrinsic - dopants, oxygen, carbon, metals)

Line 1 Straight dislocations (edge or screw)

Dislocation loops

Area 2 Stacking faults, Grain Boundaries

Volume 3 Precipitates, voids

(Oxygen precipitates, metal precipitates)


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Understanding Crystal Defects

NOTE: (i) In some cases, the interstitialcomes from a nearby vacancy. Such avacancy interstitial combination iscalled Frenkel defect. (A-B)(ii) Interstitial or vacancy can movethrough a crystal, under hightemperature, as for example during processing conditions. Also these canmigrate to the wafer surface where it isannihilated.

f


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Point Defects

Beneficial Defects:Point defects are extremely important to the understanding of doping and diffusion.For some semiconductors, point defects act like dopants, creating free carriers.


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N v

0 = N 0 exp− E

act

kT

N v

0 is number of neutral vacancies

E act

activation energy associated with the

formation of a vacancy (~2.6 eV for Si)

N 0 is concentration of Si atoms (5.02 x 1022 cm-3)

k is Boltzmann’s constant (8.617 x 10-5 eV/K)

Point Defects

Vacancies and self-interstitials are intrinsic defects

Example: For silicon,

At 300 K, 1 out of 1044 lattice site would be

vacant in an otherwise perfect crystal.

At 1273 K (1000 C), increases to 1 out of 1010.

An identical equation can be used to describe the equilibrium concentration of interstitials

silicon however the activation energy for interstitial is ~4.5eV

To calculate the concentration of neutralvacancies, E2.1, p.17


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Point Defects Cont.’

Li D f


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Line Defects

– One example is an edge dislocation. An extra line of atoms is inserted between two other lines

of atoms. An extra plane is terminated on one end by the edge of the crystal.

If the extra plane is completely contained in the crystal, the defect is referred as a dislocation loop.

(Sign of stress) The bonds just before the insertion of the extra plane are stretched, and the bonds

just after the plane are compressed.

DISLOCATION AND SLIP MOVEMENT (if during

rapid thermal processing there is sub stantial

temperature difference across wafer, the wafer

will attempt to expand nonuniformly, and

thermoplastic stress will occur in the wafer.)

The units of stress: Pascal 1 Pa = 1 kg · m-1 · s-2


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Area Defects

– A polycrystalline grain boundary is an example of a 2-D defect.

Reference: Investigation of Electrical Activity of Dislocation and Grain Boundary in

Polycrystalline Float Zone Silicon J. Lu et al. NREL/CP-520-33577

Nomarski images of grain boundaries and intra-grain dislocations in high purity

polycristalline float-zone silicon. (a) in a small grain region, (b) within a large grain,(c) a dislocation-free grain.

Note: Differential interference contrast microscopy (DIC), also known as Normarski Interference Contrast (NIC) or Nomarski microscopy, is

an optical microscopy illumination technique used to enhance the contrast in unstained, transparent samples.

(a) (b) (c)


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Area Defects Cont.’ A stacking fault is an 2-D defect. Similar to the dislocation line, a stacking fault is an

extra plane of atoms. In this case, the pattern is disrupted in two dimensions and is

regular in the third. Stacking faults are terminated either by the edge of the crystal orby dislocation lines.

ExtrinsicStackingFault

IntrinsicStackingFault

High resolution TEM image of a α-B layer formed after 10 min of

B2H6 exposure at 700C.

Reference: “The influence of stacking faults on the leakage

current of B-layer p+n diodes” N. Golshani et al. Delft Institute of

Microsystems and Nanoelectronics (DIMES), Delft University of

Technology, Feldmannweg 17, 2628 CT Delft, The Netherlands


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Bulk Defects

Bulk defects are irregular in all three dimensions.

Examples of bulkdefects

(Precipitates)

Examples of bulk

defects (Voids)


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Gettering

The technique used to remove degrading impurities (point defects) from active

device region is called gettering. The impurities and defects diffuse through thecrystal, becoming trapped at the gettering site.

There are two types of gettering: i) extrinsic and ii) intrinsic.

i) Extrinsic gettering: Involves the use of external means to create damage or

stress in the crystal lattice that leads to creation within the bulk of extended

defects or chemically reactive sites at which mobile impurities are captured.

Examples:

a. Mechanical damage by abrasion, grooving, sandblasting or laser induced damage

are used to create stress field on the back side of the wafer. Dislocations are

generated to relieve these stresses and they serve as gettering sites.

b. Phosphorous diffusion is used to produce P-vacancy complex and dislocations

which become capture sites for metal impurity atoms.


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Gettering cont.’

ii) Intrinsic gettering: Involves the localization of impurities at extended

defects which exist within the bulk material or the wafer. The advantage ofthis method over the extrinsic gettering are as follows:

a. The technique may be employed without any external treatment of the

wafer other than heating to high temperature.

b. The volume of the wafer provides the sink during intrinsic gettering is two

orders of magnitude larger than the extrinsic method required on the wafer

back side.

c. The gettering region is much closer to the active region thus the distance

required for impurities to travel to the sink is 25-50 times shorter than the

backside of the wafer

Intrinsic gettering however requires the strict control of a number of oxygen

related processes.


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Influence of crystal defects on device

properties cont.’

Detrimental Defects:

– Lattice dislocations and stacking faults that cross p-n junctions, can degradethe reverse bias I-V characteristics of the p-n junctions by the formation ofgeneration-recombination centers and lead to excess leakages.

– Presence of transition metal precipitates in a p-n junction produces leakagesdue to mid-gap energy levels at low voltages.

(Lead to excess leakage currents in p-n junctions)

– Dislocations, stacking faults, or precipitates

– Some impurities that tend to occupy interstitial sites have electronic statesnear the center of bandgap. As a result, they are efficient sites for therecombination of electrons and holes. This for example reduces thequantum efficiency of solar cells.

(Lead to excess collector-emitter leakage currents in bipolar transistors)

I fl f t l d f t d i


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Influence of crystal defects on device

properties cont.’

– Point defects, point-defect clusters, dislocations and crystal strain, reduce

carrier lifetimes create recombination centers.Note: Minority carrier lifetime is defined as the mean time spent by excess carries before

they recombine to re-establish the thermal equilibrium concentration. In general, long

minority carrier lifetime are beneficial to device operation.

(Decrease the minority carrier lifetimes)

– Stacking faults generated by metallic contamination during oxidation lead

to i) oxide gate leakage; ii) oxide breakdown voltage.

(Degrade gate-oxide quality)

– Oxygen precipitates can significantly alter the carrier concentrations in lowresistivity substrates. See limitations of Czochralski growth process. It has

been calculated that for MOS process the threshold voltage can very by

10%.

(Degrade the threshold voltage uniformity in MOS devices)


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AREA DEFECTS

POINT DEFECTS

LINE DEFECTS

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