SiP ModulesApplicationDrivenIntegration

EelcoBergmanASEGroupNovember14,2016SanJose,CA

©ASEGroup.Allrightsreserved.

ASEGroupataGlance

2

Established 1984, production commenced at flagship factory in Kaohsiung, Taiwan.

IC Assembly, Test & Materials (ATM) achieved global market leadership in 2004, surpassing all players in OSAT industry.

Completed acquisition of Universal Scientific Industrial Co. (USI) to expand DMS module & system manufacturing capability.

Operations now at 18 facilities worldwide, serving multiple markets, applications, & geographies.

>60K employees: Global team comprises operations, engineering, R&D, sales & marketing.

ASE Group overall revenue of $8.95B in 2015, 5% over 2014

©ASEGroup.Allrightsreserved.

ASE’sRoleintheManufacturingValueChain

3

IC Design EMS/ODM

• SiliconSourcing

• WaferFabrication

• WaferTest

• PackageDesign

• Bumping/WLCSP

• PackagingAssembly

• PackageLevelTesting

• SubstrateManufacturing

• ICDesign

• RadioDesign

• SoftwareDevelopment

• Marketing

• TechnicalSupport

ODM/OEMFoundry OSAT

Unique Turnkey Solution Bridging OSAT & EMS/ODM

• SystemDesign

• SystemAssembly

• SystemTest

• SoftwareDevelopment

• ProductMarketing

• Sales&Support

• ModuleDesign

• ComponentSourcing

• ModuleAssembly

• ModuleTesting

• FAESupport

• LogisticService

©ASEGroup.Allrightsreserved.

GroupSynergy

Fullturnkeysolution– fromdesigntodelivery

4

©ASEGroup.Allrightsreserved.

SiP ModuleOverview

5

©ASEGroup.Allrightsreserved.

50Years- RevisitingMoore’sVision

6

“Thefutureofintegratedelectronicsisthefutureofelectronicsitself.Theadvantagesofintegration willbringaboutaproliferationofelectronics,pushingthisscienceintomanynewareas.…………”

GordonMoore,April19,1965

Today’srealityleveragescomplementaryandparallelintegrationpaths£ SoC integrationcontinuesforadvancedproductsrequiringMoore’sLawperformance&density

£ SiP heterogeneousdeviceintegrationforrapidNPIandcostsensitiveapplications

©ASEGroup.Allrightsreserved.

IndustryDynamicsDrivingSiP Modules

£ Moore’sLawslowing&divergencel IncreasingSoC developmentleadtime andcost(4Xfrom28nmto14/16mn)l NeedforalternativetoSoC integration- highercost/transistorforadvancedprocessnodes

£ Valuechainconsolidation– supplychainre-verticalizationl Contentprovidersdevelopinghardwaresystemstodifferentiateecosystemsl NeedforrapidNPI- BOMsimplification,lowercostandreducedtimetomarket

£ Globalconnectivityaccelerationl Mobile,wearableandIoT systemsdrivingminiaturizationl Needforre-configurability- rapidlychangingstandardsandapplicationrequirements

ØSiP modulesprovidealternativesolutionsforfunctionalintegration,miniaturization,optimizationandcostreduction

8

©ASEGroup.Allrightsreserved.

SysteminPackage/ Module

8

£ SiP /SiM arepackageormodulebasedsolutionsthatcontainanapplicationfocusedfunctionalelectronicsystemor sub-systemthatisintegrated andminiaturizedthroughICassembly technologies

MiniaturizedModulePackage

ElectronicSystem

Functionality

ICAssemblyTechnology

©ASEGroup.Allrightsreserved.

Integration&Miniaturization

9

Device Package

ModuleSystem

3D ICMemory

2.5D ICFPGA, GPU, NPU

RF / FEMConnectivity

CameraTouch Sensor

BiometricSmartWatch

Fitness

PMU

SSD

Sensor Fusion

IoT

VR Headset

SiP

Silicon Die Based

IC PackageBased

SiM

SoC

Application drivenBridging OSAT & EMS

©ASEGroup.Allrightsreserved.

SystemMiniaturization£ SiP isanICpackagethatincludesactivedieandSMTcomponents£ SiM isstandaloneorconnectorbasedmoduleutilizingICandSMTminiaturizationtechnologies

£ SystemMiniaturizationandModularizationExamplesl Wearablel IoT devicesl NUC(NextUnitofComputing)l Computestick

£ Systemleveraged“subsystems”l Connectivitymodules– WiFi,BT/BLE,Zigbeel Storagemodules- SSDl Sensormodules– Biometric,IMU,Pressure,Light/Proximity

10

©ASEGroup.Allrightsreserved.

SiP ModuleBenefits

11

£ Highly heterogeneous integration - including different wafer technologies£ Miniaturized by SiP core technologies£ Performance optimized - signal integrity and power£ Decreased development time – rapid NPI£ Lower cost alternative to SoC£ Simplified system PCB & BOM – improved reliability£ Flexible, re-usable & re-configurable£ One step closer to stand-alone system

Die/Package,Components System-in-Package(SiP)

Die128nm/Fab1Digital

Die240nm/Fab2Analog

+Die320nm/Fab3Memory

+

Die414nm/Fab4PowerSA

WFilte

r MEMSSensor+ +

+

+ + +

Die128nm/Fab1Digital

Die320nm/Fab3Memory

Die240nm/Fab2Analog

Die414nm/Fab4Power

SAW

Filte

r

MEMSSensor

©ASEGroup.Allrightsreserved.

SiP ModuleValueMap

12

£ Inmanycases,systemsaremadeofaweightedmixofSoC,SiPandSoB

©ASEGroup.Allrightsreserved.

Example– SmartPhoneEvolution

System miniaturization enabled by SiP

13

©ASEGroup.Allrightsreserved.

EnablingTechnologies&Examples

ASEConfidential 14

©ASEGroup.Allrightsreserved.

HeterogeneousIntegrationFanOut BridgingtheInterconnectDensityGap

15

25 15 12 8 5 2 1

L/S(um)

Die Die

FC CSP

LD FOWLP

HD FOWLP

HD FOCoS

2.5D

PoP

LD FOSiP

HD FOSiP PoP

Embedded

SiP

Multi-Die Pkg

©ASEGroup.Allrightsreserved.

eWLB

Max.Pkg size~10x10RDLL/S>8/8um2LRDL

ChipfirstWaferFOHighI/OWLPSubstrate-lessSmallformfactorKGD

BB,RF,Codec,PMIC,CarRadar….

FOCLP

Max.Pkg size~12x12RDLL/S>12/12um1LRDL

ChiplastCorelesssubstrateCupillarfliponETS(40um)LowercostFOSmallformfactor

BB,RF,Codec,PMIC….FOCoS

Max.Pkg size~45x45RDLL/S>2/2um3LRDL

ChipfirstFCBGAassemblyDiepartitionHighI/Oconnect(>1000)GoodelectricalAlternativeto2.5D

Networking,Server….FOPoP

Max.Pkg size~15x15RDLL/S>5/5um3LRDL

ChipfirstWaferFOThinpackageheightPackageonpackageHighbandwidthperformancePassiveintegrated

AP&MemoryIntegration....

FOSiP

Max.Pkg size~15x15RDLL/S>5/5um3LRDL

ChiplastWaferFOKnowngoodRDLSmall&lowprofilemoduleFullyfunctionalsystem

AP&MemoryIntegration,RFModule….

FanOutBasedSolutions

16

©ASEGroup.Allrightsreserved.

Encapsulation• Exposed Die• IrregularShape• SelectiveArea• DoubleSided

Interconnection• WireBond• FlipChip• TSV

IPD

AFE EPS

Memory

APU / MPUMEMS

1

2

WaferLevelProcess• IPD• WLP/Fan-Out• FOCoS

3

EmbeddedTechnology• TDKSESUB• aEASI

4

Die/Pkg Stacking• Multi-diestack• 2.5D,3DIC• PoP,PiP

5

SystemAssembly• HD-SMT• Rigid/Flex• MechanicalAssy

6

Shielding/Antenna• ConformalShielding• CompartmentShielding• Antennaon/inpackage

8

SiP EnablingTechnologies

15

7 MEMS/Sensor• Motion• Environmental• Image/Optical

©ASEGroup.Allrightsreserved.

WirelessConnectivity- WiFi

18

£ Application:WiFi 802.11a/b/g/n2x2+BT4.0formobileandwearable

£ ServicesProvided:ModuleDesign&Manufacturing£ TechnologiesLeveraged:

l DoubleSideSMTl DoubleSideMolding&ExposedMoldingl ConformalShielding

£ BenefitRealized:30%moduleXYsizereduction

Now:SingleSidedModuleModuleSize:10.0x6.6x1.1mm

Solution:DoubleSidedMoldingModuleModuleSize:7.75x5.4x1.3mm

SI SI

SubstrateMoldUnderfill

(MUF)SolderBall

ConformalShielding(Option)

LGAPinout

Passive50PcsSubstrate:2+2+2,0.30mmMUFC/S,01005100umSMTclearance

©ASEGroup.Allrightsreserved.

WirelessConnectivity– BLE

19

£ Application:BluetoothLowEnergy(BLE)forWearableProduct

£ ServicesProvided:ModuleDesign&Mfg.£ TechnologiesLeveraged:

l AoP (AntennaonPackage)£ Benefit:82%moduleXYsizereduction

Current:SingleSidedModulewithChipAntennaModuleSize:15.0x15.0x2.0mm

Solution:AoP (AntennaonPackage)ModuleSize:6.5x6.5x1.2mm

AoPModule(6.5x6.5x1.2mm)

BLEAoP ModuleForWearableBeaconProduct

MetalStampedAntennaBLE4.0(2.4GHz)

SingleChip(Nordicn51822)RFPassive20Pcs

Substrate:4layer,0.3mmMetalLid,0201

BLE

©ASEGroup.Allrightsreserved. 20

£ Application:Bodymotion& physiologicalsignsensinginmobile/wearable

£ ServicesProvided:Moduledesignandmanufacturing,system-leveltesting&firmwareco-qualification

£ TechnologiesLeveraged:l EmbeddedDieSubstratel Clearcompoundmoldingwithmicro-structureenhancement

£ Benefit:l 84%moduleXYsizereductionl Betteropticalsignalinterferenceisolationl Lessparasiticresistance&capacitance

Sensor– OpticalHRM

PD LEDPassive LEDAFE MCU

Now:DiscreteonPCBAModuleSize:15.0x15.0x1.7mm

Now:IntegratedSensorModuleSize:6.6x2.4x0.78mm

©ASEGroup.Allrightsreserved.

Summary

ApplicationfocusedSiP – advancedtechnology&fullturnkeysupplysolutions

• SubstrateDesign• Manufacturing

Service• Modeling&

Simulation

DesignWafer

Bumping Assembly Test System

• 6”/8”/12”wafer• Re-passivation• SputterorPlating

UBM/RDL• BallDrop,Printing,

PB-free,CuPillar

• StandardICPackages• AdvancedFlipChip• Hybrid(WB/FC)• MEMS/Optical

SensorModule• AutomotiveGrade-0

• WaferProbing• IC&ModuleTest• Analog/Power/RF

/Mixed-Signal• TestProgram

Development

• SiP (systeminpackage)

• DMS(Module,BoardAssemblyandTest)

• Hybrid&Electronic• Packaging

CONSUMER

COMPUTINGPORTABLE

WEARABLE

NETWORKING/IoT

AUTOMOTIVE MEDICAL

22

©ASEGroup.Allrightsreserved.

©ASEGroup.Allrightsreserved.

ThankYou

23

www.aseglobal.com