+ All Categories
Home > Documents > Slap 113

Slap 113

Date post: 07-Apr-2018
Category:
Upload: thong-nguyen
View: 220 times
Download: 0 times
Share this document with a friend

of 41

Transcript
  • 8/6/2019 Slap 113

    1/41

    MSP430 Timers In-Dep

    MSP430 Applica

    Tex

  • 8/6/2019 Slap 113

    2/41

    Introduction

    Basic Timer

    RTC

    Watchdog Timer (WDT/WDT+) Timer_A

    Timer_B

    Summary and Applications

    Agenda

  • 8/6/2019 Slap 113

    3/41

    Introduction

    Timers: Essential to almost any embedd

    Generate fixed-period events Periodic wakeup

    Count edges

    Replacing delay loops with timer calls allows CPU to slless power

    Five types of MSP430 timer modules

    Different tasks call for different timers. B

    We will: Discuss all five timer modules

    Extract the unique characteristics of each, compare/con

    Spend majority of time on Timer_A/B Look at real-world application examples

  • 8/6/2019 Slap 113

    4/41

    Introduction

    Basic Timer

    RTC

    Watchdog Timer (WDT/WDT+) Timer_A

    Timer_B

    Summary and Applications

    Agenda

  • 8/6/2019 Slap 113

    5/41

    Basic Timer: Overview

    Found only on 4xx Primary characteristics

    Clock for LCD module

    Good choice for RTC implementation

    Basic interval timer

    Simple interrupt capability

    Wide range of intervals up to two seconds

  • 8/6/2019 Slap 113

    6/41

    Basic Timer: Real-Time Clock E

    void main(void)

    {WDTCTL = WDTPW + WDTHOLD; // Stop watchd

    FLL_CTL0 |= XCAP14PF; // Set load cap

    setTime(0x12,0,0,0); // Init

    BTCTL = BT_ADLY_1000; // Set interva

    IE2 |= BTIE; // Enable BT in

    __BIS_SR(LPM3_bits + GIE); // Sleep, enab

    }

    #pragma vector=BASICTIMER_VECTOR

    __interrupt void BT_ISR(void)

    {

    incrementSeconds();

    if(sec==60) {sec = 0; incrementMinutes();if(min==60) {min = 0; incrementHours();}

    if(hours>12) hours=1;

    }

    void main(void)

    {

    WDTCTL = WDTPW + WDTHOLD; // Stop watchdo

    FLL_CTL0 |= XCAP14PF; // Set load cap

    setTime(0x12,0,0,0); // Init

    BTCTL = BT_ADLY_1000; // Set interval

    IE2 |= BTIE; // Enable BT in

    __BIS_SR(LPM3_bits + GIE); // Sleep, enabl

    }

    #pragma vector=BASICTIMER_VECTOR

    __interrupt void BT_ISR(void)

    {

    incrementSeconds();

    if(sec==60) {sec = 0; incrementMinutes();}

    if(min==60) {min = 0; incrementHours();}

    if(hours>12) hours=1;

    }

  • 8/6/2019 Slap 113

    7/41

    Basic Timer: LCD Drive ExaSet Basic Timerfor LCD refresh

    void main(void)

    {

    int i;

    WDTCTL = WDTPW + WDTHOL

    FLL_CTL0 |= XCAP14PF;

    LCDCTL = LCDP2 + LCD4MU

    BTCTL = BTFRFQ1; // LCD

    P5SEL = 0xFC; // Set

    for (;;)

    for (i=0; i

  • 8/6/2019 Slap 113

    8/41

    Basic Timer: Thermostat Exvoid main(void)

    {

    >

    BTCTL = BT_ADLY_2000; // Two secon

    BTCTL |= BT_fLCD_DIV256; // LCD=ACLK/

    IE2 = BTIE; // Enable in

    while(1)

    checkTempAndUpdateDisplay();}

    #pragma vector=BASICTIMER_VECTOR

    __interrupt void basic_timer(void)

    {

    if(count&0x01) // Every oth

    __BIC_SR_IRQ(LPM3_bits); // Exit afte

    count++;

    }

    void main(void)

    {

    >

    BTCTL = BT_ADLY_2000; // Two second

    BTCTL |= BT_fLCD_DIV256; // LCD=ACLK/2

    IE2 = BTIE; // Enable int

    while(1)

    checkTempAndUpdateDisplay();

    }

    #pragma vector=BASICTIMER_VECTOR

    __interrupt void basic_timer(void)

    {

    if(count&0x01) // Every othe

    __BIC_SR_IRQ(LPM3_bits); // Exit after

    count++;

    }

  • 8/6/2019 Slap 113

    9/41

    Introduction

    Basic Timer

    RTC

    Watchdog Timer (WDT/WDT+) Timer_A

    Timer_B

    Summary and Applications

    Agenda

  • 8/6/2019 Slap 113

    10/41

    Real-Time Clock Module: Ov

    First introduced on FG4619

    (new module) Extension of the Basic Timer

    Two modes Counter: BT is unaltered, and

    theres now an additional 32-bit

    counter Calendar: BT becomes part of

    RTC module, all of which drives anRTC

    BT and RTC share interrupt

    vectors

  • 8/6/2019 Slap 113

    11/41

    RTC: Calendar Mode

    Clock functions handled

    automatically Registers for:

    Year

    Month

    Date

    Day of week Hour

    Minute

    Second

    Either BCD or hex format

    No generic BTfunctionality

    Handles lea

    calculation RTC interru

    Can be enab

    Triggered onmin/hr/midnig

    Intervals frominute to oone-secondlonger requimplement

    No alarm ctime) interruimplemente

  • 8/6/2019 Slap 113

    12/41

    RTC: Real-Time Clock Examvoid main(void) {

    WDTCTL = WDTPW+WDTHOLD; // Stop the dog

    RTCCTL = RTCBCD+RTCHOLD+RTCMODE_3+RTCTEV_0// Enable, BCD, in

    RTCSEC = 0x00; // Set Seconds

    RTCMIN = 0x00; // Set Minutes

    RTCHOUR = 0x08; // Set Hours

    RTCDOW = 0x02; // Set DOW

    RTCDAY = 0x23; // Set DayRTCMON = 0x08; // Set Month

    RTCYEAR = 0x2005; // Set Year

    RTCCTL &= ~RTCHOLD; // Enable RTC

    __BIS_SR(LPM3_bits+GIE);// Enter LPM3 w/ i

    }

    #pragma vector=BASICTIMER_VECTOR__interrupt void basic_timer(void) {

    P5OUT ^= 0x02; // Toggle P5.1 eve

    }

    void main(void) {

    WDTCTL = WDTPW+WDTHOLD; // Stop the dog

    RTCCTL = RTCBCD+RTCHOLD+RTCMODE_3+RTCTEV_0// Enable, BCD, in

    RTCSEC = 0x00; // Set Seconds

    RTCMIN = 0x00; // Set Minutes

    RTCHOUR = 0x08; // Set Hours

    RTCDOW = 0x02; // Set DOW

    RTCDAY = 0x23; // Set Day

    RTCMON = 0x08; // Set Month

    RTCYEAR = 0x2005; // Set Year

    RTCCTL &= ~RTCHOLD; // Enable RTC

    __BIS_SR(LPM3_bits+GIE);// Enter LPM3 w/ i

    }

    #pragma vector=BASICTIMER_VECTOR__interrupt void basic_timer(void) {

    P5OUT ^= 0x02; // Toggle P5.1 eve

    }

  • 8/6/2019 Slap 113

    13/41

    RTC: Counter Mode

    BT remains intact

    RTC provides an additional 32-bit counte

    BT/RTC counters share one interrupt vec

    In effect, the 32-bit counter replaces the 1

    RTCIE bit selects whether interrupt geneor BT counters

    If set, interrupt generated by overflow of (selectable 8/16/24/32-bit)

    Interrupt vector is shared with BT

  • 8/6/2019 Slap 113

    14/41

    RTC: BT/RTC Interval Timer Ex

    Setting RTCIE in interval mode causes in

    generated from 32-bit RTC interval countvoid main(void){

    WDTCTL = WDTPW + WDTHOLD;

    FLL_CTL0 |= XCAP18PF;

    P5DIR |= 0x02;

    BTCTL=BTSSEL+BT_fCLK2_DIV256; //1MHz/256 = RTCCTL =RTCMODE_1+RTCTEV_0+RTCIE; // 1MHz/

    IE2 |= BTIE;

    __BIS_SR(LPM0_bits + GIE);}

    #pragma vector=BASICTIMER_VECTOR

    __interrupt void basic_timer_ISR(void){

    P5OUT ^= 0x02; // Toggle P5.1}

    void main(void){

    WDTCTL = WDTPW + WDTHOLD;

    FLL_CTL0 |= XCAP18PF;

    P5DIR |= 0x02;

    BTCTL=BTSSEL+BT_fCLK2_DIV256; //1MHz/256 = RTCCTL =RTCMODE_1+RTCTEV_0+RTCIE; // 1MHz/(

    IE2 |= BTIE;

    __BIS_SR(LPM0_bits + GIE);}

    #pragma vector=BASICTIMER_VECTOR

    __interrupt void basic_timer_ISR(void){

    P5OUT ^= 0x02; // Toggle P5.1}

  • 8/6/2019 Slap 113

    15/41

    Introduction

    Basic Timer

    RTC

    Watchdog Timer (WDT/WDT+) Timer_A

    Timer_B

    Summary and Applications

    Agenda

  • 8/6/2019 Slap 113

    16/41

    Watchdog (WDT/+) Module: Ove

    Found on all MSP430 devices

    Two flavors: WDT & WDT+

    Two modes Watchdog

    Interval timer

    Access password protected Separate interrupt vectors for POR

    and interval timer

    Sourced by ACLK or SMCLK

    Controls RST/NMI pin mode WDT+ adds failsafe/protected clock

  • 8/6/2019 Slap 113

    17/41

    WDT: Watchdog Function

    Controlled start if s/w problem occurs

    Code must pet the dog before intervalexpires, otherwise PUC

    Selectable intervals

    Powers up active as watchdog w/ ~32msreset YOUR CODE MUST INITIALIZE THEWDT

    In addition to PUC, WDTIFG sources resetvector interrupt

    Code can use WDTIFG to determinewhether dog caused interrupt

  • 8/6/2019 Slap 113

    18/41

    WDT: Common Design Issu

    Program keeps resetting itself!

    Program acting wacky how did executiplace? Try setting interrupt near beginning of main() to see if c

    CPU seems to freeze before even gettinginstruction Is this a C program with a lot of initialized memory?

    Generally can occur only with very large-memory versio

    Solution: Use __low_level_init() function, stop watchdo

    void main(void)

    {

    WDTCTL = WDTPW+WDTHOLD; // Stop the .

    .

    }

    void main(void)

    {

    WDTCTL = WDTPW+WDTHOLD; // Stop the .

    .

    }

  • 8/6/2019 Slap 113

    19/41

    WDT: Interval Timer Functio

    No PUC issued when interval

    is reached If WDTIE and GIE set when

    interval is reached, a WDTinterval interrupt generatedinstead of reset interrupt

    Selectable intervals

  • 8/6/2019 Slap 113

    20/41

    Introduction

    Basic Timer

    RTC

    Watchdog Timer (WDT/WDT+) Timer_A

    Timer_B

    Summary and Applications

    Agenda

  • 8/6/2019 Slap 113

    21/41

    Timer_A Module: Overview

    The most versatile

    Async 16-bit timer/counter Four input clocks, including

    externally-sourced

    Selectable count mode

    Extensive interrupt capability

    Up to three capture/compareregisters (CCR) generate eventswhen value reached

    Capture or Compare mode

    Output not only interrupts, butalso output signals

    Extensive connections to othermodules

  • 8/6/2019 Slap 113

    22/41

    Timer_A: Capture Mode

    Measure time before a signal eventoccurs

    Why not just use a CPU interrupt andhave CPU fetch timer value?

    Extra cycles expire

    Dependent on ints being enabled

    Input signal from:

    External pin Internal signal (i.e., Comp_A)

    Vcc/GND

    Edge direction programmable

    Applications:

    Analog signal rising to Comp_A threshold

    Slope ADC

    Frequency measurement

    Vcc threshold detect (via voltage divider)

  • 8/6/2019 Slap 113

    23/41

    Timer_A: Compare Mode

    Cause an event after a defined period (ex

    of capture mode) What kind of event?

    CPU interrupt

    Modules tied internally to timer output (DMA, start ADC

    External components

    Applications: PWM generation

    RTC

    Thermostat

    Timer_A UART

  • 8/6/2019 Slap 113

    24/41

    Timer_A: Count Modes

    Determines pattern of counter direction

    What will it do when it rolls over? Does it always count up? Maybe down?

    What is the maximum value?

    Typically used in compare mode to geneevents

    Can apply to capture mode in measuringevents

    The modes: Continuous: Up to FFFF, rolls over to 0000, back up to

    Up: Up to value specified by CCR0, rolls over to 0000,

    value, etc. Up/down: Up to value specified by CCR0, count down

    to CCR0 value, etc.

  • 8/6/2019 Slap 113

    25/41

    Timer_A: Count Modes

    Up

    Continuous

    Up toover to FF

    Up/Down

  • 8/6/2019 Slap 113

    26/41

    Timer_A: CCR Output Mode

    Each CCR generates an output signal, av

    externally This is a separate and different type of ou

    compared to interrupts

    Operate continuously while CPU sleeps

    Output modes determine how the timer ptranslates to output signal

    Note that CCR0 plays a role in CCR1-2 ou

    For different combinations of count modmodes, and CCR values, a multitude of obehaviors possible

  • 8/6/2019 Slap 113

    27/41

    Timer_A: Count Modes

  • 8/6/2019 Slap 113

    28/41

    Timer_A: Interrupt Overview

    Two vectors: TACCR0 for CCR0 CCIFG (higher

    priority)

    TAIV for all CCIFG except CCR0,plus TAIFG

    In compare mode:corresponding CCIFG setwhen TAR reaches TACCRx

    In capture mode:corresponding CCIFG setwhen event occurs and newvalue placed in TACCRx

    Also TAIFG bit set

    whenever timer reaches zero

  • 8/6/2019 Slap 113

    29/41

    Timer_A: TAIV Interrupt Han

    TAIV interrupt handler uses switch mechidentify correct sub-vector to handle

    CCRX_ISR add &TAIV,PC ; Offset t

    reti ; No sourc

    jmp CCR1_ISR ;

    jmp CCR2_ISR ;reti ; No sourc

    reti ; No sourc

    TIMOVH xor.b #08h,&P1OUT

    reti

    CCR1_ISR xor.b #02h,&P1OUT

    reti

    CCR2_ISR xor.b #04h,&P1OUT

    reti

    CCRX_ISR add &TAIV,PC ; Offset to

    reti ; No source

    jmp CCR1_ISR ;

    jmp CCR2_ISR ;reti ; No source

    reti ; No source

    TIMOVH xor.b #08h,&P1OUT

    reti

    CCR1_ISR xor.b #02h,&P1OUT

    reti

    CCR2_ISR xor.b #04h,&P1OUTreti

  • 8/6/2019 Slap 113

    30/41

    Timer_A: Internal Connectio Timer_A/B have several

    connections to other mo Comp_A DMA DAC12 External inputs/outputs

    Avoids CPU wakeup s

    Faster response no cywhile ISR loads/execute

  • 8/6/2019 Slap 113

    31/41

    Timer_A: Internal Connectio

    Automatic SOC trigger eliminates phase

    Why are they important? Example:

  • 8/6/2019 Slap 113

    32/41

    Introduction

    Basic Timer

    RTC

    Watchdog Timer (WDT/WDT+) Timer_A

    Timer_B

    Summary and Applications

    Agenda

  • 8/6/2019 Slap 113

    33/41

    Timer_B Module: Overview

    Same as Timer_A, except: Some implementations have 7 CCRs

    Bit-length of timer is programmableas 8-, 10-, 12-, or 16-bit

    No SCCI bit function

    Double-buffered CCR registers

    CCR registers can be grouped

  • 8/6/2019 Slap 113

    34/41

    Timer_B: Double-Buffered CCR

    New register TBCLx with

    TBCCRx TBCLx takes on role of

    TACCRx in determininginterrupts

    TBCL0 takes on role ofTACCR0 in count modes

    Cant access TBCLx directly;write to TBCCRx, then at theload event, moves to TBCLx

    Load event timing isprogrammable: Immediately

    When TBR counts to zero

    When TBR counts to old TBCLx value

    Load events canmultiple TBCCRTBCL together

  • 8/6/2019 Slap 113

    35/41

    Introduction

    Basic Timer

    RTC

    Watchdog Timer (WDT/WDT+) Timer_A

    Timer_B

    Summary and Applications

    Agenda

  • 8/6/2019 Slap 113

    36/41

    Timer Modules: Unique Fea

    Basic Timer / RTC RTC-specific functionality LCD functions Interrupt intervals up to two seconds

    WDT / WDT+ Can reset device automatically Interrupt intervals up to one second

    Timer_A/B Widest interrupt interval range:

    1/MCLK to 32 seconds Control count direction Set count max w/o software

    intervention Has outputs with configurable duty

    cycle Internal connection to other

    peripherals Capture capability

  • 8/6/2019 Slap 113

    37/41

    Timer Modules: Interval Ran

    32se0.95us / 1.048MHzTimer_A/B

    2se1.9us / 524kHzBasic / RTC

    1s61us / 16.4kHzWatchdog

    MaximMinimum Period

    Assuming either clock source can be used to source thethe interval ranges for interrupts?

    Example 1: MCLK = SMCLK = 1.048MHz and ACLK = 32kHz

    87.4s62.5ns / 16MHzTimer_A/B

    5.5se125ns / 8MHzBasic / RTC

    2.7se4us / 250kHzWatchdog

    MaximMinimum Period

    Example 2: MCLK = SMCLK = 16MHz and ACLK = VLOCLK

    Values

  • 8/6/2019 Slap 113

    38/41

    Timer Applications: PWM

    void main(void)

    {WDTCTL = WDTPW +

    P1DIR |= 0x04;

    P1SEL |= 0x04;

    P2DIR |= 0x01;

    P2SEL |= 0x01;

    CCR0 = 512-1;

    CCTL1 = OUTMOD_7

    CCR1 = 384;

    CCTL2 = OUTMOD_7

    CCR2 = 128;

    TACTL = TASSEL_2

    //

    __BIS_SR(LPM0_bi

    }

    void main(void)

    {WDTCTL = WDTPW +

    P1DIR |= 0x04;

    P1SEL |= 0x04;

    P2DIR |= 0x01;

    P2SEL |= 0x01;

    CCR0 = 512-1;

    CCTL1 = OUTMOD_7CCR1 = 384;

    CCTL2 = OUTMOD_7

    CCR2 = 128;

    TACTL = TASSEL_2

    //

    __BIS_SR(LPM0_bi

    }

  • 8/6/2019 Slap 113

    39/41

    Timer Applications: Voice R

    Which timer to use?

  • 8/6/2019 Slap 113

    40/41

    Summary

    There are a variety of MSP430 timers ava

    Timers allow more time in sleep mode, sa

    Use the Basic Timer and Watchdog Intervsimple interval situations

    Use Timer_A/B for PWM, capture, and mo

    counting situations A wealth of information is available: che

    Guides, code examples, and application

  • 8/6/2019 Slap 113

    41/41

    I M P O R T A N T N O T I C E

    T e x a s I n s t r u m e n t s I n c o r p o r a t e d a n d i t s s u b s i d i a r i e s ( T I ) r e s e r v e t h e r i g h t t o m a k e c o r r e c t i o n s , m o d i f i c a t i o n s , e n h a n c e m e n t s , i m p r o v e m e n t s , a n d o t h e r c h a n g e s t o i t s p r o d u c t s a n d s e r v i c e s a t a n y t i m e a n d t o d i s c o n t i n u e a n y p r o d u c t o r s e r v i c e w i t h o u t n o t i c e . C u s t o m e r s s h o u l d o b t a i n t h e l a t e s t r e l e v a n t i n f o r m a t i o n b e f o r e p l a c i n g o r d e r s a n d s h o u l d v e r i f y t h a t s u c h i n f o r m a t i o n i s c u r r e n t a n d c o m p l e t e . A l l p r o d u c t s a r e s o l d s u b j e c t t o T I s t e r m s a n d c o n d i t i o n s o f s a l e s u p p l i e d a t t h e t i m e o f o r d e r a c k n o w l e d g m e n t .

    T I w a r r a n t s p e r f o r m a n c e o f i t s h a r d w a r e p r o d u c t s t o t h e s p e c i f i c a t i o n s a p p l i c a b l e a t t h e t i m e o f s a l e i n a c c o r d a n c e w i t h T I s

    s t a n d a r d w a r r a n t y . T e s t i n g a n d o t h e r q u a l i t y c o n t r o l t e c h n i q u e s a r e u s e d t o t h e e x t e n t T I d e e m s n e c e s s a r y t o s u p p o r t t h i s w a r r a n t y . E x c e p t w h e r e m a n d a t e d b y g o v e r n m e n t r e q u i r e m e n t s , t e s t i n g o f a l l p a r a m e t e r s o f e a c h p r o d u c t i s n o t n e c e s s a r i l y p e r f o r m e d .

    T I a s s u m e s n o l i a b i l i t y f o r a p p l i c a t i o n s a s s i s t a n c e o r c u s t o m e r p r o d u c t d e s i g n . C u s t o m e r s a r e r e s p o n s i b l e f o r t h e i r p r o d u c t s a n d a p p l i c a t i o n s u s i n g T I c o m p o n e n t s . T o m i n i m i z e t h e r i s k s a s s o c i a t e d w i t h c u s t o m e r p r o d u c t s a n d a p p l i c a t i o n s , c u s t o m e r s s h o u l d p r o v i d e a d e q u a t e d e s i g n a n d o p e r a t i n g s a f e g u a r d s .

    T I d o e s n o t w a r r a n t o r r e p r e s e n t t h a t a n y l i c e n s e , e i t h e r e x p r e s s o r i m p l i e d , i s g r a n t e d u n d e r a n y T I p a t e n t r i g h t , c o p y r i g h t , m a s k w o r k r i g h t , o r o t h e r T I i n t e l l e c t u a l p r o p e r t y r i g h t r e l a t i n g t o a n y c o m b i n a t i o n , m a c h i n e , o r p r o c e s s i n w h i c h T I p r o d u c t s o r s e r v i c e s a r e u s e d . I n f o r m a t i o n p u b l i s h e d b y T I r e g a r d i n g t h i r d - p a r t y p r o d u c t s o r s e r v i c e s d o e s n o t c o n s t i t u t e a l i c e n s e f r o m T I t o u s e s u c h p r o d u c t s o r s e r v i c e s o r a w a r r a n t y o r e n d o r s e m e n t t h e r e o f . U s e o f s u c h i n f o r m a t i o n m a y r e q u i r e a l i c e n s e f r o m a t h i r d p a r t y u n d e r t h e p a t e n t s o r o t h e r i n t e l l e c t u a l p r o p e r t y o f t h e t h i r d p a r t y , o r a l i c e n s e f r o m T I u n d e r t h e p a t e n t s o r o t h e r i n t e l l e c t u a l p r o p e r t y o f T I .

    R e p r o d u c t i o n o f i n f o r m a t i o n i n T I d a t a b o o k s o r d a t a s h e e t s i s p e r m i s s i b l e o n l y i f r e p r o d u c t i o n i s w i t h o u t a l t e r a t i o n a n d i s a c c o m p a n i e d b y a l l a s s o c i a t e d w a r r a n t i e s , c o n d i t i o n s , l i m i t a t i o n s , a n d n o t i c e s . R e p r o d u c t i o n o f t h i s i n f o r m a t i o n w i t h a l t e r a t i o n i s a n u n f a i r a n d d e c e p t i v e b u s i n e s s p r a c t i c e . T I i s n o t r e s p o n s i b l e o r l i a b l e f o r s u c h a l t e r e d d o c u m e n t a t i o n .

    R e s a l e o f T I p r o d u c t s o r s e r v i c e s w i t h s t a t e m e n t s d i f f e r e n t f r o m o r b e y o n d t h e p a r a m e t e r s s t a t e d b y T I f o r t h a t p r o d u c t o r s e r v i c e

    v o i d s a l l e x p r e s s a n d a n y i m p l i e d w a r r a n t i e s f o r t h e a s s o c i a t e d T I p r o d u c t o r s e r v i c e a n d i s a n u n f a i r a n d d e c e p t i v e b u s i n e s s p r a c t i c e . T I i s n o t r e s p o n s i b l e o r l i a b l e f o r a n y s u c h s t a t e m e n t s .

    T I p r o d u c t s a r e n o t a u t h o r i z e d f o r u s e i n s a f e t y - c r i t i c a l a p p l i c a t i o n s ( s u c h a s l i f e s u p p o r t ) w h e r e a f a i l u r e o f t h e T I p r o d u c t w o u l d r e a s o n a b l y b e e x p e c t e d t o c a u s e s e v e r e p e r s o n a l i n j u r y o r d e a t h , u n l e s s o f f i c e r s o f t h e p a r t i e s h a v e e x e c u t e d a n a g r e e m e n t s p e c i f i c a l l y g o v e r n i n g s u c h u s e . B u y e r s r e p r e s e n t t h a t t h e y h a v e a l l n e c e s s a r y e x p e r t i s e i n t h e s a f e t y a n d r e g u l a t o r y r a m i f i c a t i o n s o f t h e i r a p p l i c a t i o n s , a n d a c k n o w l e d g e a n d a g r e e t h a t t h e y a r e s o l e l y r e s p o n s i b l e f o r a l l l e g a l , r e g u l a t o r y a n d s a f e t y - r e l a t e d r e q u i r e m e n t s c o n c e r n i n g t h e i r p r o d u c t s a n d a n y u s e o f T I p r o d u c t s i n s u c h s a f e t y - c r i t i c a l a p p l i c a t i o n s , n o t w i t h s t a n d i n g a n y a p p l i c a t i o n s - r e l a t e d i n f o r m a t i o n o r s u p p o r t t h a t m a y b e p r o v i d e d b y T I . F u r t h e r , B u y e r s m u s t f u l l y i n d e m n i f y T I a n d i t s r e p r e s e n t a t i v e s a g a i n s t a n y d a m a g e s a r i s i n g o u t o f t h e u s e o f T I p r o d u c t s i n s u c h s a f e t y - c r i t i c a l a p p l i c a t i o n s .

    T I p r o d u c t s a r e n e i t h e r d e s i g n e d n o r i n t e n d e d f o r u s e i n m i l i t a r y / a e r o s p a c e a p p l i c a t i o n s o r e n v i r o n m e n t s u n l e s s t h e T I p r o d u c t s a r e s p e c i f i c a l l y d e s i g n a t e d b y T I a s m i l i t a r y - g r a d e o r " e n h a n c e d p l a s t i c . " O n l y p r o d u c t s d e s i g n a t e d b y T I a s m i l i t a r y - g r a d e m e e t m i l i t a r y s p e c i f i c a t i o n s . B u y e r s a c k n o w l e d g e a n d a g r e e t h a t a n y s u c h u s e o f T I p r o d u c t s w h i c h T I h a s n o t d e s i g n a t e d a s m i l i t a r y - g r a d e i s s o l e l y a t t h e B u y e r ' s r i s k , a n d t h a t t h e y a r e s o l e l y r e s p o n s i b l e f o r c o m p l i a n c e w i t h a l l l e g a l a n d r e g u l a t o r y r e q u i r e m e n t s i n c o n n e c t i o n w i t h s u c h u s e .

    T I p r o d u c t s a r e n e i t h e r d e s i g n e d n o r i n t e n d e d f o r u s e i n a u t o m o t i v e a p p l i c a t i o n s o r e n v i r o n m e n t s u n l e s s t h e s p e c i f i c T I p r o d u c t s a r e d e s i g n a t e d b y T I a s c o m p l i a n t w i t h I S O / T S 1 6 9 4 9 r e q u i r e m e n t s . B u y e r s a c k n o w l e d g e a n d a g r e e t h a t , i f t h e y u s e a n y n o n - d e s i g n a t e d p r o d u c t s i n a u t o m o t i v e a p p l i c a t i o n s , T I w i l l n o t b e r e s p o n s i b l e f o r a n y f a i l u r e t o m e e t s u c h r e q u i r e m e n t s .

    F o l l o w i n g a r e U R L s w h e r e y o u c a n o b t a i n i n f o r m a t i o n o n o t h e r T e x a s I n s t r u m e n t s p r o d u c t s a n d a p p l i c a t i o n s o l u t i o n s :

    P r o d u c t s A p p l i c a t i o n s

    A m p l i f i e r s a m p l i f i e r . t i . c o m A u d i o w w w . t i . c o m / a u d i o

    D a t a C o n v e r t e r s d a t a c o n v e r t e r . t i . c o m A u t o m o t i v e w w w . t i . c o m / a u t o m o t i v e

    D S P d s p . t i . c o m B r o a d b a n d w w w . t i . c o m / b r o a d b a n d

    I n t e r f a c e i n t e r f a c e . t i . c o m D i g i t a l C o n t r o l w w w . t i . c o m / d i g i t a l c o n t r o l

    L o g i c l o g i c . t i . c o m M i l i t a r y w w w . t i . c o m / m i l i t a r y

    P o w e r M g m t p o w e r . t i . c o m O p t i c a l N e t w o r k i n g w w w . t i . c o m / o p t i c a l n e t w o r k

    M i c r o c o n t r o l l e r s m i c r o c o n t r o l l e r . t i . c o m S e c u r i t y w w w . t i . c o m / s e c u r i t y

    R F I D w w w . t i - r f i d . c o m T e l e p h o n y w w w . t i . c o m / t e l e p h o n y

    L o w P o w e r w w w . t i . c o m / l p w V i d e o & I m a g i n g w w w . t i . c o m / v i d e o W i r e l e s s

    W i r e l e s s w w w . t i . c o m / w i r e l e s s

    M a i l i n g A d d r e s s : T e x a s I n s t r u m e n t s , P o s t O f f i c e B o x 6 5 5 3 0 3 , D a l l a s , T e x a s 7 5 2 6 5 C o p y r i g h t 2 0 0 7 , T e x a s I n s t r u m e n t s I n c o r p o r a t e d

    http://www.ti.com/wirelesshttp://www.ti-rfid.com/http://www.ti.com/telephonyhttp://microcontroller.ti.com/http://power.ti.com/http://www.ti.com/opticalnetworkhttp://logic.ti.com/http://www.ti.com/militaryhttp://interface.ti.com/http://www.ti.com/digitalcontrolhttp://www.ti.com/digitalcontrolhttp://dsp.ti.com/http://dsp.ti.com/http://www.ti.com/broadbandhttp://dataconverter.ti.com/http://www.ti.com/automotivehttp://amplifier.ti.com/http://www.ti.com/audiohttp://www.ti.com/wirelesshttp://www.ti.com/videohttp://www.ti.com/lpwhttp://www.ti.com/telephonyhttp://www.ti-rfid.com/http://www.ti.com/securityhttp://microcontroller.ti.com/http://www.ti.com/opticalnetworkhttp://power.ti.com/http://www.ti.com/militaryhttp://logic.ti.com/http://www.ti.com/digitalcontrolhttp://interface.ti.com/http://www.ti.com/broadbandhttp://dsp.ti.com/http://www.ti.com/automotivehttp://dataconverter.ti.com/http://www.ti.com/audiohttp://amplifier.ti.com/

Recommended