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Transcript

PRESENTATION TITLE GOES HERE

SNIA SSSI PCIe SSD Committee

13 OCT 2014

Toll-Free Access Number: 1-866-439-4480 Toll Access Number:  1-212-786-7191 Participant PIN Code:  57236696#

Webex: snia.webex.com

Mtg no: 797 152 928 Password: sssipcie

Agenda

1.  Administrative Roll Call; Minutes; Announcements 4:00 – 4:10

2.  Guest Presentation SSSI NVDIMM Committee 4:10 – 4:45 Arthur Sainio, Co-Chair

3.  Discussion Open 4:45 – 5:00

4. Close Action Items 5:00

Time: 4:00 – 4:10

Administrative

Roll Call:

Eden Kim, Co-Chair (Calypso); Cameron Brett, Co-Chair (TAEC) Arthur Sainio (SmartModular), Thomas Hsiao (Phison), Thomas Friend (OCZ), Marty Foltyn (SSSI), Bryan Rapisura (Netlist), Sujoy Sen (Dell), Jim Ryan (Intel), Tom West (hyperI/O), Rajiv Nigam (Samsung), Jim Handy (Objective Analysis), Mike Fitzpatrick (TEAC), Douglas Malech (IDT), Dan Helmick (SanDisk)

Jim Handy blog: SSD Guy – www.thessdguy.com Read about the latest in SSD technologies

[email protected] - contact Marty re: membership in SNIA SSSI

Time: 4:00 – 4:10

Administrative

1. Cameron Brett, Toshiba – new PCIe SSD Committee co-chair

2. Next call – second Monday of each

Nov 10: Presenter to be determined

3. Open Server Summit –

Nov 11-13 Santa Clara Convention Center

NVDIMM Committee demonstrations in SSSI booth #306-308

4. SSSI website updated – www.snia.org/sssi

5. Updates on SSSI – Paul Wassenberg

Time: 4:00 – 4:10

SSSI NVDIMM SIG Committee

Time: 4:10 – 4:45

See A. Sainio Deck Contact Arthur for questions at: [email protected] Jeff Chang at: [email protected] NVDIMM web: snia.org/forums/sssi/nvdimm Go to snia.org/forums/sssi to get presentation – go to NVDIMM SIG button

PRESENTATION TITLE GOES HERE

NVDIMM SIG Update for the

SSSI PCIe SSD Committee Arthur Sainio

October 13, 2014

Agenda

"   SSSI NVDIMM SIG goals and activities

"   NVDIMM functionality and applications

"   Industry standardization and Universal I2C Command Set

"   Next steps/industry support needed

"   First NVDIMM ‘industry’ meeting on 9/12/13 (IDF) to introduce marketing plan "   Objective: Accelerate awareness and adoption of NVDIMMs "   Plan Elements

"   Make potential adopters aware of the category of NVDIMMs, not the individual product of vendors

"   Target market segments: ISVs/OSVs for SW ecosystem "   Consistent messaging of the value proposition of NVDIMMs "   Staff resources, money and other elements required for plan development and

execution

"   NVDIMM Special Interest Group "   Formed 10/13 "   8/1/14 NVDIMM SIG officially joins the SNIA Solid State Storage

Initiative, becoming a new focus area for the SSSI 9

NVDIMM SIG

NVDIMM SIG Goals

"   Provide education on how system vendors can "design-in" NVDIMMs.

"   Communicate existing industry standards, and areas for vendor differentiation

"   Help technology and solution vendors whose products integrate NVDIMMs to communicate their benefits and value to the greater market.

"   Develop vendor-agnostic user perspective case studies, best practices, and vertical industry requirements to help both end user customers and vendors understand how products and solutions can meet performance, cost, and efficiency goals.

10

"   Events highlighting NVDIMMs "   1/28/14 Storage Industry Summit "   4/22-24/14 Data Storage Innovation

Conference "   8/4-7N-14 Flash Memory Summit "   9/9-11/14 IDF "   9/15-18/14 Storage Developer

Conference "   11/11-13/14 Open Server Summit "   01/4-5/15 Storage Visions 2015

"   Press Releases "   1/27/14 SNIA Special Interest Group

Formed to Accelerate Awareness and Adoption of Non-Volatile DIMM (NVDIMM) in the Marketplace

"   7/24/14 New Solid State Storage Programs Featured at Flash Memory Summit 2014

11

NVDIMM SIG Industry Support

"   Other Activities and Resources "   SNIA Tutorial – Storage in a DIMM Socket "   Hands on Lab – Conducted at FMS "   Webcast – NVDIMM-Persistence Pays "   FAQs "   Whitepapers

"   NVDIMM Technical Brief "   NVDIMM - Fastest Tier in Your Storage Strategy "   Non-Volatile Memory and Its Use in Enterprise

Applications "   NVDIMM: Enabling Greater ROI from SSDs "   Backup Power Charge Control and Health Monitoring

- A Technology Overview

"   Articles "   NVDIMMs: The Next Critical Technology For Your

Data Center Storage Strategy

•  Next event will feature NVDIMM demos Santa Clara Convention Center Nov 11-13, 2014

NVDIMM Adoption

"   Early Adopters deploying DDR3 solutions

"   DDR4 system HW ready, with standard interoperable modules

"   Initial DDR4 solutions may have custom software stacks

"   The availability of Open Source Drivers and User libraries will drive mass adoption by software applications!

DDR4 NVDIMMs &

Systems

Application Updates

Open Source Drivers & User

Library

BIOS, MRC Platform Software

Mass Deployment

12

NVDIMM – How it Works

X86 CPU

"   NVDIMM combines DRAM and Flash onto a single DIMM "   Operates as standard DRAM RDIMM

"   Host only addresses the DRAM and has no direct access to the flash

"   NVDIMM contains switches to switch control back and forth between host and NVDIMM controller

"   NVDIMM controller moves data from DRAM to flash upon power loss or other trigger

"   Supercaps (or other power source) provide back up power while DRAM is backed up to Flash

"   MRC (Memory Reference Code) configures NVDIMM controller to move data back from Flash to DRAM when recovery is needed

Host Interface

NVDIMM Controller

Quick Switches

DRAMFlash

SMBus DRAM

Supercap Pack

NVDIMM

13

DRAM

NVDIMM

NVDIMMs in Server and Storage Applications

"  Store Metadata in memory for application acceleration

"  Check-pointing state for fast sync and restore "  Host Caching: As Cache for direct attached PCIe

SSD "  Fast RAID Computation as block device for

distributed storage "  SSD Mapping Table "  Persistent RAMDisk

"   As Fast 4K block store "   Store boot image for fast restore

Persistent Variables

Metadata

Checkpoint State

Host Caching

RAMDisk

RAID Compute

Write buffer

SSD Mapping

DRAM (volatile variables)

CPU

NVDIMM (persistent variables)

HDD

SSD

Memory Bus

SW Overhead

I/O B

us

~100 ns

~100 µs

~10ms

Use Cases: • High performance servers • Database and Analytics servers •  Image editing systems, movie rendering and CAD systems • Real-time response in financial trading & social media •  SAN Appliances and Arrays • NAS Filers • Distributed Storage systems • High performance replacement for existing NVRAM PCIe cards 14

Model Name Model Description

Wildcat Pass S2600WT 2-socket rack; 1U & 2U chassis

Kennedy Pass S2600KP 2-socket half-width, 8 DIMM rack; 1U & 2U chassis

Taylor pass S2600TP 2-socket half-width, 16 DIMM rack; 2U/4-node chassis

Cottonwood Pass S2600CW 2-socket rack; Pedestal

Intel DDR4 Server & Storage Systems Supporting NVDIMMs

Model Number

X10DAi X10DRi-T4+ X10DRT-P X10RFR X10DRW-I

X10DAC X10DRC-LN4+ X10DRT-PT X10DRFR-T X10DRW-It X10DDW-iN

X10DRi-t X10DRC-T4+ X10DRT-PIBQ X10DRFF X10DRG-H X10DRG-HT

X10DRi-LN4+ X10DRL-i X10DRT-PIBF X10DRFF-C X10DRU-i+

Supermicro DDR4 Server & Storage Systems Supporting NVDIMMs

•  Intel server and storage systems launched in Sep’14 support NVDIMMs

•  Includes BIOS for NVDIMMs (but needs to be enabled)

•  Includes ADR signal (asynchronous DRAM refresh) wired to the DIMM sockets

•  Supermicro server and storage systems launched in Sep’14 support NVDIMMs

•  Includes BIOS for NVDIMMs •  Includes ADR signal

DDR4 Example Systems Supporting NVDIMMs

15

"   Intel collaborated with NVDIMM vendors to develop the unified command set protocol and interface spec to simplify platform integration efforts

"   The spec is currently at revision 1.0 and available to industry

"   Current DDR4 NVDIMMs are based on vendor specific command set

"   Transition to unified command set depends on industry standardization plans

16

Intel NVDIMM Protocol and Configuration Interface Specification

"   Hybrid DIMM TG (task group)

"   Universal I2C Command Set proposed at Sep’14 JEDEC meeting "   Physical interface for SAVE_n pin balloted (added to DDR4 RDIMM spec) "   I2C device address ballot pending "   Address space for NVDIMM controller under discussion "   Continue work on controller register address map for basic functionality and reporting/capabilities

"   SPD TG "   NVDIMM‐N

–  An adapted memory module consisting of DRAM made persistent through the use of Flash memory. No system accessible Flash beyond that needed for persistence functions.

"   NVDIMM‐P (tbd) –  An adapted memory module consisting of DRAM made persistent through the use of

Flash memory. Flash memory beyond that needed for persistence is accessible to the system controller as a block‐oriented mass storage device.

"   NVDIMM‐F (tbd) –  An adapted memory module consisting of Flash memory accessed by the memory

controller as a block‐oriented mass storage device 17

DDR4 NVDIMMs JEDEC Standardization Activities

Eliminate File System Latency with Memory Mapped Files

Application

File System

Disk Driver

Disk

Application

Persistent Memory

Load/Store

Memory Mapped Files

Traditional New

Use

r K

erne

l H

W

Use

r H

W

18

Disk-like NVDIMMs •  Appear as disk drives to applications •  Accessed using disk stack

Memory-like NVDIMMs •  Appear as memory to applications •  Applications store variables directly in RAM •  Memory-like NVDIMMs are a type of persistent memory

Application Access to NVDIMMS

The Business Value of NVDIMMs

Vanilla Solution "   Persistent data stored in HDD or SSD

tiers "   Slow & unpredictable software stack

NVDIMM Solution "   Persistent data stored in fast DRAM tier "   Removes software stack from data-path

Accelerates SW-Apps !

•  DRAM class latency & thru-put for

persistent data

–  1000X lower latency

–  10X+ thru-put increase

•  But, 10X lower capacity vs. SSD

Adds value to Applications - Lower Latency & Higher Performance

Kernel Module Simplification

RAID & Storage Tiering

Write Buffers Persistent Caches

Kernel Optimization

Transaction Logs

\\\

19

Next Steps

"   IO-Stack readiness is critical for NVDIMM adoption in datacenters

"   Use NVM programming model with NVDIMMS to enable a path forward for applications that leads to industry wide innovation in NVM optimized software. "   SNIA NVM TWG Programming Model (not APIs ) http://snia.org/forums/sssi/nvmp

"   Tune Open Source Persistent Block based IO-Stack

"   Support IO-Stack for higher performance - millions of IOPs

"   Develop Open Load/Store based PM IO stack "   Mimic familiar “Volatile” memory user interface

"   No software in Datapath -> Memory class latency & performance

"   Architect for NVM, Lean code – implement NVDIMM subset

"   “Stable” code for future NVM 20 LEAN INNOVATION

Think Big, Start Small & Learn Fast

PRESENTATION TITLE GOES HERE

Thank You!

Opens / AI / Close

Time: 4:45 – 5:00

Next call: Monday July 7, 2014 Speaker: Eden Kim, SSD Performance Comparison by Storage Class


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