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Soc Fpga Voip

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    Company Profile

    1

    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Introduction

    CARE (Center for Advanced Research in Engineering) Private Limited deals inSoftware Development and Electrical/Electronics/Computer Engineering withfocus on Communication Systems and Information Technology.

    The Company employs highly motivated IT professionals, engineers and scientist withdiverse technical experience in Large scale software design, DSP, Digital Chip Design, andCommunication Systems, making it one of the best rounded technical teams. CARE teamspecializes in design and development of Telecommunications, Data Communications, VoIPbased convergent networks and solutions. CARE core competencies include software design,algorithms development, architectures design for networks and communications systems

    and application-specific System onChip (SoC) design.

    CARE team members have developed software solutions and ASICs and board-level systemsolutions deployed in networks and communication products of high-profile Fortune 500companies.

    A world class team with 200+ man years experience in software and engineering projectdevelopment and management; CARE is strategically placed to be a very low cost hightechnology design house for offshore outsourcing.

    The team members have also implemented large complex real-time systems from concept tocompletion. Examples include the Electronic Toll Collection System for Lahore-IslamabadMotorway, 256 channels VoIP Media Processor SoC with all the software necessary to make ahigh performance Media Gateway for Avaz Networks and the Automatic Call DistributionSystem for Pakistan Telecommunication Limited

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Submit by Email

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    Company Profile

    2

    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    CARE Core Engineering Team

    Dr. Saeed-ur-Rehman: PhD in Electrical and Computer Engineering from Georgia Institute of Technology.He has 9 years experience in large scale multi processor and multi-boards embedded system designing,multiple RTOS, board layouts at Torrington, Enabling Technologies.

    M. Mohsin Rahmatullah: MSEE from Georgia Institute of Technology. He has 8+ years industry experiencein the field of ASIC Design, Multi-Processor SoC Design, Media Processor and Peripheral Interface Design,Wireless and Telecomm Algorithms Development from GTRI, AMD, TechTools, and Enabling Technologies.

    Dr. Aamer Iqbal Bhatti: PhD in Electrical Engineering from Leicester University. He has 5+ years experiencein Signal Processing, Modeling and Simulation, guidence and control system design at Ford Motor,Caterpillar and Enabling Technologies.

    Zaheer Ahmed: MS Computer Engineering from NUST. He has 12 years industry experience in Large-Scalesoftware designing for networks and realtime systems at various organizations. Area of expertise includedigital design, embedded and application software development and Network analysis.

    Hammad A. Khan: MSEE from Iowa State University. He has 6+ years experience in CommunicationSystems, Image and Signal Processing, Modem Design and DSP Optimization at Office of Naval Research USNavy, 3Com/ US Robotics and Enabling Technologies.

    Dr. Amir Qayyum: PhD in Mobile Networking from University of Paris-Sud, France. Active member of theMANET (Mobile Ad-hoc Network) group at IETF. He has 6+ years industry experience at CWO, INRIA Franceand Enabling Technologies for designing and developing networking protocols for wireless networks.

    Durdana Habib: MS Computer Engineering from NUST. 12 years of industry experience in the embeddedsystem design and DSP tools development at CTI and Enabling Technologies.

    Dr. Imtiaz Taj: PhD in Electrical Engineering from University of Hokkaido, Japan. 3 years of experience inmultimedia algorithm, software and system designing at University of Hokkaido and Enabling echnologies.

    Sheikh Farhan: MS Computer Engineering from NUST. 6+ years of experience in digital design, softwaredevelopment and applying quality assuran ce standards at Enabling Technologies.

    Dr.Muddassar Farooq: Received his Doctor of Science (DSc) degree from the University of Dortmund,Germany. He has more than 6 years of industrial research and development experience. He has served inthe German civil service and managed large scale projects including guarantee based energy efficientscheduler and agent-based protocol engineering for fixed telecommunication networks and MANETs.

    Dr. Farrukh Kamran :PhD in Electrical and Computer Engineering from GeorgiaInstitute of Technology. 11 years experience at companies like EGS, HiPo,Torrington, Silicon Power Corporation, Enabling Technologies. His area of expertise includes Applications and Network Software Design andPacket/Network Processor Design.

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Design Services

    CARE offers the following Design Services:

    Software Design ServicesPlatformsProcessorsApplicationEmbedded/Firmware

    Digital Hardware DesignFPGA BasedSoC

    ASICDSP Processor

    Security ProcessorNetwork Processor

    Media Processor

    EDA Tools

    System DesignMutlilayer BoardMultiple RTOSDevice Drivers

    Verification and Compliance Testing

    Digital Hardware VerificationSystem TestingSoftware Testing

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Design Services

    CARE Sspecializes in Voice/Data Communications software and applicationdevelopment

    Control Processing (Networking and Management)DSP Algorithms

    Code optimization

    PlatformsReal time operating systems (VxWorks, RTLinux, ThreadX)

    WindowsLinux

    Processors

    PentiumTI C54x, ADSP 21xx, 21xxxPower PC (PPC405GP)RISCARM

    Leverage the CARE advantage in areas including:

    Backend IT supportCode maintananceCall center solution

    Customer Relationship Managemente-learning, and more

    Software Design Services

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Design Services

    Application

    CARE offers the variety application software development solutions for VoIPbased products, Data Communication and Networking solutions. CARE team hasdeveloped IP V4 and IP V6 stack and signaling stacks for Carrier Class Media

    Gateway solutions and IP based migrateable video conferencing systems

    NetworkingInternet Protocol

    IP QoSRTP/RTCPRoHCTCPPPP/ML-PPP

    ATMUNI 3.1, 4.0AAL-1,-2,-5Traffic ShapingATM / IP / PSTN Interworking

    ManagementSNMP v1, v2, v3Embedded AgentManager & GUIMIB Integration Tools

    Software Design Services

    Packet TelephonySignaling

    SIPH.323H.248/MeGaCo

    ApplicationsSIP GatewaySIP Soft PhoneH.248 GatewayH.248 Soft Phone

    Control & Management FrameworkS/W Components Manager

    H/W Resources ManagerSNMP Agent

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Design Services

    Embedded/Firmware

    CARE offers the broadest line of proven embedded software developmentsolutions. The team has developed highly optimized embedded software for theG3 FAX, modem, speech codecs, video codecs, telephony, VoIP software. The

    CARE can custom design an embedded software solution for any off-the-shelf,general purpose, fixed or floating point processor or can map the algorithm onany proprietary DSP

    Audio CodecsG.711G.726G.729 A/B/EG.728G.723

    Wireless Codecs

    AMR, all ratesEFRGSM-FRGSM-HR

    FaxV.17V.27terV.29T.38T.30

    Software Design Services

    Line and Acoustic Echo Cancellation

    G.168 CompliantVAD, CNG, DTX

    Data and fax tone detectionDouble tone detection

    QAM Burst Modem

    Satellite Applications

    QAM Continuous Modem

    Up to 256 QAM

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Design Services

    FPGA Based

    At CARE we have a rich portfolio of designing FPGA-based systems from conceptto implementation. We have designed FPGA-based systems for Nortel Networks,NEC, STM wireless. Our complex real-time systems consist of micro-controller,digital signal processor and FPGA. We specialize in optimally partitioning the

    design into HW/SW modules. The HW modules are mapped as fully parallel,time-shared, or micro-coded state machines on FPGA.

    SoC

    CARE team has designed three highly complex SoCs for technologies ranging .18micron to .13 micron. CARE universal SoC platform can give a jump-start to anycomplex SoC design. The platform has SDRAM memory I/Os, DMA, CPU

    interfaces, HW embedded RTOS for multiprocessors, inter processorcommunication platform.

    ASIC

    CARE team specializes in mapping computationally intensive algorithms in HW.The team has experience in mapping algorithms as programmable processor

    with enough flexibility to map an entire family of these algorithm on thehardware.

    Viterbi decoder with puncturingReed Solomon encoder and decoderMulti channel DTMF generator and detectorAdaptive echo Canceller for VoIP applicationsSpeech Coders, G.711, G.729a, G.726

    Data modems, V.17

    Encryption, Decryption, Key exchange JPEG

    Motion estimation and compensationInterfaces for PCI/PCI-X, DDR memory, MIPS/ARM Processors, etc

    Digital Hardware Design

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    Company Profile

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    Center for Advanced Research inEngineering

    asicSoC

    telemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Design Services

    DSP Processor

    A traditional DSP comes with a fixed instruction set. The design is focused on traditional DSPapplications with basic DSP functionality of Multiply Accumulate (MAC) operation. The trend is to

    Digital Hardware Design

    design a Very Long Instruction Word (VLIW)instruction set and provide multiple MAC

    operations capabilities in the hardware.There is a range of processors available inthe market with these capabilities but theyonly suit to general class of applications asthey focused a broad range of applications.These processors are not optimized for

    specific applications and hence theperformance to cost ratio of the resultantsystems is not always optimal. CARE teamhas designed several application specificDSPs which outperform general purposeDSPs in performance and cost.

    Non-service affecting remote softwareupgrades

    Remote Debug and DevelopmentSleep unused resouces for low power

    consumption

    Advanced Integrated DevelopmentEnvironment

    Media Processor

    CARE team has designed and developed highest density Media Processor for Carrier ClassMedia Gateway Applications. The Media Processor provides:

    Three levels of parallelism for high-density and low-power media processing i.e.:Scheduler

    Media SwitchProcessing Engine

    Advanced memory management for high throughput Suportfor block-level and sample-by-sample processing

    Rich Media Instruction Set Architecture

    Dynamic swapping of software components at run timeFully programmable solution: LEC, Voice Encoder/Decoder, etc

    Software compatibilty at the API level for chip upgrades

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Design Services

    Digital Hardware Design

    Security Processor

    CARE team has experience in designing very high data rate IPSec processing components andcomplete HW/SW VPN solution. These components are easily pluggable in any networking orcomputing system as soft macros. These components off load the main processor from

    computationally intensive operations of IP security protocols. A list of these components are asfollows:

    Network Processor

    On-chip supported interfaces include:

    GMAC, POS-II, UTOPIA-II, TDMIO, PCI-X, DDR Memory InterfacesOn-chip Multiple RISC Cores and Cross Connect DMA

    Complete tool-suite for application software development including C Compiler, Bit-exacthardware simulator, hardware debugger through J-tag

    DES, 3DES and AES based Encryption/DecryptionDH, RSA and DSA based key generation

    Main and aggressive IKE modes implemented for RSASignatures, as well as RSA Private and Public Key

    generation methodsRemote user ID Authentication to protect against "Man

    in the Middle Attacks"

    SHA, MD5, RIPEMD-128/192, TIGER (with and withoutHMAC) based Authentication

    CARE team has designed and developed high throughput Network Processorand its peripherals. The salient features of the processor are the following:

    OC-3 rate Real Time Deep Packet Processing and OC-12 Aggregationand ForwardingQoS, Traffic Management and IP Sec with support for simultaneousconnections to ATM, IP, TDM, and back-plane switching fabric

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    Company Profile

    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    IPs

    HardwareGigaBit MACPOS/UTOPIARISC InterfacesMemory Interfaces

    PCI Host BridgeHardware RTOSApplications Specific Processor Cores

    Encryption and Authentication

    Software

    Speech Codes on T1 ,ADI, DSPs, Star CoreOptimized Video Codes on ARM, MIPS, Pentium Processors

    H.323, SIP, Signalling Software

    Optimized RTP, UDP, TCP/IP Stack for IPV4 and IPV6OLSR Implementation for Ad-hoc Networks

    11

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Products

    The Fax-to-Serial converter provides an interface between PSTN line (COInterface), regular fax machine and Motorola Secra Phone, SecTel9600. It hasthree RJ11 ports and one serial port. The serial port is connected to the SecraPhone to transmit and receive the digital fax data to and from the Secra Phone.The three RJ11 ports are used to connect the PSTN line, the fax machine and

    Secra Phone.

    G3 Fax Interface for Motorola SecTel9600

    The Universal Security Box is a low cost solution providing clear secure voiceand data transmission using existing analog POTS line. The device

    incorporates AES algorithm for encryption, proprietary speech encoding andGroup3 fax protocols through built-in dial up modem. The device's small and

    Universal Security Box

    Rectification of scanned mapsAn Image rectification procedure for image to map registration

    Performance optimized Stereo matching algorithms for "correspondence problem"Elevation computations using disparity measures

    DEM Generation in regular and triangular gridsProprietary DTM Error estimation and correction

    Display of graphical representation of terrain and heights

    3D Digital Terrain Model Generator

    lightweight design along with a single push button on/off option makes it ideal for office, banksand enterprise use. The product supports the following features:

    Clear and secure voice with Low bit rate speech encodingData and voice EncryptionDialup secure modemSecure Group3 fax

    Software up-grade capabilityDevice status LED

    Digital Terrain Model representing land surface point elevations acceptsstereo image data in various input formats and output Terrain model withelevation and their related data layers. Generation of Digital terrain modelcomprises of the following major algorithms:

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodelingEDA

    testing

    Sir Syed Memorial Building | 19 - Ataturk Avenue | G-5/1 Islamabad | T.+92.51.287-4115 / 4794 | F.+92.51..287-4614 | www.carepvtltd.com

    Products

    An Intelligent Network based application that provides service provider IVR serversand switching gateways along with software to manage and record the transactions.Among various functions of the software applications are:

    Generation of calling card number seriesActivation of these cards once the cards reach the final sales outlets

    Network management

    Calling Card Gateway

    Low-cost voice communication infrastructure along with Internet connectivity forthe distant rural areas with the following features:

    Scalability [100 - 500] linesTelephony connectivity, as well as connectivity to the global IP network

    Remote Configuration and Management

    Modularity, capable of connectivity to a variety of access networksAdaptability to the local harsh operating environment

    Flexibility for future feature upgradesRemote Billing

    IP Enabled Exchange

    PCM/FM based telemetry subsystem capable of supporting up to 2 Mbps data-ratewith the following salient features:

    Turbo Codes Used for forward error correction (FEC) for channel impairmentsAES Data Encryption for enhanced security level

    PCM/FM modulationInterface to RF module

    Can be used as Standalone System

    Adhoc Network based communication soluti on underlying the following features:

    Integrated mobile and land link network designMesh Network Architecture

    Robustness and RedundancyRemote ConfigurationSelf Diagnostics and Self Healing

    High Data Rate Industrial Telemetry Modem

    Intelligent Routers for Mobile Wireless Ad-hoc Networks

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    Company Profile

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    Center for Advanced Research inEngineering

    asic SoCtelemetry

    fpga VoIPmodeling

    EDAtesting

    Products

    More than hundred toll collection positions networked together over a distance of 400 Km. Each vehicle entering the tollway (motorway) is dispensed with a magneticticket at the entry booth that bears information about the vehicle, location and timeand date. When leaving the tollway, the same ticket is read by a magnetic readerand the information is processed to generate the toll amount. Once the motoristpays toll, a receipt is printed and barrier is lifted allowing the motorist to passthrough.

    At each exit loction, a local network and database server, polls the booth machinesand collects transaction data. This is entered into a local database which is,synchronized with data from all the other Exits distributed along the tollway. A 64kbits per second radio data link connects all the locations in real time.

    The project was conceived as a functional prototype in less than a month time andwas installed and made operational in three months time after signing of thecontract.

    Toll Collection System


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