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CONTACT PERSON REFERENCES GRAPHENE WAFER SCALE INTEGRATION Sha LI 1 , Zhenxing WANG 1 , Oihana TXOPERENA 2 , Mark ALLEN 3 , Yinglin LIU 3 , Ashley RUSHTON 3 , Alexander BESSONOV 3 , Sami KALLIOINEN 4 , Salla KALAJA 4 , Chris BOWER 3 , Tapani RYHANEN 4 , Amaia ZURUTUZA 2 , Max C. LEMME 1,5 , Daniel NEUMAIER 1,6 1 AMO GmbH, Advanced Microelectronic Center Aachen, Otto-Blumenthal-Straße 25, 52074 Aachen, Germany; 2 Graphenea, Paseo Mikeletegi 83, 20009, San Sebastián, Spain ; 3 Emberion Limited, 151, Cambridge Science Park, Milton Road, Cambridge CB4 0GN, United Kingdom; 4 Emberion Oy, Metsänneidonkuja 8, 02130 Espoo, Finland ; 5 Faculty of Electrical Engineering and Information Technology, Chair of Electronic Devices, RWTH Aachen University, Otto-Blumenthal-Str. 2, 52074 Aachen, Germany; 6 School of Electrical, Information and Media Engineering, University of Wuppertal, Campus Freudenberg, Lise-Meitner-Str. 13, 42119 Wuppertal, Germany Challenges Solution: Graphene Fabrication Technology on 150 mm Wafer Platform Graphene has allowed prototyping devices with exceptional performances and potentially huge impact in electronics, photonics and sensor technology. The next big challenge is the wafer-scale integration, as success in real-world applications requires not only outstanding performance at the single-device level but also, large-scale fabrication processes.[1,2] Goals Set up required process modules on a wafer scale platform including encapsulation, contacting and patterning. Define a quality control protocol and ensure batch to batch reproducibility. Manufacture of needed units for the graphene imager product development and validation. [1] G. Fiori et al., Nat. Nanotechnol., 9 (2014) 768–779. [2] D. Neumaier, S. Pindl, M. C. Lemme, Nat. Mat., 18 (2019) 525–529. Successful integration of graphene fabrication technology on 150 mm silicon wafer platform as a needed unit for a new graphene imager product Good batch-to-batch reproducibility, using semi-dry (wafer 1) and wet (wafer 2) transfer methods high device yield of 98% Mobility: 800-1000 cm2/Vs Promising for introduction of high-performing graphene-on-wafer at competitive cost, accelerating innovation for advanced 2DM-based electronics Graphene Wafer Scale Integration Platform * 150 mm proof * 200 mm scale-up compatible Large Scale Growth and Transfer Graphene Foundry Process, including Patterning, Contacting, Encapsulation Imager Functionalisation Funded by the European Union’s Horizon 2020 research and innovation program G-Imager under grant agreement No. 820591. Results: 150 mm Wafer Statistics of Local Back-gated Graphene FETs Sha Li AMO GmbH Aachen, Germany li @amo.de Non-working 2% Working 98% Wafer 1 Non-working Working 433/440 = 98.4% Gate leakage (Igate > 100 nA): 4 No contact (Ichannel < 100 nA): 6 Channel short (Ichannel > 5mA): 0 No modulation (< 10%): 4 Non-working 3% Working 97% Wafer 2 Non-working Working 394/404 = 97.5% Gate leakage (I gate > 100 nA): 3 No contact (I channel < 100 nA): 9 Channel short (I channel > 5mA): 0 No modulation (< 10%): 1 0 1 2 3 4 5 6 Vdirac@forward scan (V) Vdirac@backward scan (V) Vdirac (V) DIRAC POINT AND HYSTERESIS 0 5 10 15 20 Rc*W (k*μm) Rsheet (k/) RESISTANCE Wafer 1 Wafer 2 Wafer 1 Wafer 2
Transcript
Page 1: Solution: Graphene Fabrication Technology on 150 mm Wafer ...phantomsfoundation.com/ONLINE/GrapheneIF/Posters/GrapheneIF_Li_Sha_269.pdf[1] G. Fiori et al., Nat. Nanotechnol., 9 (2014)

CONTACT PERSON REFERENCES

GRAPHENE WAFER SCALE INTEGRATION

Sha LI1, Zhenxing WANG1, Oihana TXOPERENA2, Mark ALLEN3, Yinglin LIU3, Ashley RUSHTON3, Alexander BESSONOV3, Sami KALLIOINEN4, Salla KALAJA4, Chris BOWER3, Tapani RYHANEN4, Amaia ZURUTUZA2, Max C. LEMME1,5, Daniel NEUMAIER1,6

1 AMO GmbH, Advanced Microelectronic Center Aachen, Otto-Blumenthal-Straße 25, 52074 Aachen, Germany; 2 Graphenea, Paseo Mikeletegi 83, 20009, San Sebastián, Spain; 3 Emberion Limited, 151, Cambridge Science Park, Milton Road, Cambridge CB4 0GN, United Kingdom; 4 Emberion Oy, Metsänneidonkuja 8, 02130 Espoo, Finland;5 Faculty of Electrical Engineering and Information Technology, Chair of Electronic Devices, RWTH Aachen

University, Otto-Blumenthal-Str. 2, 52074 Aachen, Germany; 6 School of Electrical, Information and Media Engineering, University of Wuppertal, Campus Freudenberg, Lise-Meitner-Str. 13, 42119 Wuppertal, Germany

Challenges

Solution: Graphene Fabrication Technology on 150 mm Wafer Platform

Graphene has allowed prototyping devices with exceptional performances

and potentially huge impact in electronics, photonics and sensor

technology. The next big challenge is the wafer-scale integration, as

success in real-world applications requires not only outstanding

performance at the single-device level but also, large-scale fabrication

processes.[1,2]

Goals Set up required process modules on a wafer scale platform including

encapsulation, contacting and patterning.

Define a quality control protocol and ensure batch to batch reproducibility.

Manufacture of needed units for the graphene imager product

development and validation.

[1] G. Fiori et al., Nat. Nanotechnol., 9 (2014) 768–779.

[2] D. Neumaier, S. Pindl, M. C. Lemme, Nat. Mat., 18 (2019) 525–529.

Successful integration of graphene fabrication technology on 150 mm silicon wafer platform as a

needed unit for a new graphene imager product

Good batch-to-batch reproducibility, using semi-dry (wafer 1) and wet (wafer 2) transfer methods

high device yield of 98%

Mobility: 800-1000 cm2/Vs

Promising for introduction of high-performing graphene-on-wafer at competitive cost,

accelerating innovation for advanced 2DM-based electronics

Graphene Wafer Scale Integration Platform

* 150 mm proof

* 200 mm scale-up compatible

Large Scale Growth and Transfer

Graphene Foundry Process, including Patterning, Contacting, Encapsulation

Imager Functionalisation

Funded by the European Union’s Horizon 2020 research and innovation program G-Imager under grant agreement No. 820591.

Results: 150 mm Wafer Statistics of Local Back-gated Graphene FETs

Sha LiAMO GmbHAachen, [email protected]

Non-working2%

Working98%

Wafer 1

Non-working Working

433/440 = 98.4%Gate leakage (Igate > 100 nA): 4

No contact (Ichannel < 100 nA): 6

Channel short (Ichannel > 5mA): 0

No modulation (< 10%): 4

Non-working3%

Working97%

Wafer 2

Non-working Working

394/404 = 97.5%Gate leakage (Igate > 100 nA): 3

No contact (Ichannel < 100 nA): 9

Channel short (Ichannel > 5mA): 0

No modulation (< 10%): 1

0

1

2

3

4

5

6

Vdirac@forwardscan (V)

Vdirac@backwardscan (V)

∆Vdirac (V)

DIRAC POINT AND HYSTERESIS

Datenreihen1 Datenreihen2

0

5

10

15

20

Rc*W (kΩ*µm) Rsheet (kΩ/)

RESISTANCE

Datenreihen1 Datenreihen2Wafer 1 Wafer 2 Wafer 1 Wafer 2

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