SPICE MODEL of TPCP8J01 (Standard+BDS+BRT Model) in SPICE PARK

All Rights Reserved Copyright (c) Bee Technologies Inc. 2006

- 1 -

Device Modeling Report

Bee Technologies Inc.

COMPONENTS: Power MOSFET (Model Parameter) PART NUMBER: TPCP8J01 MANUFACTURER: TOSHIBA REMARK: Body Diode (Parameter) / ESD Protection Diode and BRT Model


- 2 -

Circuit Configuration

MOSFET MODEL

PSpice model parameter

Model description

LEVEL

L Channel Length

W Channel Width

KP Transconductance

RS Source Ohmic Resistance

RD Ohmic Drain Resistance

VTO Zero-bias Threshold Voltage

RDS Drain-Source Shunt Resistance

TOX Gate Oxide Thickness

CGSO Zero-bias Gate-Source Capacitance

CGDO Zero-bias Gate-Drain Capacitance

CBD Zero-bias Bulk-Drain Junction Capacitance

MJ Bulk Junction Grading Coefficient

PB Bulk Junction Potential

FC Bulk Junction Forward-bias Capacitance Coefficient

RG Gate Ohmic Resistance

IS Bulk Junction Saturation Current

N Bulk Junction Emission Coefficient

RB Bulk Series Resistance

PHI Surface Inversion Potential

GAMMA Body-effect Parameter

DELTA Width effect on Threshold Voltage

ETA Static Feedback on Threshold Voltage

THETA Modility Modulation

KAPPA Saturation Field Factor

VMAX Maximum Drift Velocity of Carriers

XJ Metallurgical Junction Depth

UO Surface Mobility

7

42 3

68 5

TPCP8J01

1


- 3 -

1

10

100

0.1 1 10

ID (-A)

Gfs

(-S

)

Measurement

Simulation

Transconductance Characteristic

Circuit Simulation Result

Comparison table

Id(-A) Gfs(-s)

Error(%) Measurement Simulation

0.5 4.348 4.505 3.599

1 6.250 6.289 0.629

2 8.696 8.658 -0.437

5 13.333 13.055 -2.086


- 4 -

VDS10Vdc

0

0

VD_Sense

0Vdc

U10TPCP8J01

0

VGS

V_VGS

0V -1.0V -2.0V -3.0V -4.0V -5.0V

I(VD_Sense)

0A

-2A

-4A

-6A

-8A

-10A

Vgs-Id Characteristic

Circuit Simulation result

Evaluation circuit


- 5 -

0

2

4

6

8

10

0.000 1.000 2.000 3.000 4.000 5.000

Gate-source voltage VGS (-V)

Dra

in c

urr

en

t ID

(-A

)

Measurement

Simulation

Comparison Graph Circuit Simulation Result

Simulation Result

ID(-A) VGS(-V)

Error (%) Measurement Simulation

0.5 2.070 2.042 -0.028

1 2.170 2.137 -0.033

2 2.280 2.273 -0.007

5 2.530 2.554 0.024

10 2.900 2.887 -0.013


- 6 -

0

U10TPCP8J01

0

VD_Sense

0Vdc

0

VDS10Vdc

VGS

V_VDS

0V -50mV -100mV -150mV -200mV -250mV

I(VD_Sense)

0A

-1.0A

-2.0A

-3.0A

Rds(on) Characteristic


Evaluation circuit

Simulation Result

ID=-3.0A, VGS=-10V Measurement Simulation Error (%)

RDS (on) 27 m 37 m 0.00


- 7 -

-

+

W1

ION = 0uAIOFF = 1mAW

0

I25.5

I1

TD = 0

TF = 10nPW = 600uPER = 1000u

I1 = 0

I2 = 1m

TR = 10nV1

-24

D2Dbreak

U10TPCP8J01

Time*-1mA

0 -10n -20n -30n -40n -50n

V(W1:4)

0V

-4V

-8V

-12V

-16V

Gate Charge Characteristic


Evaluation circuit

Simulation Result

VDD=-24V,ID=-5.5A ,VGS=-10V

Measurement Simulation Error (%)

Qgs 5.000 nC 5.000 nC 0.00

Qgd 6.500 nC 6.480 nC -0.308

Qg 33.000 nC 26.610 nC -19.364


- 8 -

Capacitance Characteristic

Simulation Result

VDS(-V) Cbd(nF)

Error(%) Measurement Simulation

0.5 100.00 99.05 -0.95

1 70.00 71.30 1.86

2 47.00 47.67 1.43

5 27.00 26.47 -1.96

10 17.00 16.20 -4.71

Simulation

Measurement


- 9 -

0

U10TPCP8J01

RG

4.7

L250nH

R1

4.7

R25

V2TD = 2u

TF = 1nPW = 10uPER = 2000u

V1 = 0

TR = 1n

V2 = 20

L1

30nH

V1-15Vdc

Time

1.95us 2.00us 2.05us 2.10us

V(L1:2) V(L2:1)/1.5

0V

-2V

-4V

-6V

-8V

-10V

-12V

Switching Time Characteristic


Evaluation circuit

Simulation Result

ID=-3.0A, VDD=-15V VGS=0/10V

Measurement Simulation Error(%)

ton 12.000 ns 12.001 ns 0.008


- 10 -

VGS

U10TPCP8J01

0

VDS10Vdc

0

0

VD_Sense

0Vdc

V_VDS

0V -1.0V -2.0V -3.0V -4.0V -5.0V

I(VD_Sense)

0A

-2A

-4A

-6A

-8A

-10A

Output Characteristic


Evaluation circuit

VGS=-2.1V

-2.4V

-2.2V

-2.3V

-10V

-4.5V -3.5V

-3V

-2.6V

-2.5V

-2.7V

-2.8V


- 11 -

VD_Sense

0Vdc

0

U10TPCP8J01

VDS10Vdc

0

V_VDS

0V 0.4V 0.8V 1.2V 1.6V 2.0V

I(VD_Sense)

1.0A

10A

100A

BODY DIODE SPICE MODEL Forward Current Characteristic


Evaluation Circuit


- 12 -

1

10

100

0 0.4 0.8 1.2 1.6 2

Drain-source voltage

IDR

(-A

)Measurement

Simulation


Simulation Result

IDR(-A) VDS(V)

%Error Measurement Simulation

1 0.720 0.720 0.05

2 0.760 0.761 0.07

5 0.830 0.827 -0.39

10 0.895 0.898 0.37

20 1.010 1.009 -0.08


- 13 -

0

U10TPCP8J01 V1

TD = 30n

TF = 5.7nsPW = 1us

PER = 100us

V1 = -9.4v

TR = 10ns

V2 = 10.6v

R1

50

0

Time

0.98us 1.02us 1.06us 1.10us 1.14us 1.18us

I(R1)

-400mA

-300mA

-200mA

-100mA

-0mA

100mA

200mA

300mA

400mA

Reverse Recovery Characteristic Circuit Simulation Result

Evaluation Circuit

Compare Measurement vs. Simulation

Measurement Simulation Error (%)

trj 10.8 ns 10.71 ns 0.83

trb 18.0 ns 32.16 ns 78.67

trr 28.8 ns 42.87 ns 48.85


- 14 -

Reverse Recovery Characteristic Reference

Trj=10.8(ns) Trb=18(ns) Conditions:Ifwd=lrev=0.2(A),Rl=50

Relation between trj and trb

Example


- 15 -

V110Vdc

R2 100MEG

0

0

U10TPCP8J01

R1

0.01m

0

V_V1

0V 5V 10V 15V 20V 25V 30V 35V 40V 45V 50V

I(R1)

0A

1mA

2mA

3mA

4mA

5mA

6mA

7mA

8mA

9mA

10mA

ESD PROTECTION DIODE SPICE MODEL Zener Voltage Characteristic


Evaluation Circuit


- 16 -

Zener Voltage Characteristic Reference


- 17 -

V_V_IN

100mV 1.0V 10V 100V

I(VC_sense)

1.0mA

10mA

300uA

60mA

BRT Model Input Voltage vs. Output Current (ON Characteristic)


Evaluation Circuit

U1TPCP8J01

0

V_OUT0.2Vdc

OUT

0 00

VC_sense

V_IN0Vdc


- 18 -

0.1

1

10

100

0.1 1 10

INPUT VOLTAGE Vi(on) (V)

CO

LL

EC

TO

R C

UR

RE

NT

IC

(m

A)

Measurement

Simulation


Simulation Result

Ic (mA) VI_ON (V)


0.5 0.76 0.767 0.92

1 0.79 0.803 1.65

2 0.82 0.851 3.78

5 0.93 0.964 3.66

10 1.16 1.1686 0.74

20 2.05 1.9513 -4.81


- 19 -

V_V_IN

0V 0.2V 0.4V 0.6V 0.8V 1.0V 1.2V 1.4V 1.6V

I(VC_sense)

100uA

1.0mA

30uA

3.0mA

Input Voltage vs. Output Current (OFF Characteristic)


Evaluation Circuit

V_IN0Vdc

VC_sense

OUT

00 0

U1TPCP8J01

V_OUT5Vdc

0


- 20 -

10

100

1000

10000

0.1 1 10

INPUT VOLTAGE Vi(on) (V)

CO

LL

EC

TO

R C

UR

RE

NT

IC

(m

A)

Measurement

Simulation


Simulation Result

Ic (uA) VI_OFF (V)


50 0.667 0.675 1.20

100 0.688 0.696 1.16

200 0.71 0.719 1.27

500 0.745 0.75 0.67

1000 0.785 0.777 -1.02

2000 0.83 0.81 -2.41


- 21 -

I(VC_sense)

1.0mA 10mA 100mA

I(VC_sense)/I_IB

100

1.0K

30

DC Current Gain vs. Output Current


Evaluation Circuit

0 00

VCE5Vdc

VC_sense

U1TPCP8J01

0

IB0Adc


- 22 -

10

100

1000

0.001 0.01 0.1

COLLECTOR CURRENT IC (mA)

DC

CU

RR

EN

T G

AIN

hF

E

Measurement

Simulation


Simulation Result

Condition @ Vce=5V

Ic (mA) VI_ON (V)


0.001 67 65.033 -2.94

0.002 115 116.13 0.98

0.005 215 225.137 4.71

0.01 315 329.235 4.52

0.02 415 419.664 1.12

0.05 450 433.677 -3.63


- 23 -

I_IC

1.0mA 10mA 100mA

V(OUT)

10mV

100mV

1.0V

DC Current Gain vs. Output Current


Evaluation Circuit

OUT

0

0

F1

FGAIN = 0.05 0

IC

0Adc

VC_sense

0

U1TPCP8J01


- 24 -

0.01

0.1

1

0.001 0.01 0.1

Ic (A)

Vce(s

at)

(V

)

Measurement

Simulation


Simulation Result

Condition @ Ic/Ib = 20

Ic (mA) VI_ON (V)


0.001 0.084 0.0864 2.86

0.002 0.073 0.0702 -3.84

0.005 0.067 0.0657 -1.98

0.01 0.078 0.0793 1.67

0.02 0.125 0.1194 -4.48

0.05 0.252 0.2604 3.33

Date post:	15-Jun-2015
Category:	Technology
Upload:	tsuyoshi-horigome
View:	308 times
Download:	1 times

SPICE MODEL of TPCP8J01 (Standard+BDS+BRT Model) in SPICE PARK

Technology