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Spring 2004EE4272
Direct Link Networks (I)
Hardware Building Blocks (nodes & links) 5 Issues before Exchanging Packets
EncodingFramingError DetectionReliable TransmissionMedial Access Control
Spring 2004EE4272
Hardware Building Blocks: Nodes Assume general-purpose (programmable) computers;
e.g., . Sometimes replaced with special- purpose hardware.
Finite memory (implies limited buffer space) Connects to network via a . Fast processor, slow memory (bottleneck of computer)
Spring 2004EE4272
Category 5 twisted pair 10-100Mbps, 100m50-ohm coax (ThinNet) 10-100Mbps, 200m75-ohm coax (ThickNet) 10-100Mbps, 500mMultimode fiber 100Mbps, 2kmSingle-mode fiber 100-2400Mbps, 40km
Service to ask for Bandwidth you getISDN 64 KbpsT1 1.544 MbpsT3 44.736 MbpsSTS-1 51.840 MbpsSTS-3 155.250 MbpsSTS-12 622.080 MbpsSTS-24 1.244160 GbpsSTS-48 2.488320 Gbps
Hardware Building Blocks: Links Sometimes you install your own
Sometimes leased from the phone company
Reading Assignment: P67-P75
Spring 2004EE4272
Encoding propagate over a physical medium
modulate electromagnetic waves e.g., vary voltage
Spring 2004EE4272
Encoding (Cont): NRZ Encode binary data onto signals
e.g., 0 as low signal and 1 as high signal known as Non-Return to zero (NRZ)
Problem of NRZ code: . Low signal (0) may be interpreted as no signal High signal (1) leads to . Unable to recover .
Bits
NRZ
0 0 1 0 1 1 1 1 0 1 0 0 0 0 1 0
Spring 2004EE4272
Alternatives: NRZI and Manchester Non-return to Zero Inverted (NRZI):
Make a transition from the current signal to encode a 1, and stay at the current signal to encode a 0; .
Manchester: Transmits the XOR of the encoded data and the clock; only 50%
efficient (baud rate=modulation rate).
Bits
NRZ
Clock
Manchester
NRZI
0 0 1 0 1 1 1 1 0 1 0 0 0 0 1 0
Spring 2004EE4272
4B/5B Encoding every 4 bits of data encoded in a code
5-bit codes selected to have no more than one leading 0 and no more than two trailing 0s
thus, never get more than .
resulting 5-bit codes are transmitted using .
achieves 80% efficiency
Spring 2004EE4272
Frames
Bits
Node A Node BAdaptor Adaptor
Framing Break sequence of bits into a . Typically implemented by network .
Spring 2004EE4272
Header Body
8 16 16 8
CRCBeginningsequence
Endingsequence
Framing Approaches: determine where the frame begins & ends
Sentinel-baseddelineate frame with special pattern: 01111110e.g., HDLC, SDLC, PPP
problem: special pattern appears in the payloadsolution: .
sender: insert 0 after five consecutive 1s receiver: delete 0 that follows five consecutive 1s
if next bits are 10: end-of-frame marker if next bits are 11: error
Spring 2004EE4272
SY
N
Header Body
8 8 4214 168
SY
N
Cla
ss CRCCount
Framing Approaches (cont) Counter-based
include payload length in headere.g., DDCMP
problem: .solution: catch when CRC fails
Spring 2004EE4272
Overhead Payload
90 columns
9 rows
STS-1Hdr STS-1Hdr STS-1Hdr
STS-3cHdr
Framing Approaches (cont) Clock-based
each frame is longe.g., SONET: Synchronous Optical NetworkSTS-n (STS-1 = )
Spring 2004EE4272
Error Detection: Internet Checksum Algorithm
Basic Idea: Add up all the words that are transmitted and then
transmit the result of that with the data. The receiver the same way and the result with the received data.
One of the implementations: view message as a . Add these
integers together using 16-bit , and then take the ones complement of the result. That 16-bit number is the .
Spring 2004EE4272
Cyclic Redundancy Check Theoretical Foundation: a branch of mathematics
called .
Add k bits of redundant data to an n-bit . want k << n e.g., k = 32 and n = 12,000 (1500 bytes)
Represent n-bit message as n-1 degree . e.g., MSG=10011010 as M(x) = x7 + x4 + x3 + x1
Let k be the degree of some . e.g., C(x) = x3 + x2 + 1
Spring 2004EE4272
CRC (cont) Transmit polynomial P(x) that is by
C(x) shift left k bits ( k is the degree of C(x) ), i.e., M(x).k subtract remainder of M(x).k/C(x) from M(x).k
Receiver polynomial P(x) + . E(x) = 0 implies no errors
Divide (P(x) + E(x)) by C(x); remainder zero if: E(x) was ,or E(x) is exactly by C(x)
Spring 2004EE4272
Selecting C(x) All single-bit errors, as long as the xk and x0 terms have .
All , as long as C(x) contains a factor with at least .
Any , as long as C(x) contains the factor (x + 1)
Any error (i.e., sequence of consecutive error bits) for which the length of the burst is less than k bits.
Most burst errors of larger than k bits can also be detected
See Table 2.5 on page 96 for common C(x)
Spring 2004EE4272
Reliable Transmission Recover from Corrupt Frames
;also called Forward Error Correction (FEC)
and Timeouts; also called Automatic Repeat Request (ARQ)
Sender Receiver
Tim
eout
Tim
e
Sender Receiver
Tim
eout
Tim
eout
Sender Receiver
Tim
eout
Tim
eout
Sender Receiver
Tim
eout
Tim
eout
(a) (c)
(b) (d)
Spring 2004EE4272
Stop-and-Wait
Problem: only one at a time (one frame per RTT) can not keep the pipe full
Example 1.5Mbps link x 45ms RTT = 67.5Kb (8KB) (delay X bandwidth
product) 1KB frames implies 1/8th link utilization
Sender Receiver
Spring 2004EE4272
Sliding Window
Sender Receiver
Tim
e
……
123
…
N
Basic Idea: Allow sender to transmit before
receiving an , thereby keeping the pipe full. There is an upper limit (called ) on the number of (un-ACKed) frames allowed.
Spring 2004EE4272
SW: Sender Assign sequence number to each frame (SeqNum) Maintain three state variables:
send window size (SWS) sequence # of last acknowledgment received (LAR) sequence # of last frame sent (LFS)
Maintain invariant: LFS - LAR <= SWS at all time
Advance/update LAR when ACK arrives to allow a new frame be sent
Buffer up to SWS frames for retransmission if needed
SWS
LAR LFS
… …
Spring 2004EE4272
SW: Receiver Maintain three state variables
(RWS): upper bound on the # of out-of-order frames
sequence # of (LAF) sequence # of (LFR)
Maintain invariant: LAF - LFR <= RWS
Frame arrives: if LFR < SeqNum < = LAF accept if SeqNum < = LFR or SeqNum > LFA discarded
Mechanism of Sending cumulative . LFR = SeqNumtoAck LAF = LFR + RWS
RWS
LFR LAF
… …
Spring 2004EE4272
SeqNum field is ; sequence numbers wrap around (reuse)
Sequence number space must be than number of outstanding frames
SWS <= MaxSeqNum-1 is not sufficient suppose 3-bit SeqNum field (0..7) SWS=RWS=7 sender transmit frames 0..6 arrive successfully, but ACKs lost sender retransmits 0..6 receiver expecting 7,0..5, but receives second incarnation of 0..5
SWS < (MaxSeqNum+1)/2 is correct rule when .
Sequence Number Space