System level ESD protection overview

STMicroelectronics

Mathieu ROUVIERE

System & Application Engineering

Mohamed SAADNA

Product Marketing

January, 19th 2017

What is ESD (Electro Static Discharge) ?

• ESD is an everyday, every everywhere concern

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Source: https://www.esda.org/about-esd/esd-fundamentals/part-1-an-introduction-to-esd/

Why should I care about ESD ?

• Example of physical degradations induced by ESD on integrated circuit :

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• Oxide punch-through • Junction damage • Metallization damage

Any electronics board must be protected

STMicroelectronics 3D-printer board protection example

• Protections on STEVAL-3DP001V1 :

• Power lines → surge protection : IEC 61000-4-5

• Connector

• Button

• SD card

• Integrated on all IC’s → ESD protection for manufacturing : JEDEC HBM

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SMAJ12A

SMBJ24A

EMIF06-MSD02N16

3x USBLC6-2SC6

ESDA5V3L

http://www.st.com/content/st_com/en/products/evaluation-tools/solution-evaluation-tools/computer-and-

peripherals-solution-eval-boards/steval-3dp001v1.html

ESD protection for system : IEC 61000-4-2

ESD protection

STMicroelectronics 3D-printer board protection example

• Layout recommendations on application note AN1751:

• ESD protections must be placed closest to the ESD source

• Tracks design must minimize residual inductive effects

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0

0

0

x3

Why ESD external protection ?

• IEC 61000-4-2 is not HBM (and both responses are not correlated)

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Human Body Model for IC IEC 61000-4-2 for system

IC most of the time : +/- 2 kVComplete system :

+/- 8 kV Contact discharge+/- 15 kV Air discharge

8kV

ESD protections are mandatory

to comply with regulations

• EN 55024 : Specification Title: Information technology equipment -

Immunity characteristics - Limits and methods of measurement.

• ISO 10605 : Road vehicles — Test methods for electrical disturbances

from electrostatic discharge

• EUROCAE ED-14 /RTCA DO-160 : Environmental Conditions and

Test Procedure for Airborne Equipment. Section 25: Electrostatic

Discharge.

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System-level ESD protection standard

IEC 61000-4-2 test bench8

Contact

discharge

Air

discharge

Stress Level Test Voltage

(kV)

Test Voltage

(kV)

Number of

discharge

1 2 4

At least 10

single

discharges

in the most

sensitive

polarity

2 4 6

3 6 8

4 8 15

System state as a result of system–level ESD stress

A Normal performance

B

Temporary loss of function or degradation of performance which cease after

the disturbance ceases. The DUT recover its normal performance , without

operator intervention

C Temporary loss of function or degradation of performance , the correction of

which requires operator intervention

D loss of function or degradation of performance, no recovery possible

Self-restored

Require a system

reset

Video 9

ESDA7P60-1U1M 8kV ESD response 10

Peak voltage = 25.4V

30ns voltage = 7.7V

Basic of ESD protection choice

Basic of protection choice: question related to

1. Is signal positive and negative?

• Yes bidirectional protection

• No unidirectional protection

2. Maximum signal voltage < protection stand-off voltage

3. Signal frequency / rise time < protection cut-off frequency

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1. Protection robustness

2. Package in line with assembly PCB rules

SIGNAL TO BE PROTECTED

BOARD TO BE PROTECTED

Basics of ESD / EOS protection choice:voltage polarity

• Two kind of characteristics: Unidirectional and Bidirectional

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VCL VCL

-VCL

-VF

• Mandatory for audio signals

• Limit harmonics generation if RF coupling on the protected line• Better reverse protection

Basics of ESD / EOS protection choice:working voltage

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Example of HSP061-4NY8:

3V

100nA

6V

1mA

Basics of ESD / EOS protection choice:Capacitance value, cut-off frequency

• Over frequency, a protection can be basically

modeled by a capacitor

• Analog signal :

• S21 attenuation in accordance with system output power

• Digital signal :

• Fc = 1

π trwith Fc : cutoff frequency and tr : rise time

• And keep in mind that protection must be

transparent

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ESDALC6V1-1U2 (C=12pF) S21

Basics of ESD / EOS protection choice:Package

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• Various package are available

• They must be chosen in accordance with PCB rules

SOD323

SOD523

WLCSP

0201 - 01005

QFN

Single line

µQFN-16L

µQFN-10L

µQFN-6L

µQFN-4L

Multi line

Example with µQFN

ESD protection matching with IC

Transmission Line Pulse:

System-Efficient ESD Design

• Transmission Line Pulse: dynamic ESD response to match external ESD

protection to internal ESD protection of IC to protect

• 3 theoretical cases:

• External ESD protection protects the IC (1)

• External ESD protection protects the IC and

shares the current with internal ESD protection of IC to protect (2)

• External ESD protection is not efficient alone (3)

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Current (A)

Voltage (V)

Failure

Transmission Line Pulse:System-Efficient ESD Design with an external resistor

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• Co-design of protection + IC protection is sometimes mandatory to optimize the overall

system robustness

• Resistor between IC and protection is also a degree of freedom

(if allowed by application)

Co-development of protection for ASIC example

TLP responses

For ESD protection selection, go to :

http://www.st.com/tvs-smartselector

ESD PROTECTION FOR

ESDA15P60-1U1M

EMIF06-MSD02N16 EMIF08-LCD04M16

ECMF04-4HSWM10

EMIF02-SPK03F2

ESDALC6V1-1U2

ECMF2-0730V12M12

Thanks !