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Status of Electronics & Control System P J Smith University of Sheffield 16/12/2009.

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Status of Electronics & Control System P J Smith University of Sheffield 16/12/2009
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Status of Electronics & Control System

P J Smith

University of Sheffield

16/12/2009

04/18/23 University of Sheffield 2

Target Controller Hardware

Single key to ‘Enable’ system

• Hardware for Stage 1 upgrade is now complete

– May need to add extra wires if additional outputs are required – but already have 3 spare BNC’s on back panel

04/18/23 University of Sheffield 3

Target Controller Firmware

• Core control firmware is complete & functionalCore control firmware is complete & functional

• Remaining work primarily involves integration of control logic & USB interface

– Have demonstrated rudimentary Target operations under computer control (park/hold & start/stop actuation)

– Need to expose full functionality to USB interface for integration with EPICS

• Also require an interlock to prevent Target Frame from lowering if Target not in hold position (& to raise Frame in the event of any serious error condition)

– Logic exists in FPGA, but need to route Frame inhibit signal from MLCR to Target Frame Controller (can use existing spare cable) & build small relay switch interface

– Daresbury need to update Frame Controller PLC wiring/logic – planned for January

04/18/23 University of Sheffield 4

Target Controller Software

• Software also nearing completion

– Hardware driver framework in place

• User interface has been defined

– Have implemented all EPICS server / client functionality

• Tested using ‘virtual’ Target Controller Device

• Remaining work: implement low-level hardware driver ‘plug-in’

– Being developed in parallel with firmware/USB interface integration task

04/18/23 University of Sheffield 5

ISIS BPS

• ISIS requires a MICE Target BPS signal

– All other targets in ISIS produce them – MICE cannot be an exception

• Normally require a BPS to be generated from 2 signals using 2 different technologies

• Valid signals must be ‘hardwired’ – cannot be produced in firmware/software

– Cannot use Target controller FPGA

• Need robust methods of checking whether Target has dropped

• Will require some level of redesign of Target hardware

– Addition of limit switches?

– Additional optical readout channel?

– Have not yet commenced work on this – it will not be trivial

• Craig will set up a meeting early next year between Paul S & Mark Arnold, where implementation options will be investigated

04/18/23 University of Sheffield 6

Schedule• Plan to have Stage 1 upgrade complete & installed by end of January

• However, Paul S has very recently been signed off work with a back problem

• Currently not possible to estimate when he will be fit to return

• This will cause an unknown delay to the project

– Cannot predict whether installation before end of shutdown will now be possible

04/18/23 University of Sheffield 7

Summary

• Good progress with hardware, firmware & software

– Remaining work primarily involves integration of firmware & software

• Need to implement a BPS signal – requires some Target redesign

– Details to be worked out early next year

• Were on schedule to complete Stage 1 upgrade by end of January

– Health issues mean this may not be possible (should know more by mid-January)


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