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Status of Non-contact Electrical Measurements V.V. Komin, A.F. Bello, C.R. Brundle, Y.S. Uritsky Defect and Thin Films Characterization Laboratory, Applied Materials Inc., Santa Clara, CA 95054 Abstract. Non-contact electrical metrology includes a variety of characterization techniques used to determine a number of material/device electrical parameters. These powerful methods, used on full wafers at various processing stages, complement the traditional device-based contact electrical (capacitance-voltage and current-voltage) measurements of MOS-based structures. The non-contact electrical techniques are usually built around measurements of surface photovoltage and surface voltage in combination with illumination and corona charge deposited on a sample. In principle this allows recombination lifetime, minority carrier diffusion length, and iron contamination density to be determined for bulk silicon; generation lifetime, doping density and doping profile to be measured for near-surface silicon; and equivalent oxide thickness, oxide charge density, mobile charge density, total charge density, flat band voltage, dielectric integrity and other parameters to be obtained for dielectric films. Interface trap density can be used for qualification of the interface between silicon and dielectric. The non-contact nature of these measurement techniques is particularly attractive because it makes most of them non-destructive, non-invasive and allows for diagnostics in the wafer processing stages, rather than waiting for final device characterization. Some methods offer high-resolution full- wafer mapping capabilities. A few of them are destructive by design such as the soft-breakdown field measurements. Most of the non-contact electrical measurements offer excellent process step isolation, and opportunity for integrated metrology. They are less expensive, do not require fabrication of the test structures, and require significantly less preparation and measurement time compared to the traditional MOS-device based analogues. This early and short loop measurement capability is the most important feature. In some circumstances the fast turn-around of the product characterization has so high priority that it makes a lower accuracy and/or frequent calibrations, necessary for some non- contact electrical techniques, tolerable (however, if there is no final correlation to device performance they are useless!). In this paper we review the non-contact electrical measurement techniques most often used in the semiconductor industry for characterization of bulk silicon, near-surface silicon, dielectrics and interface between silicon and dielectric films. We provide a comparison of the experimental data with the theory derived from widely accepted publications [1- 5], and discuss the potential sources of discrepancies between the theory of some non-contact measurements and their implementation in commercial products. These potential discrepancies could cause systematic inaccuracy in measurements and disagreement between metrology using equipment fabricated by different vendors, resulting in considerable standardization challenges for the semiconductor industry. We highlight concerns when applying ASTM standards developed for non-contact electrical measurements [6 - 8] to current characterization of new semiconductor and dielectric materials. The goal of this paper is to demonstrate advantages and also the challenges in the non-contact electrical measurements, to define the problem areas and to provide recommendations for possible improvements and directions to overcome existing problems. INTRODUCTION Non-contact electrical measurements have become important semiconductor characterization tools to determine a number of material and device-related parameters, largely because of the availability of commercial equipment and the non-contact nature of the measurements. These powerful methods complement the traditional device-based electrical characterization of MOS-based structures capacitance-voltage and current-voltage measurements, - and also offer new capabilities. Non- contact electrical measurements provide information on quality of device components processing before the device fabrication itself; they have an excellent process step isolation and short turn-around time; this makes them especially attractive for use in the semiconductor industry. Metrology is playing an important feedback role in device production. Its evolution is mostly driven by changes in the device fabrication technology. It is reasonable to expect that changes in modern devices will result in changes in the metrology as well. As the contact methods mostly involve testing of the devices CP683, Characterization and Metrology for VLSI Technology: 2003 International Conference, edited by D. G. Seiler, A. C. Diebold, T. J. Shaffner, R. McDonald, S. Zollner, R. P. Khosla, and E. M. Secula © 2003 American Institute of Physics 0-7354-0152-7/03/$20.00 782
Transcript
Page 1: Status of Non-contact Electrical Measurementsextras.springer.com/2003/978-0-7354-0152-5/Cdr_pdfs/Indexed/782_1.Pdfstandards developed for non-contact electrical measurements [6 - 8]

Status of Non-contact Electrical Measurements

V.V. Komin, A.F. Bello, C.R. Brundle, Y.S. Uritsky

Defect and Thin Films Characterization Laboratory, Applied Materials Inc., Santa Clara, CA 95054

Abstract. Non-contact electrical metrology includes a variety of characterization techniques used to determine a numberof material/device electrical parameters. These powerful methods, used on full wafers at various processing stages,complement the traditional device-based contact electrical (capacitance-voltage and current-voltage) measurements ofMO S-based structures. The non-contact electrical techniques are usually built around measurements of surfacephotovoltage and surface voltage in combination with illumination and corona charge deposited on a sample. Inprinciple this allows recombination lifetime, minority carrier diffusion length, and iron contamination density to bedetermined for bulk silicon; generation lifetime, doping density and doping profile to be measured for near-surfacesilicon; and equivalent oxide thickness, oxide charge density, mobile charge density, total charge density, flat bandvoltage, dielectric integrity and other parameters to be obtained for dielectric films. Interface trap density can be used forqualification of the interface between silicon and dielectric. The non-contact nature of these measurement techniques isparticularly attractive because it makes most of them non-destructive, non-invasive and allows for diagnostics in thewafer processing stages, rather than waiting for final device characterization. Some methods offer high-resolution full-wafer mapping capabilities. A few of them are destructive by design such as the soft-breakdown field measurements.Most of the non-contact electrical measurements offer excellent process step isolation, and opportunity for integratedmetrology. They are less expensive, do not require fabrication of the test structures, and require significantly lesspreparation and measurement time compared to the traditional MOS-device based analogues. This early and short loopmeasurement capability is the most important feature. In some circumstances the fast turn-around of the productcharacterization has so high priority that it makes a lower accuracy and/or frequent calibrations, necessary for some non-contact electrical techniques, tolerable (however, if there is no final correlation to device performance they are useless!).In this paper we review the non-contact electrical measurement techniques most often used in the semiconductorindustry for characterization of bulk silicon, near-surface silicon, dielectrics and interface between silicon and dielectricfilms. We provide a comparison of the experimental data with the theory derived from widely accepted publications [1-5], and discuss the potential sources of discrepancies between the theory of some non-contact measurements and theirimplementation in commercial products. These potential discrepancies could cause systematic inaccuracy inmeasurements and disagreement between metrology using equipment fabricated by different vendors, resulting inconsiderable standardization challenges for the semiconductor industry. We highlight concerns when applying ASTMstandards developed for non-contact electrical measurements [6 - 8] to current characterization of new semiconductorand dielectric materials. The goal of this paper is to demonstrate advantages and also the challenges in the non-contactelectrical measurements, to define the problem areas and to provide recommendations for possible improvements anddirections to overcome existing problems.

INTRODUCTION

Non-contact electrical measurements have becomeimportant semiconductor characterization tools todetermine a number of material and device-relatedparameters, largely because of the availability ofcommercial equipment and the non-contact nature ofthe measurements. These powerful methodscomplement the traditional device-based electricalcharacterization of MOS-based structurescapacitance-voltage and current-voltagemeasurements, - and also offer new capabilities. Non-

contact electrical measurements provide informationon quality of device components processing before thedevice fabrication itself; they have an excellentprocess step isolation and short turn-around time; thismakes them especially attractive for use in thesemiconductor industry.

Metrology is playing an important feedback role indevice production. Its evolution is mostly driven bychanges in the device fabrication technology. It isreasonable to expect that changes in modern deviceswill result in changes in the metrology as well. As thecontact methods mostly involve testing of the devices

CP683, Characterization and Metrology for VLSI Technology: 2003 International Conference,edited by D. G. Seiler, A. C. Diebold, T. J. Shaffner, R. McDonald, S. Zollner, R. P. Khosla, and E. M. Secula

© 2003 American Institute of Physics 0-7354-0152-7/03/$20.00782

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or device-related structures, they closely follow anychanges in the device materials or structure viadevelopment of new specifications. Evolution of non-contact metrology is more complicated.

Many of the non-contact methods exploitapproaches that allow, to some extent, determinationof the expected device parameters. If the theoreticalbackground of a method is well understood and welldeveloped, and it is applicable over a wide range of themeasured parameters, such a method has a chance tosurvive with insignificant modifications within severaldevice node generations. However, some of the highlysensitive non-contact electrical measurements operatereliably only over a narrow range of material situationsand/or have to be recalibrated every time there is achange in these properties. They are, therefore, usefulfor SPC monitoring of well-established processes inproduction, but the R&D application of such methodscan be very limited. As a result, a change in thematerial or device structure could require the completerevision of these methods or even their replacementwhen industry moves to the next technology node.

Non-contact electrical measurements are usuallybased on different combination of the surface potentialmeasurements in the dark and under illumination,surface photovoltage (SPV) measurements, andapplying corona charge to. the sample surface(exceptions will be also discussed). Historically,Kelvin performed the first non-contact electricalmeasurements in 1881 [9]. Bardeen and Brattain firstdescribed the application of the SPV technique tocharacterization of semiconductor in 1953 [10]. In theperiod from 1955 to 1961 the increased interest in thesurface voltage and surface photovoltage study ofsemiconductors [11-16] resulted in the first full-scaleimplementation of a SPV technique in thesemiconductor industry at RCA [17] and, finally, inthe development of ASTM standards for non-contactmeasurement of recombination lifetime and diffusionlength [6-8].

Today, non-contact electrical metrology, which iswell-established for the semiconductor products basedon traditional silicon (Si) / silicon dioxide (SiO2)technology, faces new challenges. The gradualtransition of the industry from the 130 nm to the 65 nmnode is associated with deployment of new materials,film thickness, and device structures not seen before.Front-end-of-line (FEOL) features have approachedatomic dimensions. The term "dielectric" is not onlyassociated with thermally grown SiO2 anymore. It hasalready partially been replaced by other "advanced"dielectrics with a broad variety of materials from high-k advanced gate dielectrics for FEOL to low-k and

extreme-low-k dielectrics for back-end-of-line(BEOL) applications. Even silicon in the device regionis now to be replaced by alternative materials: silicon-on-insulator (SOI), strained silicon and SiGe. Non-contact electrical characterization methods need to beadapted accordingly in order to meet metrologyrequirements for these situations (of course this isdifficult when the end users often are unable to clearlystate what it is they need from the metrology!)

In this paper we discuss the current status of non-contact electrical metrology, demonstrate advantagesand challenges in the methodology, define the problemareas and attempt to provide some recommendationsfor possible improvements to address existingproblems. Overall we do not believe the metrology isyet in good shape for all applications of importance tothe industry.

REVIEW OF MEASUREMENTS, THEIRIMPLEMENTATION AND THE

OUTCOME

We would like to group non-contact electricalmeasurements into three categories: thecharacterization of bulk substrate material, the near-surface region and dielectric films. Characterization ofthe interface between substrate and dielectric will beplaced in the last category.

Characterization of bulk substratematerial

Typical parameters for this category of non-contactelectrical measurements are minority carrier lifetime(r), diffusion length (L), and iron concentration [Fe\.Typical applications are qualification of the incomingwafer material by estimation of lifetimes and theconcentration of heavy metals - lifetime-killers thatform deep levels in silicon.

Lifetime and diffusion length

Lifetime measurements are widely used forqualification of semiconductors since the basic theoryof electron-hole pair recombination via recombinationcenters (also called traps) was introduced in 1952 byHall [18], and Shockley and Read [19]. Therecombination lifetime r is the average time for anelectron-hole pair to recombine. Charge carriers moverandomly through the semiconductor lattice (being

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scattered all the time) and this movement can bedescribed by a diffusion coefficient D. A minoritycarrier with a specific lifetime T thus will be found atan average distance from the point were it wasgenerated given by equation (1):

'bulk' (1)

This specific distance is called the diffusion length Lof the minority carrier [2].

Recombination processes at the surface in general,affect measurements of bulk lifetime and diffusionlength. Diffusion length measurement based on theASTM F 391 - 96 standard, however, is affected byonly back-surface recombination while lifetime isaffected by both the front- and the back-surfacerecombination.

To illustrate the effect of the surface recombinationon lifetime measurements performed, for example, byphotoconductivity decay (PCD), we will consider thesimplified case of the large lifetime values equivalentto condition L > T, where T is the substrate thickness.The effective lifetime ieff can be described by theequation (2):

1 \ Sf+SbTeff Tbulk

(2)

In equation (2), the bulk lifetime Tbuik represents therecombination in the bulk region of the siliconsubstrate; the front-surface recombination velocity Sfrepresents the recombination at front-surface; and theback surface recombination velocity S^ represents therecombination at the back surface. If the Sf and 5^values are known, we can obtain the bulk lifetimefrom measured effective lifetime. Otherwise, theassumption that the measured effective lifetime givesto us the value of bulk recombination lifetime will leadto unpredictable inaccuracy [5].

In the case of diffusion length measurements usingapproach described in ASTM F 391 - 96 standard, theback surface recombination begins to significantlyaffect the accuracy of the minority carrier diffusionlength measurements once the substrate thickness, T, isless than four times the diffusion length, L (ASTM F391 - 96, statement 5.2) [6], a situation uncommon in1996, but quite ordinary now [5].

Estimation of heavy metal concentration

The method for estimation of iron concentration inthe bulk region of silicon using a combination ofstandard SPV measurements [6] and dissociation ofFeB pairs in />-type silicon was developed by Zoth andBergholz in 1989 [1]. Their widely accepted formulafor iron concentration is represented by equation (3):

1 1Laft Lbef

(3)

where Lbef and Laft are the diffusion length before andafter dissociation of FeB pairs.

Similarly, the iron concentration can be determinedusing the minority carrier lifetime measured beforeand after the FeB pairs dissociation:

[Fe] = Const 1 1

Rafter *before ,(4)

Attempts to estimate concentration of other heavymetals using diffusion length or lifetime measurementshave been recently made. For example, SemiconductorDiagnostics Inc (SDI) has developed the SPV-Cumethod for measurements of copper concentration byanalysis of the drop of diffusion length due todissociation of Cu-Cu pairs. However, this method isnot sensitive to the presence of copper in any formother than Cu-Cu complex deep level. SEMILAB isalso developing similar approaches for measurementsof concentration of other metals-lifetime killersprimarily based on the PCD by microwave reflectance(uPCD) method.

Implementation of the measurements in commerciallyavailable metrology equipment

Recombination lifetime and diffusion lengthmeasurements have become ubiquitous in thesemiconductor industry in the last decade, mainlybecause they are actual electrical properties ofimportance. Bulk wafer contamination, either duringwafer growth or subsequent processing, directlyaffects their values. Among the recombination lifetimemeasuring methods, the most commonly usedtechniques are the photoconductance decay (PCD) andthe surface photovoltage (SPV). The major strength ofthese techniques is the non-contact nature, rapidmeasurement, and the ability to map full wafers. Theirmajor weakness is the unknown surface recombination

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velocity, which may compromise the results. SPV iswidely accepted in the semiconductor industry forspecific determination of iron concentration in p-Si.PCD is found to have lower sensitivity to ironcontamination due to the high photon injection levelcompared to SPV approach [2].

Diffusion length measurements are usually basedon Method B of the ASTM F391-96 standardexploiting the multi-wavelength illumination source.Several vendors including SDI and SEMILAB havedeveloped a rapid full-wafer mapping of the diffusionlength and the iron concentration obtained fromequation (3).

Three non-contact approaches are most commonlyused for recombination lifetime measurements: (1)lifetime obtained from photoconductivity decay oruPCD, (2) lifetime calculated from the measureddiffusion length based on the ASTM F 391 - 96standard, and (3) lifetime from the analysis of SPVdecay after the excitation by a Xenon flash lamp usedin KLA-Tencor Quantox.

Surface recombination problem for lifetime anddiffusion length measurements

The effect of the surface recombination is acommon problem for lifetime and diffusion lengthmeasurements including iron measurements.

The advantage of the diffusion length measurementmethod is that the front-surface recombination doesnot have any significant effect on the measurements bydesign. However, back-surface recombination effectbecomes noticeable at long diffusion lengths. The lastrevision of ASTM F 391-96 standard for SPVmeasurement was issued in 1996 when typicaldiffusion lengths in silicon wafers were in agreementwith the "L < 774" rule for "the most accurate diffusionlength measurements" [6]. Since then, the quality ofsilicon wafers has been drastically improved. Todaythe typical diffusion length can be up to 3 times largerthan the substrate thickness. The ASTM F 391-96standard states "an estimate of the diffusion length ispossible when the diffusion length exceeds twice thethickness" and the diffusion length estimate procedurewas developed for the case where the back-surfacerecombination velocity is known [20]. However, aback-surface recombination velocity measurement isnot commercially available and it also must beestimated (guessed?). This makes the estimate of thediffusion length very complicated, with an increaseduncertainty (which we will attempt to determine in thenext section) for the case of L > T.

In case of lifetime measurements, both the front-and the back-surface recombination can affect theaccuracy of the measurements. An attempt to resolvethe problem is made in the Elymat technique basedupon photocurrent measurement and introduced in1988 [21]. In Elymat, a wafer is placed between twobaths of electrolyte that removes the oxide from thesubstrate surface and significantly reduces the surfacerecombination velocities when the surface is inaccumulation at applied bias. This method, however,does not provide the measurements of the actualsurface recombination velocity and obviously does notbelong to the category of non-contact metrology. Inaddition, similar to f^PCD, the high level of excitationmakes it less sensitive to the iron presence in silicon[2].

Exactly the same approach is used by SEMILAB inlifetime measurements by jiiPCD. SEMILAB in-situ(built-in bath) chemical treatment of the wafer surfaceis designed to significantly reduce the surfacerecombination and allow accurate measurements of thelifetime using uPCD. Again, this method does notprovide the measurements of the actual surfacerecombination velocity. The assumption that for thesurface in accumulation, Sb = 0 is not always valid andSb can vary substantially [22, 23]. Hence, thisapproach does not provide the solution of the problem.

For non-contact methods, most of the electricalmetrology vendors do use a front-surface conditioningbefore lifetime / diffusion length measurements, forexample using corona biasing (SDI, KLA-Tencor,SEMILAB). However, the implementation of a backsurface conditioning is often a real challenge andthough a surface pretreatment is advised by thevendors as a remedy to any potential back-surfaceeffect problem none is implemented. SDI recommendsto use the Enhanced SPV formula and to input Sbvalue correction if L > 500 jam, but the user has toprovide the correct back surface recombinationvelocity!

Since commercial tools for back surfacerecombination velocity measurement are currently notavailable, and these rates can vary substantially [22,23], this SDI "SZ? correction" capability does notprovide the solution to the problem.

KLA-Tencor does not even mention any specialtreatment of, or correction for, the back surface of thespecimen during the lifetime measurements byQuantox. Based on considerations described above,one can conclude that the back-surface recombinationcould affect the Quantox lifetime measurements athigh lifetime values equivalent to large L [5].

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Evaluation of the effect of back surface recombinationon lifetime and diffusion length measurements

In order to evaluate the rough magnitude of theeffect of the back-surface recombination on thediffusion length measurements, the following studywas carried out. A wafer with 150A of thermal oxidewas measured using a commercially available SDIFAaST-330 tool. Measurements were performed using"Standard" mode without back-surface recombinationcorrection and "Enhanced" mode with different Sbcorrection values introduced in SDI software in therange from 10° to 104 cm/s reported elsewhere [22,23]. The experimental data was compared to results ofthe modeling based on the widely accepted publicationof Schroder [4]. In our model, we used equation (7.53)on page 445 of this reference for a fit for absorptioncoefficient vs. wavelength data for silicon.

We have developed a formula that accounts foreffect of the back-surface recombination duringcalculations of diffusion length using equation (A7.4)on page 486 [4]. Diffusion length data from"Standard" measurements is also used in thistheoretical calculations.

The experimental and theoretical data are plottedon the same graph illustrated in Figure 1. Analysis ofdata in Figure 1 shows that data produced by SDI"Enhanced" mode is in good agreement with ourtheoretical data. So, provided Sb is known we are ingood shape.

We have estimated how much the diffusion lengthL value would deviate from true L, if the "guessed at"Sb value used for these calculations were differentfrom the true back surface recombination velocity Sb.

From this data we plotted the values of the measureddiffusion length, incorporating an assumed Sb of 102

cm/s (often considered as typical value for theoxidized wafers), against what the true L would be fora variety of actual Sb values. This is shown in Figure 2(left). Strong deviations are observed at higher Lvalues. Figure 2 (right) expresses this as percentagevariation in the determined value. It can be seen thateven for what is currently quite modest values of L,large percentage variations are seen (e.g. 40% at L =750 um for a true value of Sb of 104 cm/s). At higher Lvalues the errors become catastrophic. Figure 3presents similar modeling results for a bare Si wafer,where an assumed Sb value of 104 cm/s is oftenconsidered typical. Again significant deviations in trueL from measured L are observed at higher L if the realSb deviates from the assumed value of 104 cm/s.

1000900800700600500400300200100

Theoretical Curveo Measured Data Points

0.1 10 1000 100000

Sb [cm/s]

FIGURE 1. Results of the diffusion length L measurementsfor "enhanced mode" and different Sb correction valuesperformed using SDI FAaST-330 tool.

2000 -, 101

500 1000 1500

True! [jam]

2000 500 1000 1500 2000

TrueL [jam]

FIGURE 2. Results obtained using Sb=\Q2 cm/s (typical for oxidized wafer and recommended by vendor) in case if true Sb isdifferent from the assumed one (left). The results on the left are used to calculate inaccuracy of the diffusion lengthmeasurements AL/L (right) as a function of the L. The wafer thickness used for calculations is 725 urn.

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500 1000 1500 2000

True/, [urn]

500 1000 1500 2000

True! [um]

FIGURE 3. Results obtained using Sb=\04 cm/s (typical for bare wafer and recommended by vendor) in case if true Sb isdifferent from the assumed one (left). The results on the left are used to calculate inaccuracy of the diffusion lengthmeasurements AL/L (right) as a function of the L. The wafer thickness used for calculations is 725 um.

Analysis of these modeling results supports theASTM F 391-96 statement 5.2: for L < T/4 (T = 725jim) the measured diffusion length equals the actual Lregardless the Sb value. However, at large L values,the inaccuracy of the measurement increases if theactual Sb is different from the assumed one.

The important bottom line question here, forwhich the metrology community needs an answerfrom the semiconductor industry, is whatuncertainty in true L is acceptable. Are 40%variations in determined numbers, associatedpurely with the sensitivity of the metrology to Sb,acceptable?

Evaluation of the effect of back surface recombinationon iron concentration measurements

Figure 5. This Figure demonstrates that noticeablediscrepancies for iron detection at different Sb valuesappear at low iron concentrations.

—Theoretical Curveo Measured Data

' O.OE+00l.E+00 l.E+02 l.E+04 l.E+06

Sb [cm/s]

Using the same approach as for the diffusion lengthmodeling, we carried out a study of the Sb effect onthe iron concentration measurements. Diffusion lengthmeasurements were performed for p-type wafer withintroducing different values of Sb correction into SDIFAaST-330 software. Immediately after the FeB pairsdissociation, diffusion length was measured for thesame set of Sb values. The iron concentration wascalculated using equation (3). Experimental andmodeling results are presented in Figure 4.

Good agreement between experimental andtheoretical data allows us to use this model to estimatethe effect of the back-surface recombination on theiron measurements. Results of our study are shown in

FIGURE 4. Results of the iron concentration measurementsperformed using different Sb correction values. Theoreticalcurve is derived using equation (3).

Analysis of results illustrated in Figure 5 (right)shows that inaccuracy of the iron measurements can bemore than 30% for a Fe concentration of 1 x 1010 cm"3 ifback-surface recombination is not accounted. Todaythis may be a tolerable inaccuracy for most of thesemiconductor products (?). However, the nexttechnology nodes will require lower Fe concentrations,IxlO9 cm"3 or better, where the inaccuracy becomesmuch worse. Again real guidance from the industryis needed as to what is acceptable.

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eol.E+1.1 -.

l.E+10 J

— l.E+09

1E+10

S*=10 cm/s

1E+09 1E+10 1E+11 1E+12True [Fe ], [cm ]

1E+11 1E+12

Sb=50cm/s

Iron Concentration [Fe ], [cm"

FIGURE 5. Modeling results of iron concentration [Fe] (left) calculated for 5^=100 cm/s (recommended by vendor for oxidizedwafers and assumed to be constant) vs. iron concentration [Fe] corresponding to Sb values that are different from recommended.Theoretical curve is derived using equation (3). Inaccuracy of iron concentration [Fe] measurements (right) for different ironconcentrations [Fe] is derived from Figure on the left.

Characterization of the near-surfaceregion

Typical parameters characterizing the near-surfaceregion are generation lifetime, near-surfacerecombination lifetime and near-surface doping. It isthe near surface region properties that are mostimportant in device performance.

Lifetimes fall into two primary categories:recombination lifetimes and generation lifetimes. Theconcept of recombination lifetime, Tr> holds whenexcess carriers, introduced by light or by forward-biased p-n junction, decay as a result ofrecombination. Generation lifetime, rgif applies whenthere is a deficit of carriers and equilibrium is reachedby thermal generation of the electron-hole pairs [3].When recombination and generation events occur inthe bulk, they are characterized by rr and %. When itoccurs at the surface, they are characterized by thesurface recombination velocity sr and the surfacegeneration velocity sg. Knowledge of sr and sg,however, is mostly important for metrology in order toimprove an accuracy of the lifetime measurements.Other parameters such as near-surface recombinationlifetime and generation lifetime are used forcharacterization of the near-surface region of siliconsimilar to the bulk T& and rr.

Charge Region (SCR) near to the surface. As withother lifetime measurements, it is sensitive to varioussources of contamination and defects, particularlymetallic contamination. Metals such as Fe, Cu, Ni incertain states form deep levels in silicon andeffectively capture the minority carriers causingsignificant reduction of the recombination lifetime.

Generation lifetime

Generation lifetime is the rate at which minoritycarriers are thermally generated when there is a deficitof carriers. This is a parameter useful forcharacterization of contamination by metals (Fe, Ni,Cr, Co) that could precipitate at the surface and impactthe quality of the device region, especially the CMOStransistor channel. Generation lifetime is sensitivemostly to metals-lifetime-killers that form deep-leveldefects in the vicinity of the midgap ± 2kT/q.

Doping concentration

Another device parameter of the near-surfacesilicon region is the silicon active dopingconcentration. This is the net concentration of ionizedimpurities (i.e. the difference between theconcentration of ionized acceptors and donors) in thenear-surface SCR.

Near-surface recombination lifetimes

Near-surface recombination lifetime is the rate atwhich excess minority carriers recombine in the Space

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Implementation of the measurements in commerciallyavailable metrology equipment

Commercially available metrology equipment fromKLA-Tencor, SDI, SemiTest, QC-Solutions and othermetrology vendors provides capabilities for near-surface silicon characterization. We will review someof the solutions provided by these manufacturers.

KLA-TencorDirect measurement of generation lifetime is

implemented in Quantox from KLA-Tencor. It isperformed using the corona-oxide-semiconductor(COS) technique [24] similar to the generation lifetimemeasurements for an MOS-capacitor (MOS-C, definedin ASTM Standard F 1388 [25], that was developed in1992. Similarly to MOS-C measurements, a guardring of corona charge is created around themeasurement site, biasing the silicon to accumulation.This results in the suppression of injection of minoritycarriers laterally into the large SCR, instantly createdby biasing the near-surface region into stronginversion. Generation lifetime measurements are takenusing charge-time (Q-t) pulsed measurements. Thesurface voltage is then determined as a function oftime. The slope of voltage vs. time as carriers aregenerated in the non-equilibrium state of deepdepletion is used to calculate the generation lifetime,Glifetime, as shown in equation (5) [26]:

GLifetime = -Si dV

dt(5)

where dV/dt is the initial slope of the surface voltagevs. time curve, ssi is the dielectric constant of thesilicon, Wdd is the maximum depth pulsed to during thedeep depletion pulse, and Winv is the equilibriumdepletion depth.

Near-surface recombination lifetime, SRLifetime, isobtained from the analysis of voltage transient forweak inversion condition and after the forward biasingby a visible light source. The recombination lifetime isdetermined from the surface voltage decay [26].

Near-surface doping, NSDoping, is the silicondoping value averaged over the SCR. Themeasurement procedure is very similar to that forGLifetime measurements. Known interferencesreported by KLA-Tencor for NSDoping measurementsare high density of interface traps resulting in highsurface recombination, dielectric leakage and highdielectric charging.

Semiconductor Diagnostics Inc (SDI)SDI offers a minority carrier recovery time (so-

called "£/?/-r") as another approach to estimate thedefectiveness of near-surface silicon. Epi-r iscontrolled by generation-recombination processes inSCR [27], sensitive to deep levels with activationenergy in the vicinity of the midgap ± 2kTlq, It can beused for an indication of the presence of metalcontamination in the SCR. The Epi-r method is basedon the analysis of small signal AC-SPV. Theprinciples of this method were originally developed byNakhmanson [28] in 1975.

SDI has also implemented surface dopingmeasurements (SD) based on principles developed byNakhmanson [28]. Surface Doping is determined fromequation (6):

SD =2\V.SB

_kT_]

(6)

where VSB is determined from surface voltagemeasurements in the dark and under illumination andcapacitance, C, is determined from the followingequation (7):

C = Const - 1colmV, (7)

SPY

where co is the angular frequency of light modulationand Const is a function of the photon flux anddependent on the geometry of the SPY probe [27].

QC SolutionsQC Solutions provide the surface charge, the

doping concentration (resistivity), the near-surfacerecombination lifetime, and the depletion layer widthmeasurements based on SPY [29].

SemiTestEpimet from SemiTest provides measurement of

the resistivity profile of epitaxially grown siliconlayers. These measurements are similar to CV-Schottky or Hg-probe but performed in non-contactmanner [30].

To our best knowledge, these methods forcharacterization of near-surface region offered bydifferent metrology vendors are providing adequatecapabilities that are expected by industry. There isalways room for improvements but at least thismetrology is not a showstopper.

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Characterization of dielectrics andinterfaces

Typical parameters for this category ofmeasurements are: equivalent oxide thickness (EOT),leakage current, total charge, flatband voltage, densityof interface traps (Dit\ soft-breakdown field, andmobile ions concentration.

Corona-oxide-semiconductor (COS) techniques areused for non-contact characterization of dielectrics andinterfaces [24]. COS, as implemented in KLA-TencorQuantox, is based on analysis of the dependence of thesurface voltage and SPY as a function of the coronacharge. SDI has introduced the Corona-OxideCharacterization of Semiconductors (COCOS)technique, which is based on measurement of thecontact potential difference (CPD) voltage in dark andunder illumination [31, 32].

Both COS and COCOS techniques exploitdeposition of the corona charge on the dielectricsurface as a non-contact way to apply bias to thedielectric and to the semiconductor. If dielectricleakage is substantial, both methods requirecorrections for the leakage current through dielectric.Figure 6 depicts typical distortion of the CPD curvescaused by dielectric leakage. Substantial leakage couldbe due to poor integrity of dielectric material, highcharge on the surface that could result in Fowler-Nordheim (F-N) tunneling or due to direct tunneling(DT) that occurs at small thickness regardless of thequality of the dielectric material.

FIGURE 6. Effect of the dielectric leakage on the Q-Vmeasurements. Dot line depicts the curve of CPD voltageunder illumination vs. corona charge without leakage. SDICOCOS technique was used to measure a 45A HfO2 film[31].

Equivalent oxide thickness (EOT)

EOT is one of the widely used parameters forcharacterization of dielectrics. EOT is the thicknessthat perfect SiO2 would have for a given capacitancevalue. In non-contact electrical metrology EOT isderived from the dielectric capacitance that is obtainedfrom the slope of the curve of surface voltage as afunction of corona charge ("Q-V curve").

Usually, dielectric capacitance measurements areperformed at conditions when the silicon surface is inaccumulation. This is a way to reduce the contributionof capacitance from the silicon space charge region(SCR). However, if the gate dielectric EOT is less thanabout 10-15 A (depends on material), contribution ofthe SCR capacitance cannot be neglected. Moreover,at deep accumulation, the quantization of chargecarriers in the narrow potential well near the surfaceshould be taken in account as well. These quantummechanical corrections could be in the range of 4-6A[31], a substantial fraction of the total.

Another challenge arises because of DT of thecarriers through dielectrics with an EOT less than 25 A.This results in the distortion of the Q-V curve thatleads to an inaccuracy in capacitance and EOTmeasurements.

Different vendors are trying to resolve the EOTmeasurement challenges for leaky dielectrics.

For example, KLA-Tencor has introduced theACTIV technology to correct the Q-V curve for thedielectric leakage. According to KLA-Tencor, theACTIV is designed to improve the accuracy of thenumerous parameters affected by leakage such ascapacitance, EOT, Dit, Vfb, Vt, and others. We have nopublishable information on this technology.

SDI has introduced two approaches to estimate thedielectric thickness at substantial leakage current. Wewill designate them as "SASS Tox-1" and "SASSTox-2". According to SDI [33, 34], SASS Tox-1determines the surface voltage at condition whencorona current equal to the dielectric leakage current("SASS" conditions), that could be used as anextremely sensitive indicator of the thickness of theparticular material under proper calibration procedure[33, 34]. Modeling of the measurements is quite achallenge, but even our simplified calculations for theF-N tunneling case based on formulas (6.76)-(6.79) onpage 392 of the reference [4] demonstrate that SASSTox-1 has very weak dependence on the dielectricconstant. On the other hand, it strongly depends on thedielectric barrier height variation, which is another

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parameter of dielectric material indirectly related todielectric constant. The dielectric barrier height cannotbe obtained from SASS Tox-1 measurements.Therefore, SASS Tox-1 requires calibration for everynew dielectric material. The situation when DT issignificant is even more complicated. First, thespectrum of distribution of the surface states isdynamically changing and, generally speaking, isunknown, and, secondly, the carrier on the surfacestate is confined and cannot be considered to be in afree state. These circumstances do not allow using thetraditional solution of the quantum-mechanicalproblem for the tunneling through the potential barrierof finite height from one free state to another freestate. Therefore, the task of development of a reliabletheoretical model for the carrier tunneling betweensilicon conduction or valence band and the surfacestate is complicated (details on such estimates arebeyond the scope of this review).

We described the SASS Tox-1 methodology insome detail above in order to understand the results ofthe following experiment. Measurements of nitridedgate oxide films of different thicknesses were carriedout using Therma-Wave Opti-Probe OP-5340spectroscopic ellipsometer (using recipes specificallydeveloped for DPN ISSG oxides), the SDI SASS Tox-1 tool and the SSM-6200 EM-Gate. The SSM-6200elastic metal gate is a commercially available productof Solid State Measurements Inc (SSM) providingvirtually preparation free, CV-tests of ultra-thin gatedielectrics using the traditional CV approach withsophisticated modeling and corrections developed toimprove the accuracy of the capacitance, EOT andleakage current measurements [35]. However, this isof cause a contact method also not a subject for furtherdiscussion here. Results of the comparison of the SDIdetermined EOT to the SSM EOT, both plotted againstthe ellipsometry-determined thickness, are illustratedin Figure 7. They are consistent with our evaluation ofthe SASS Tox-1 capabilities discussed above, takingin account that according to SDI, the SASS Tox-1 toolwas calibrated for the optical thickness of thermal SiO2obtained using ellipsometry. The unity slope for theSDI curve shows that it is measuring essentiallyphysical thickness, not a true EOT.

In order to address the increased demand in EOTmeasurements for gate dielectrics at substantialleakage, SDI plans to develop SASS Tox-2, designedto measure a capacitance calculated from thederivative of the surface voltage decay taken in theinitial moment of turning the corona current off [33,34]. The idea of the method is elegant andstraightforward. However, doing this with the requiredprecision and speed in that "initial moment" is a

challenge and it remains to be seen what the resultsare.

° SDI: y=1.0x+0.1o SSM: y=1.3x-4.2

.a 15 -

8 9 -S

7 9 11 13 15 17 19'Optical" Thickness [A]

FIGURE 7. "Electrical" thickness measurements of DPNgate oxide using "capacitance" approach, SSM-6200 and"non-capacitance" approach, SDI SASS Tox-1 vs. "optical"thickness by ellipsometer Therma-Wave OP-5340.

Interface Trap Density (Dit)

Density of interface traps, Dit, is an importantparameter for qualification of the interface betweendielectric and semiconductor. Generally speaking, thelower Dit, the better quality of the interface. Ditincrease can be caused by different reasons: interfaceroughness, presence of intrinsic defects or extrinsicimpurities, and so on.

In order to compare the Dit measurements fromdifferent vendors, we have performed measurementson a set of 60A HfO2 samples treated using differentpre- and post-deposition conditions. KLA-TencorQuantox and SDI FAaST-330 tools were used for themetrology. Some of the results are shown in Figure 8.

In order to investigate such a discrepancy (onemight suggest an anti-correlation) in the results of Q-Vmeasurements obtained from different tools, we havescrutinized the raw data provided by both tools. Figure9 illustrates the dependence of SPY as a function ofcorona charge that is used by Quantox fordetermination of Vfb; the dependence of the surfacebarrier voltage Vsb as a function of corona charge thatis used in the SDI COCOS technique to determine Vfb,and Dit; and the theoretical curve of the surface barriersimplified to the case of an ideal interface (Dit = 0).One can see that both experimental curves aresaturated at high positive corona charge and do notreach the theoretical surface barrier values that is,typically, about 0.8V. The explanation is that in thereal measurements, the illumination intensity is finite

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and, hence, the theoretical surface barrier could not bereached. The second observation is that the theoreticalcurve changes sign for V corresponding to the flatband condition. Based on this, the flat band voltagevalue is established in both COS, used in Quantox, andCOCOS, used in SDI FAaST-330. However, one cansee that the COCOS, Vsb curve does not change itssign in the experimental data. This brings up the issueof accuracy of the flat band voltage measurement.Another issue is that in the COCOS technique, the Ditspectrum is calculated using the slope of the Vsb vs.Qc curve. Therefore, one can expect that COCOS Ditspectrum, i.e. Dit as a function of Vsb, will be"compressed" because the COCOS Vsb nearly reachapproximately 2/3 of the theoretical surface barrierheight.

SDI COCOS

Q l.E+12 KLA-Tencor Quantox^

1 2 3 4 5 6 7 8 9 10 11 12 13Slot No

SDI COCOS0.80 -i

£0.00

>-0.40

-0.80 J KLA-Tencor Quantox1 2 3 4 5 6 7 8 9 10 11 12 13

Slot No

FIGURE 8. Results of the interface state density Dit andflat band voltage Vfb measurements of the set of 60A HfO2samples using SDI FAaST-330 and KLA-Tencor Quantoxfor different pre- and post-treatment conditions.

This makes it quite challenging to convert theCOCOS Dit spectrum to a traditional Dit spectrum, i.e.Dit as a function of energy through the band gap of thesemiconductor (see Figure 6.31 of the reference [4]). Itcould also be confusing for users of COCOS methodthat SDI defines difference of the CPD voltage in darkand under illumination as a surface barrier voltage,despite the fact that this AVCpD does not actuallyreaches the theoretical value of the surface barriervoltage. COS defines this AVCPD simply as SPV, whichis an accurate terminology in this situation.

Another confusion is in different definitions of Ditused in COS and COCOS: COS calculates Dit at

middle of silicon band gap while COCOS uses theminimum value found in COCOS Dit spectrumregardless its position in band gap. At this point werealize that there is little reason to expect the results ofthe COCOS and Quantox measurements to agree,since different things are actually being measured,even though they are being given the same names.Only standardization of the terminology definitionsand Q-V technique procedures can resolve thissituation. While it is interesting to note the anti-correlation observed between the two different tools,we have no idea what physics is behind this. This anti-correlation is so striking one could almost calibrateone tool against the other!

>" Theory 0.8 qg> (no DIT)

.2n

I0)o

KLA-Tencor SDI Vsb

-2.E+12 2.E+12

FIGURE 9. Comparison of the theoretical surface barriervoltage with SPV measured by KLA-Tencor Quantox andthe surface barrier voltage measured by SDI FAaST-330.

In order to improve the Q-V measurements, SDIhas released COCOS-II and VC COCOS technologies.In COCOS-II the measurement of the CPD voltageunder illumination is not used any more. According toSDI, the new Variable Corona (VC) COCOS isdesigned to improve the flat band voltagemeasurement accuracy by reducing the charge quantaat approaching the flat band conditions.

Analyzing the SDI Vsb curve behavior shown inFigure 9, we came to the conclusion that "coronacharge fine tuning" by VC COCOS could bepotentially not enough to resolve the Vfb accuracyproblem. Something else causes the distortion of theVsb vs. Qc curve. Our wild guess would be that theproblem is in the light source that does not provideenough intensity for successful flat band voltagedetermination.

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Soft-breakdown and mobile charge

Soft-breakdown and mobile charge measurementsare well understood and well implemented in differentcommercially available metrology tools provided byKLA-Tencor, SDI, SEMILAB and other vendors.

Soft-breakdown tests [36] are definitely destructiveby design and the properties of the dielectrics aremodified during these measurements because highcorona charge is deposited on the surface of dielectricuntil it reaches onset of F-N tunneling. Theconsequently measured voltage is the soft-breakdownvoltage that is a characteristic parameter for dielectricstrength of the film material.

Mobile charge measurements of alkali metalsexploit the drift of the ions through the dielectriclattice at elevated temperature in the range of 130-170°C in the electric field created by corona chargedeposited on the surface of dielectric. This bias-thermal stress technique is common and widelyimplemented in commercial metrology tools. SDI hasexpanded the mobile charge technique to measurementof mobile copper at higher temperature and at higherelectric fields if necessary.

The mobile charge measurements provide a fastestimate of the mobile charge concentration in oxideand usually are designed for measurements of 1000Athick oxides. Such measurements on thinner dielectricsare usually not recommended, primarily because oflack of sensitivity of the measuring probes to smallvariation of the oxide voltage before and after bias-thermal stress. Another issue associated with themobile copper measurement is poor repeatabilitybecause copper tends to diffuse through the interfaceinto the silicon while most of the alkali metals stay inthe oxide. However, fast full mapping of blanketwafers makes mobile charge measurements a veryattractive method for root cause analysis andtroubleshooting the semiconductor processingequipment.

Surface voltage

Surface voltage (Vs) measurements play the role ofthe basic element to construct more sophisticatedmeasurements like soft-breakdown, mobile chargemeasurements and others. Vs measurements alonehave been used by SDI as a "Plasma DamageMonitor" ' (PDM) voltage [37]. However, Vs issensitive not only to presence of the charge on thesurface of dielectric but also to variation of dielectricthickness. KLA-Tencor recommends using the Vs

measurements corrected for "optical" thickness incombination with Vfb and Dit measurements: Vs ismostly sensitive to charge on the surface of the film,Vfb is sensitive to charge in the dielectric bulk locatedcloser to interface and Dit is a characteristic parameterof the interface. We would also recommend using theGLifetime measurements if the effect of the plasmadamage on the underlying silicon is important.

Stress Induced Leakage Current

Stress Induced Leakage Current (SILC, introducedby SDI) provides measurements of the leakage I-Vcurve for dielectrics. This method is useful fordielectric integrity characterization of dielectric filmswith thickness more than 40A. SILC loses sensitivityto the interface, dielectric and surface defects when thecontribution of DT becomes substantial. Another issueis poor correlation to device level leakage data, mostlybecause of differences in MOS and COS physics.

CONCLUSION

In this paper we have reviewed the non-contactelectrical metrology that has become commerciallyavailable in the semiconductor industry. The goal ofthe review was to describe the existing capabilities ofthe non-contact electrical measurements, to highlightchallenges associated with their applications to newmaterials and device structures, and to providerecommendations for further improvement of thispromising metrology.

We provided qualitative and some quantitativeestimates of the accuracy of diffusion length and ironconcentration measurements. We demonstrated thatsurface recombination does affect the accuracy of thelifetime, diffusion length and iron concentrationmeasurements. Lifetime and diffusion length are thefundamental parameters for characterization of bulksubstrate material quality (if measured accurately!!!).In order to understand what measurement accuracy isactually needed, input from industry is required. Thiswould help with standardization and expansion ofASTM standards for new materials, important toimprove the accuracy of the measurements. Only thencan the lifetime and diffusion length methodseffectively be included in a Metrology Roadmap.

Metrology for characterization of near-surfaceregion provided by different metrology vendors, ingeneral, is providing expected capabilities. There is

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always room for improvements butmeasurements are not showstoppers.

these

The issue of the EOT measurement of gatedielectrics at substantial leakage current through thedielectric still remains an unresolved problem despitethe numerous attempts to expand the existingmetrology capabilities for EOT measurements below20A.

Dit is widely accepted in industry as an importantparameter for qualification of dielectrics andinterfaces. However, existing discrepancies in the Ditdefinitions used by different metrology vendors needto be resolved by standardizing the Dit definition andthe Dit measurement procedure.

Non-contact electrical metrology expandscapabilities of traditional electrical testing, reducesmeasurement turn around and cost of ownership.However, we do not believe it is yet in good shape andadditional efforts are still needed to make thispromising metrology reliable and standardized in orderto address metrology needs of semiconductor industry.

ACKNOWLEDGMENTS

We appreciate the efforts of the suppliers that havetaken tremendous business risks in developing thisspecialized metrology equipment in the fast changingenvironment of the semiconductor industry needs.

We would like to acknowledge KLA-TencorCorporation, Solid State Measurements Incorporated(SSM) and Semiconductor Diagnostics Incorporated(SDI) for provided opportunity to use their recentmetrology for advanced dielectrics characterization.

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27. Marinskiy, D., Lagowski, J., Wilson, M. D., SavtchoukA., Jastrzebski, L. L., and DeBusk, D., "Small Signal ac-Surface Photovoltage Technique for Non-ContactMonitoring of Near-Surface Doping and Recombination-Generation in the Depletion Layer" in Mat. Res. Soc.Symp. Proc. 591, 225-230 (1999).

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35. Hillard, R. J., Mazur, R. G., Sramey S. M., Rowland, W.H., Gruber, G. A., Siergiey, R., and Evseev, S., "ProductWafer Measurements of MOS Gate Dielectric Qualitywith a Small Diameter Elastic Probe" inCharacterization and Metrology for VLSI Technology:2000 International Conference, edited by D. G. Seiler,A. C. Diebold et al., AIP Conference Proceedings 550,New York: American Institute of Physics, 2001, pp. 119-124.

36. Edelman, P., Savtchouk, A., and Lagowski, J., "Mappingof leakage and breakdown of dielectric films on silicon"in 7t International Conference on Defect Recognitionand Image Processing in Semiconductors, Templin,Germany, 1997.

37. Karzhavin, Yu., Wu, W., Findlay, A., and Jastrzebski, L.L., "Effect of Metal Underlayer on Plasma InducedCharging" in Proceedings of the InternationalSymposium on Thin Film Materials, Processes,Reliability, and Applications: Thin Film Processes,edited by G. S. Mathad et al., The ElectrochemicalSociety Proceedings 97-30, NJ: The ElectrochemicalSociety, Inc., 1998, pp. 183-194.

DISCLAIMERCertain commercial instruments are identified in thisreview in order to adequately specify the metrologyprocedures. Such identification does not imply anyrecommendation or endorsement by AppliedMaterials, nor does it imply that the instrumentsidentified are necessarily the best available for thepurpose.

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