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EK-LM3S9B92-04 Copyright © 2009–2010 Texas Instruments
User ’s Manual
Stellaris® EK-LM3S9B92 Evaluation Kit
2 January 6, 2010
CopyrightCopyright © 2009–2010 Texas Instruments, Inc. All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments. ARM and Thumb are registered trademarks, and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others.
Texas Instruments108 Wild Basin, Suite 350Austin, TX 78746http://www.ti.com/stellaris
Table of ContentsChapter 1: Stellaris® LM3S9B92 Evaluation Kit Overview ........................................................................... 9Kit Contents ...................................................................................................................................................... 10Using the EK-LM3S9B92.................................................................................................................................. 10Features............................................................................................................................................................ 10
Chapter 2: Hardware Description.................................................................................................................. 13Evaluation Board .............................................................................................................................................. 13
Functional Description .................................................................................................................................. 13In-Circuit Debug Interface Board ...................................................................................................................... 16
Functional Description .................................................................................................................................. 16
Chapter 3: Software Development ................................................................................................................ 19Software Description......................................................................................................................................... 19Source Code..................................................................................................................................................... 19Tool Options ..................................................................................................................................................... 19Programming the EK-LM3S9B92 Board........................................................................................................... 19
Appendix A: Schematics................................................................................................................................ 21Appendix B: Connection Details ................................................................................................................... 27Component Locations....................................................................................................................................... 27Board Dimensions ............................................................................................................................................ 28Board Connectivity............................................................................................................................................ 29References ....................................................................................................................................................... 29
Appendix C: Microcontroller GPIO Assignments........................................................................................ 31
January 6, 2010 3
4 January 6, 2010
List of FiguresFigure 1-1. LM3S9B92 Evaluation Board .......................................................................................................... 9Figure 1-2. In-Circuit Debug Interface Board..................................................................................................... 9Figure 2-1. EK-LM3S9B92 Evaluation Board Block Diagram.......................................................................... 13Figure 2-2. GPIO Pads .................................................................................................................................... 14Figure 2-3. JTAG/SWD Connector .................................................................................................................. 14Figure 2-4. PWR/UART Connector.................................................................................................................. 15Figure 2-5. In Circuit Debug (ICDI) Board Block Diagram ............................................................................... 16Figure 2-6. JTAG/SWD Connector J1 ............................................................................................................. 17Figure 2-7. JTAG/SWD Connector J3 ............................................................................................................. 17Figure 2-8. PWR/UART Connector.................................................................................................................. 17Figure B-1. EK-LM3S9B92 Evaluation Board Component Locations .............................................................. 27Figure B-2. BD-ICDI Board Component Locations .......................................................................................... 27Figure B-3. EK-LM3S9B92 Evaluation Board Dimensions .............................................................................. 28Figure B-4. In-Circuit Debug Interface Board Dimensions ............................................................................... 28Figure B-5. ICDI – EK-LM3S9B92 Board Connectivity .................................................................................... 29
January 6, 2010 5
6 January 6, 2010
List of TablesTable C-1. EK-LM3S9B92 Evaluation Board GPIO Usage............................................................................. 31
January 6, 2010 7
8 January 6, 2010
C H A P T E R 1
Stellaris® LM3S9B92 Evaluation Kit OverviewLuminary Micro's Stellaris® LM3S9B92 Evaluation Board Kit (EK-LM3S9B92) is a low-cost platform for evaluation of the LM3S9B92 microcontroller. The kit includes two boards, the EK-LM3S9B92 evaluation board, and the In-Circuit Debug Interface (BD-ICDI) board.
The EK-LM3S9B92 board includes the LM3S9B92 ARM® Cortex™-M3 Microcontroller, a 10/100 Mbit Ethernet port, a full-speed USB-OTG port, connectors for inteface to the BD-ICDI board, and oversized pads for easy connection to the microcontroller GPIO ports.
The BD-ICDI board is a USB full-speed JTAG/SWD debugger board. It includes a USB miniB connector for connection to a USB PC port, and two shrouded header connectors for connection to the EK-LM3S9B92 board.
Development of software for the EK-LM3S9B92 is simplified by using Luminary Micro's comprehensive StellarisWare® peripheral driver library and ARM development tools from our tools partners. The Stellaris® LM3S9B92 Evaluation Board Kit includes the two boards described, a documentation CD, and cables. All design files are provided on the EK-LM3S9B92 CD.
Figure 1-1. LM3S9B92 Evaluation Board
Figure 1-2. In-Circuit Debug Interface Board
January 6, 2010 9
Stellaris® LM3S9B92 Evaluation Kit Overview
Kit ContentsThe EK-LM3S9B92 evaluation kit comes with the following:
EK-LM3S9B92 evaluation board
In-Circuit Debug Interface (BD-ICDI) board
– Connects to USB port on PC and to 10-pin, fine-pitch ARM JTAG connector on the EK-LM3S9B92 evaluation board
– Secondary 8-pin Power/UART connector provides power and virtual comm-port capability to the EK-LM3S9B92 evaluation board.
Cables
– USB miniB to USB-A cable
– USB-OTG to USB-A cable
– 10-pin ribbon cable for JTAG/SWD connection
– 8-pin ribbon cable for Power/UART connection
CD containing:
– A supported version of one of the following (including a toolchain-specific Quickstart guide):
• Keil™ RealView® Microcontroller Development Kit (MDK-ARM)
• IAR Embedded Workbench
• Code Sourcery GCC development tools
• Code Red Technologies development tools
• Texas Instruments’ Code Composer Studio™ IDE
– Complete documentation
– Quickstart application source code
– Stellaris® Firmware Development Package with example source code
Using the EK-LM3S9B92The recommended steps for using the EK-LM3S9B92 evaluation kit are:
1. Follow the Quickstart guide included in the kit. The Quickstart guide will help get the EK-LM3S9B92 LC Evaluation Board up and running in minutes.
2. Use your preferred ARM tool-chain and the Luminary Micro Peripheral Driver Library to develop an application. Software applications are loaded using the BD-ICDI board. See Chapter 3, “Software Development,” for the programming procedure. The StellarisWare Peripheral Driver Library Software Reference Manual contains specific information on software structure and function.
3. Customize and integrate the hardware to suit an end application. This user's manual is an important reference for understanding circuit operation and completing hardware modification.
FeaturesThe EK-LM3S9B92 evaluation kit provides the following features:
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Stellaris® LM3S9B92 Evaluation Kit User’s Manual
LM3S9B92 high-performance Stellaris microcontroller and large memory
– 32-bit ARM® Cortex™-M3 core
– 256 KB single-cycle Flash memory, 96 KB single-cycle SRAM, 23.7 KB single-cycle ROM
Ethernet 10/100 port with two LED indicators
USB 2.0 Full-Speed OTG port
Virtual serial communications port capability
Oversized board pads for GPIO access
User pushbutton and LED
Detachable ICDI board can be used for debugging other Luminary Micro boards
Easy to customize
– Includes full source code, example applications, and design files
– Develop using tools supporting FastMATH from Keil, IAR, Code Sourcery, and Code Red (using a Stellaris evaluation kit or preferred ARM Cortex-M3 debugger)
– Supported by Luminary Micro StellarisWare peripheral driver library
January 6, 2010 11
Stellaris® LM3S9B92 Evaluation Kit Overview
12 January 6, 2010
C H A P T E R 2
Hardware DescriptionThe EK-LM3S9B92 evaluation kit contains two boards: the EK-LM3S9B92 evaluation board and the BD-ICDI JTAG debug board as described in more detail in this chapter.
Evaluation BoardThe EK-LM3S9B92 evaluation board uses the Stellaris® LM3S9B92 microcontroller and includes a 10/100 Ethernet port and a USB 2.0 full-speed OTG port. The board is intended for use with the ICDI board, but can be used as a standalone board as well. Figure 2-1 shows the block diagram.
Figure 2-1. EK-LM3S9B92 Evaluation Board Block Diagram
Functional DescriptionMicrocontroller, Reset, GPIO Pads, and JTAG (Schematic page 1)
MicrocontrollerThe evaluation board uses the Stellaris EK-LM3S9B92 microcontroller. A 16 MHz crystal provides the main oscillator clock which can directly drive the ARM core clock or can drive an internal PLL to increase the core clock up to 80 MHz. A 25 MHz crystal is used for the Ethernet clock.
The LM3S9B92 microcontroller has an internal LDO voltage regulator that supplies power for internal use. This rail requires only three capacitors for decoupling and is not connected to any other circuits.
Stellaris LM3S9B92
Ethernet 10/100
5V
GPIOs
USB – OTG
3.3V Regulator
USB Power Switch
JTAG/SWD
PWR/UART
UART0
BOARD PADs
RESET
DPDT
VBUS
25MHz
16MHz
MOSC
Ethernet
USER LED
USER PUSHBUTTON
USB
JTAG
January 6, 2010 13
Hardware Description
ResetA reset switch and R-C network connects to the microcontroller’s RSTn input. The reset signal is also connected to the JTAG/SWD connector J1 to allow reset control from the debugger.
GPIO PadsFour groups of oversized board pads with a 0.1” spacing provide access to GPIO signals and standard 0.1” pitch headers can be soldered to these pads. Pads are labeled with the corresponding GPIO signal, and pads with no labels are unconnected. Note that GPIO signals required for operation of the Ethernet port, USB port, and JTAG port are reserved for board use and are not available on these pads. Figure 2-2 shows the pad groups.
Figure 2-2. GPIO Pads
GPIO JumpersSome of the GPIO signals used by the board are connected to board jumpers and can be disconnected to provide additional user GPIOs. GPIOs PA0/PA1/PB4/PD0/PF2/PF3 are connected to jumpers JR1-JR6 respectively. Each signal can be freed by cutting the trace of the corresponding jumper (cut at white line on silkscreen). The jumper pads have the same footprint as an 0603 SMT resistor. To reconnect a previously cut jumper, solder a 0 ohm resistor to the corresponding jumper footprint.
JTAG/SWDThe JTAG/SWD connector J1 is used for program download and debug. This is a 2x5 fine pitch (0.050”) ARM JTAG connector, see (Figure 2-3) for signal definition. The LM3S9B92 microcontroller supports JTAG debug, Serial Wire Debug (SWD), and Serial Wire Out (SWO) trace with this connector. The ICDI board connects via a 10-wire ribbon cable to this connector.
Figure 2-3. JTAG/SWD Connector
GPIO Pads – Top left
SHDN
PD1PD0
PD2PD3
PD4PD5
PD6PD7
PC5
PC4 PC7
PC6
GPIO Pads – Bottom left
PA4
PA7
PA6
5VR
5V PB2PB
3PB
4PB5
PB6
PB7
PA1PA0PA
3PA2 PA
5GND
GND
GPIO Pads – Top right
PJ4 PJ7PJ6
VBUSPG
7PH0
PH1
PH2
PH5PH
6PH
7
PJ1PJ0 PJ3PJ2 PJ5 PG0
PG1
GPIO Pads – Bottom right
PE4
PE7PE6
PF1PF0 PF2 PF3
PF4
PF5
PE1
PE0
PE3
PE2
PE5
3.3V
GND
TMS/SWDIOTCK/SWCLK
TDO/SWOTDI
RSTn GND
GNDGND3.3V
N/C
12
910InInOut
I/OIn
Out
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Stellaris® LM3S9B92 Evaluation Kit User’s Manual
PWR/UARTThe PWR/UART connector J2 is used to provide 5 V power from the ICDI board and also to connect the LM3S9B92 UART0 signals. This is a 2x4 fine pitch (0.050") connector, see (Figure 2-4) for signal definition. The UART0 signals are connected to GPIO jumpers JR1 and JR2 and can be disconnected from connector J2 if required, see “GPIO Jumpers” on page 14. The ICDI board connects via an 8-wire ribbon cable to this connector.
Figure 2-4. PWR/UART Connector
Ethernet, USB, Power and Miscellaneous (Schematic page 2)Page 2 of the schematics contains the Ethernet RJ45 connector, USB power switch and USB OTG connector, 3.3 V regulator, and power switch selector.
Ethernet PortThe on-board RJ45 connector provides a 10/100 base T Ethernet port. The RJ45 connector includes integrated LEDs and magnetics. The LEDs are connected to GPIO jumpers JR4 and JR5 and can be disconnected from the RJ45 connector if required, see GPIO Jumpers section.
USB PortThe on-board USB microAB connector provides a USB 2.0 full-speed port. To use as an On-The-Go (OTG) port, the power selector switch SW3 lever must be set to EXT. This selects an external 5 V power source to provide power to the board and the USB power switch. If the SW3 lever is set to USB, power to the board is received from USB, the on-board USB power switch output is disconnected from USB, and the board can only be used as a USB device. When using the USB-OTG port in Host mode, the current provided to a USB device should be limited to 100 mA or less when powered from the ICDI board. If powered from the 5 V test pad, then this can be increased to 500 mA.
Board PowerThe board requires 5 V for operation, and switch SW3 is used to select the power source. If the switch lever is moved towards the USB label on the board, power is received from the USB connector. If the switch lever is moved towards the EXTernal board label, the board is powered from the PWR/UART connector and the ICDI board provides power to this connector. DC regulator U2 generates 3.3 V for powering the board circuits and includes power indicator LED D1.
User DevicesPushbutton switch SW2 and LED D2 are available for the user and connected to PB4 and PD0 respectively. These GPIOs are connected to GPIO jumpers JR3 and JR4 and can be disconnected from SW2 and D2 if required, see GPIO Jumpers section.
VCP_TXVCP_RX
GNDGNDN/C
12
78
N/C5V 5V
Out
InIn
In
January 6, 2010 15
Hardware Description
In-Circuit Debug Interface BoardThe ICDI board is used to download and debug programs on the EK-LM3S9B92 evaluation board, but can also be used for debug of other Luminary Micro boards. A block diagram is shown in Figure 2-5.
Figure 2-5. In Circuit Debug (ICDI) Board Block Diagram
Functional DescriptionUSB to JTAG/SWD, Power (Schematic page 1)
USBAn FTDI USB to serial protocol chip is used for the USB 2.0 full-speed device controller. This is connected to a USB miniB connector and to a set of buffers/multiplexers. A 1-kbit serial EEPROM contains USB configuration data which is read at power up.
PowerThe board receives 5 V power from the USB bus. A DC regulator generates 3.3 V for on-board circuits, when on LED D1 (POWER) is lit on.
HeadersThree headers are on-board, a 10-pin JTAG/SWD header J1, an 8-pin PWR/UART header J2, and an optional 20-pin JTAG/SWD header J3. The 10-pin and 8-pin headers are used to connect to the EK-LM3S9B92 evaluation board.
JTAG/SWDJTAG/SWD connector J1 connects to the EK-LM3S9B92 evaluation board with a ribbon cable for program download and debug. This is a 2x5 fine pitch (0.050”) ARM JTAG connector, see (Figure 2-6) for signal definition.The ICDI supports JTAG debug, SWD (Serial Wire Debug), and SWO (Serial Wire Out) trace with this connector.
Optional JTAG/SWD connector J3 is a 2x10 standard pitch (0.1”) ARM JTAG connector directly connected to J1, see (Figure 2-7) for signal definition. This allows the ICDI to connect to targets that use a 2x10 connector. It also allows the use of an external 2x10 debugger on targets with the
FTDI
PortA
3.3V Regulator
USB
RESET
VBUS6MHz
OSC
JTAG/SWD
PWR/UARTJTAG/SWD
MUX
EEPROM
PortB
POWER
2x4
2x10
JTAG/SWD
2x5
ACTIVEDEBUG
USB
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Stellaris® LM3S9B92 Evaluation Kit User’s Manual
fine pitch connector, including the EK-LM3S9B92. The signal direction shown for J1 and J3 applies when the ICDI is used as the JTAG/SWD debugger and LED D2 (DEBUG ACTIVE) is lit on. In this case only one of the two connectors J1/J3 should be used.
The ICDI can also be used as a 20-pin to 10-pin adapter for external JTAG debuggers. Note that the DEBUG ACTIVE LED must be off before connecting any external JTAG debuggers.
Figure 2-6. JTAG/SWD Connector J1
Figure 2-7. JTAG/SWD Connector J3
PushbuttonPushbutton SW1 (RESET) is provided to manually generate the SRSTn signal to the target device. The SRSTn signal can also be generated under program control.
PWR/UARTThe PWR/UART connector J2 connects to the EK-LM3S9B92 evaluation board with a ribbon cable and provides 5 V power and a virtual communications port connection. This is a 2 x 4 fine pitch (0.050”) connector, see (Figure 2-8) for signal definition. Signals DBG1/DBG2 are reserved.
Figure 2-8. PWR/UART Connector
TMS/SWDIOTCK/SWCLK
TDO/SWOTDI
SRSTn GND
GNDGNDVSENSE
N/C
12
910
In
OutOut
OutIn
I/O
TMS/SWDIOTCK/SWCLK
TDO/SWO
TDI
SRSTn
12
1920GNDGNDGNDGNDGNDGNDGNDGNDGND
N/CN/C
N/C
N/CN/C VSENSE In
Out
Out
Out
In
I/O
VCP_TXVCP_RX
GNDGNDDBG1
12
78
DBG25V 5V
In
Out
Out
Out
January 6, 2010 17
Hardware Description
JTAG / SWD Multiplexer (Schematic page 2)
BuffersA set of tri-state buffers is used to multiplex JTAG and SWD signals, and also multiplex the UART VCP_TX signal with the SWO signal. LED D2 (DEBUG ACTIVE) is lit on when these buffers are enabled. To avoid signal contention, external JTAG debuggers should not be connected when DEBUG ACTIVE is on.
18 January 6, 2010
C H A P T E R 3
Software DevelopmentThis chapter provides general information on software development as well as instructions for Flash memory programming.
Software DescriptionThe software provided with the EK-LM3S9B92 provides access to all of the peripheral devices supplied in the design. The StellarisWare® Peripheral Driver Library is used to operate the on-chip peripherals.
The software includes a set of example applications that utilize the StellarisWare Peripheral Driver Library. These applications demonstrate the capabilities of the LM3S9B92 microcontroller, as well as providing a starting point for the development of the final application for use on the EK-LM3S9B92.
Source CodeThe complete source code is included on the EK-LM3S9B92 CD. Refer to the Quickstart Guide for a detailed description of hardware setup and how to install the source code. The source code and binary files are installed in the DriverLib tree.
Tool OptionsThe source code installation includes directories containing projects and/or makefiles for the following tool-chains:
Keil ARM RealView® Microcontroller Development System
IAR Embedded Workbench for ARM
CodeSourcery G++
Code Red Technology Red Suite
Generic Gnu C compiler
Evaluation versions of these tools may be downloaded from www.ti.com/stellaris. Due to code size restrictions, the evaluation tools may not build all example programs. A full license is necessary to re-build or debug all examples.
Instructions on installing and using each of the evaluation tools can be found in the Quickstart guides (for example, Quickstart-Keil, Quickstart-IAR) which are available for download from the evaluation kit section of our web site at www.ti.com/stellaris.
For detailed information on using the tools refer to the documentation included in the tool chain installation or visit the website of the tools supplier.
Programming the EK-LM3S9B92 BoardThe EK-LM3S9B92 software package includes pre-built binaries for each of the example applications. If you installed DriverLib to the default installation path of C:/DriverLib, you can find the example applications in “C:/DriverLib/boards/ek-tempest”. The ICDI board is used along with Luminary Micro's LM Flash Programmer tool to program applications on the EK-LM3S9B92 board.
January 6, 2010 19
Software Development
To program example applications into the EK-LM3S9B92 evaluation board using the ICDI board:1. Install LM Flash Programmer on a Windows PC.
2. Connect the 10-wire ribbon cable to the 10-pin header on the ICDI board and to the 10-pin header on the EK-LM3S9B92 board. The red stripe on the ribbon cable should be facing the bottom of the connectors (see Figure B-5 on page 29).
3. Connect the 8-wire ribbon cable to the 8-pin header on the ICDI board and to the 8-pin header on the EK-LM3S9B92 board. The red stripe on the ribbon cable should be facing the bottom of the connectors (see Figure B-5 on page 29).
4. Verify that slide switch SW3 on the EK-LM3S9B92 board is set to EXTernal.
5. Connect the USB cable A-plug to an available port on the PC and the miniB-plug to the ICDI board.
6. Verify that POWER LED D1 on the ICDI board is lit and POWER LED D1 on the EK-LM3S9B92 board is also lit.
7. Run LM Flash Programmer.
8. In the Configuration tab, use the Quick Set control to select LM3S9B92 Evaluation Board.
9. Move to the Program tab and click the Browse button. Navigate to the example applications directory (the default location is “C:/DriverLib/boards/ek-tempest/).
10. Each example application has its own directory. Navigate into the example directory that you want to load and then into the directory which contains the binary (*.bin) files. Select the binary file and click Open.
11. Set the “Erase Method” to “Erase Necessary Pages” and check the “Verify After Program” box.
12. Next, click the Program button to start the Erase, Download and Verify process. The DEBUG ACTIVE LED (D2) on the ICDI will turn on at this time.
13. Program execution will start once Verify is complete.
The EK-LM3S9B92 design uses a Stellaris® LM3S9B92 microcontroller to handle networking, USB-OTG, and peripheral functions. The entire circuit is built on a compact four-layer printed circuit board. All design files are provided on the EK-LM3S9B92 CD.
20 January 6, 2010
January 6, 2010 21
SchematicsThis section contains the schematics for the EK-LM3S9B92 evaluation board and also the BD-ICDI debug board.
EK-LM3S9B92 Evaluation BoardMicrocontroller, Reset, and Headers on page 22
Ethernet, USB, and Power on page 23
BD-ICDI BoardUSB to JTAG, SWD, Headers, and Power on page 24
JTAG/SWD Multiplexer on page 25
A P P E N D I X A
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
Document Number: Rev
SheetDate: of5/18/2009 1 2
B
Designer:
Drawn by:
Approved:
Drawing Title:
Page Title:
Size
Arnaldo Cruz
Arnaldo Cruz
* 0001
EK-LM3S9B92 Evaluation Board
Tempest, Reset, Test Pads
B
108 Wild Basin Rd.Suite 350Austin, TX 78746
Texas InstrumentsC1818pF
C1718pF
C1618pF
C1518pF
RSTn
OSCinOSCout
XTALNXTALP
R812.4K
R7 9.1k
USBDPUSBDM
3.3V
C22
1uF
C190.1uF
C70.1uF
C80.1uF
C90.1uF
C100.1uF
C110.1uF
C61uF
C130.1uF
C200.1uFC23
0.1uF
ETH_TXOPETH_TXONETH_MDIO
ETH_LED0
ETH_LED1
ETH_RXIPETH_RXIN
USBPWRUSBFLT
USBID
3.3V
TMSTCKTDOTDI
C1
0.1uF
VBUS
PF4
PB4PB5PB6PB7
PD0PD1PD2PD3PD4PD5PD6PD7
PF0PF1
PB2PB3
PH0PH1PH2
PH5PH6PH7
PJ0PJ1
PG0PG1
PE1PE2PE3PE4PE5PE6PE7
PC4PC5PC6PC7
PA0PA1PA2PA3PA4PA5PA6PA7
PG7
3.3V
R610K
C2
0.1uF
R4 10K
PC0PC1PC2PC3
R3 10KR2 10KR1 10K
PB2PB3PB4PB5PB6PB7
PD0PD1PD2PD3PD4PD5PD6PD7
PF0PF1PF2PF3PF4PF5
PH0PH1PH2PH5PH6PH7
PE0PE1PE2PE3PE4PE5PE6PE7PG0 PG1
PG7
1 4
2 3RESET
SW1
PJ0PJ1PJ2
PE0
PF5
RSTn
PA0PA1PA2PA3PA4PA5PA6PA7
PC4PC5PC6PC7
5V
1 2Y1
16.000 MHz
C120.1uF
C140.1uF
SHDNn
VBUS
1 2Y2
25.000 MHz
JTAG/SWD
13579
246810
J1
HDR 2X5-MH-SHRD
VCP_RX
5V
PWR/UART
1357
2468
J2
HDR 2X4-MH-SHRD
DBG1DBG2
TP1TP2TP3TP4TP5TP6TP7TP8TP9TP10TP11TP12TP13TP14TP15TP16TP17
TP18TP19TP20TP21TP22TP23TP24TP25TP26TP27TP28TP29TP30TP31TP32TP33TP34
TP35TP36TP37TP38TP39TP40TP41TP42TP43TP44TP45TP46TP47TP48TP49TP50TP51
TP52TP53TP54TP55TP56TP57TP58TP59TP60TP61TP62TP63TP64TP65TP66TP67TP68
FB1
120o
hm @
100
MH
z
PA0
PA1
VCP_RX
VCP_TX
PB4
PD0
USR_PBn
USR_LED
JR1
JR2
JR3
JR4
VCP_TX
JR5
JR6
PF2
PF3
PF2PF3
5VR
3.3V
R23 10
PJ3PJ4PJ5PJ6PJ7PJ2
PJ3PJ4PJ5PJ6PJ7
PA0/U0RX26
PA1/U0TX27
PA2/SSI0CLK28
PA3/SSI0FSS29
PA4/SSI0RX30
PA5/SSI0TX31
PC0/TCK/SWCLK80
PC1/TMS/SWDIO79
PC2/TDI78
PC3/TDO/SWO77
PC425
PC524
PC623
PC722
PD0 10
PD1 11
PD2 12
PD3 13
PD4 97
PD5 98
PD6 99
PD7 100
GND9
GND21
ERBIAS33
RST64
LDO 7
OSC048
OSC149
PB0/USB0ID 66
PB1/USB0VBUS 67
PB2/I2C0SCL 72
PB3/I2C0SDA 65
PB4 92
PB5 91
PB6 90
PB7 89
PE074
PE175
PE295
PE396
PE46
PE55
PA634
PA735
PE62
PE71
PF0 47
PF1 61
PF2/LED1 60
PF3/LED0 59
MDIO 58
TXON 46
TXOP 43
PF4 42
PG019
PG118
XTALNPHY17
XTALPPHY16
PF541
RXIP40
RXIN37
PG736
PH0 86
PH1 85
PH2 84
PH3/USB0EPEN 83
AVDD 3AGND4
VDD33 8
VDD33 20
VDD33 32
VDD33 44
VDD33 56
VDD33 68
VDD33 81
VDD33 93
GND45
GND57
GND69
GND82
GND94
CVDD 38
CVDD 88
NC51
PH4/USB0PFLT 76
USB0DP 71
USB0DM 70
USB0RBIAS 73
PH5 63
PH6 62
PH7 15
PJ0 14
PJ1 87
PJ2 39
PJ3 50
PJ4 52
PJ5 53
PJ6 54
PJ7 55
U1
LM3S9B92
Revision
A 2/24/2009 First release for prototypes.
Date Description
B 4/15/2009 Released to production.
CVDD
Schematic page 1
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
Document Number: Rev
SheetDate: of5/18/2009 2 2
B
Drawing Title:
Page Title:
SizeB
Ethernet, USB, Power
EK-LM3S9B92 Evaluation Board
0001
C250.1uF
C320.01uF
C260.01uF
C310.1uF
R1349.9
R1649.9
3.3V
6
5
8
4
2
3
1
7
1CT:1
TX+
TX-
RX+
RX-1CT:1
Y+
Y-
G+
G-
3
8
7
4
5
6
1112
21
GL
GR
910
NC
GND
ETHERNET 10/100
J6
PulseJack_RJ45_SMT
R1010K
R11330
R12330 R14
49.9
R1749.9
ETH_RXIPETH_RXIN
ETH_TXOP
ETH_TXON
ETH_MDIO
ETH_LED0ETH_LED1
3.3V
R21 10K
5V
VIN4 VOUT 5
SHDN3
GND2 NR 1
U2
PQ1LA333MSPQ
R20330
PWR
D1GREEN_LED
R18330
USR
D2GREEN_LED
3.3V
R1510K1 4
2 3
USR PB
SW2
OC 3
VIN5
EN4
GND2
VOUT 1U3
TPS2051B
R2210K
3.3V
R1910K
VOUTUSBPWR
USBFLT
C384.7uF
USR_PBn
USR_LED
SHDNn
VBUS
5V
C2710pF
C2810pF
C2910pF
C3010pF
USBDPUSBDM
VBUS
USBID
FB2
120ohm @ 100 MHzFB3
120ohm @ 100 MHz
C36
0.1uF
C35
0.1uF
C334.7uF
C344.7uF
C374.7uF
21
3
54
6
SW3
Switch DPDT
VUSB
VBUS D- D+ ID G
1 2 3 4 5
J5 USB Micro AB
G1 G2
5VR
100 Mil Mask
FID340 Mil Pad
100 Mil Mask
FID140 Mil Pad
100 Mil Mask
FID240 Mil Pad
Fiducials
R25 10
R26 10
CVDD
VIN1
PG 4GND2
VOUT 6
EN3 ADJ 5
U4
FAN2558ADJR29100K
R28113K
R27 10KNote:U4, R27, R28, and R29 required only for LM3S9B92 rev B1.See errata.
Schematic page 2
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
Document Number: Rev
SheetDate: of5/18/2009 1 2
B
Designer:
Drawn by:
Approved:
Drawing Title:
Page Title:
Size
Arnaldo Cruz
Arnaldo Cruz
* 0001
In Circuit Debug Interface (ICDI) Board
USB to JTAG, SWD
B
108 Wild Basin Rd.Suite 350Austin, TX 78746
Texas Instruments
1 2Y1
6.000MHz
3.3V
3.3V
5V
5V
R5 27
R71.50k
R9 2.21k
USBP
USBM
5V
VCP_RXVCP_TX_SWO
R13330
VCP_RX
5V
5V
3.3V
C124.7uFC11
4.7uF
5V
VIN4 VOUT 5
SHDN3
GND2 NR 1
U3
PQ1LA333MSPQ
C718pF
C818pF
PWR/UART
1357
2468
J2
HDR 2X4-MH-SHRD
R15330
PWR
D1GREEN_LED
FB1
120ohm @ 100 MHz
5V D- D+ ID G
1 2 3 4
G2
5
G1
G3 G4J4 USB_MINI_B_RECEPTACLE
XTIXTO
UDM
UDP
EECSEESKEEDATA
FT_SKFT_DOFT_DIFT_CS
DBGENnDBGMOD
VCP_TX_SWO
SWO_EN
TCK
TDITDO_SWO
TMS_SWDIO
VCP_TX
1234567891011121314151617181920
JTAG/SWD
J3
2X10 HDR-SHRD
JTAG/SWD
13579
2468
10J1
HDR 2X5-MH-SHRD
TCK
TMS
TDI
TDO
SRSTn
3.3V
DBG1
DBG1DBG2
1 4
2 3RESET
SW1
12 11
13
U5DSN74LVC125A
DBGRSTn
SRSTn
VSENSE
R12475
CS 1
SK 2
DI 3
DO 4GND5
NC7
ORG6
VCC8
1K 64X16
U2
CAT93C46
FB2
120ohm @ 100 MHz
VBUS
DBG2
DEBUG ACTIVE
D2GREEN_LED
R110K
R210K
R310K
R410K
R11 10K
R810K
R1010K
R1410K
R6 27
C10.1uF
C90.1uF
C20.1uF
C30.1uF
C40.1uF
C50.1uF
C60.1uF
C130.1uF
GND18
GND25
GND34
ADBUS0 24
ADBUS1 23
ADBUS2 22
ADBUS3 21
ADBUS4 20
ADBUS5 19
ADBUS6 17
ADBUS7 16
ACBUS0 15
ACBUS1 13
ACBUS2 12
ACBUS3 11
BDBUS0 40
BDBUS1 39
BDBUS2 38
BDBUS3 37
BDBUS4 36
BDBUS5 35
BDBUS6 33
BDBUS7 32
BCBUS0 30
BCBUS1 29
BCBUS2 28
BCBUS3 27
SI/WUA 10
SI/WUB 26
GND9
AGND45
VCC 3
VCC 42
VCCIOA 14
VCCIOB 31
AVCC 46
PWREN# 41
XTOUT44 XTIN43
EECS48
EESK1
EEDATA2
TEST47
RESET#4
RSTOUT#5
3V3OUT6
USBDM8
USBDP7
U1
FT2232
Revision History
Revision
A 2/24/2009 First release for prototypes.
Date Description
B 4/03/2009 Released for production.
R19 10
Schematic page 1
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
Document Number: Rev
SheetDate: of4/9/2009 2 2
B
Drawing Title:
Page Title:
SizeB
JTAG, SWD Mux
In Circuit Debug Interface (ICDI) Board
0001
3.3V
FT_SK
FT_DO
FT_DI
FT_CS
DBGENn
DBGMOD
VCP_TX_SWO
SWO_EN
2 3
1
U4ASN74LVC125A
5 6
4
U5BSN74LVC125A
98
10
U5CSN74LVC125A
12 11
13
U4DSN74LVC125A
147
VCC
GND
U5ESN74LVC125A
2 3
1
U5ASN74LVC125A
147
VCC
GND
U4ESN74LVC125A
564
U4BSN74LVC125A
9 8
10
U4CSN74LVC125A
2 3
1
U6ASN74LVC126A
5 6
4
U6BSN74LVC126A
98
10
U6CSN74LVC126A
1211
13
U6DSN74LVC126A
147
VCC
GND
U6ESN74LVC126A
3.3V
TCK
TDI
TDO_SWO
TMS_SWDIO
VCP_TX
3.3V
R16 27
R17 27
R18 27
R2010K
R2110K
R2210K
C140.1uF
C150.1uF
C160.1uF
100 Mil Mask
FID340 Mil Pad
100 Mil Mask
FID140 Mil Pad
100 Mil Mask
FID240 Mil Pad
Fiducials
Schematic page 2
26 January 6, 2010
A P P E N D I X B
Connection DetailsThis appendix contains the following sections:
Component Locations (see page 27)Board Dimensions (see page 28)Board Connectivity (see page 29)References (see page 29)
Component LocationsFigure B-1. EK-LM3S9B92 Evaluation Board Component Locations
Figure B-2. BD-ICDI Board Component Locations
January 6, 2010 27
Board Dimensions
Board DimensionsFigure B-3. EK-LM3S9B92 Evaluation Board Dimensions
Figure B-4. In-Circuit Debug Interface Board Dimensions
4.00
1.40
0.07
0.07
0.07
0.07
0.07
0.070.34Ø 0.100
2.50
1.40
0.07
0.07
0.07
0.07
Ø 0.1000.07
28 January 6, 2010
Stellaris® LM3S9B92 Evaluation Kit User’s Manual
Board ConnectivityFigure B-5. ICDI – EK-LM3S9B92 Board Connectivity
ReferencesIn addition to this document, the following references are included on the Stellaris Evaluation Kit CD-ROM and are also available for download at www.ti.com/stellaris:
Stellaris LM3S9B92 Data Sheet, publication DS-LM3S9B92StellarisWare Driver LibraryStellarisWare Driver Library User’s Manual, publication SW-DRL-UG
Additional references include:FT2232D Dual USB/UART FIFO IC Datasheet, version 0.91, 2006, Future Technology Devices International Ltd.Information on development tool being used:
– RealView MDK web site, www.keil.com/arm/rvmdkkit.asp
– IAR Embedded Workbench web site, www.iar.com
– Code Sourcery GCC development tools web site,www.codesourcery.com/gnu_toolchains/arm
– Code Red Technologies development tools web site, www.code-red-tech.com
– Texas Instruments’ Code Composer Studio™ IDE web site, www.ti.com/ccs
BD-ICDIBoard
EK-LM3S9B92Evaluation Board
8-wire cable
JTAG/SWD
PWR/UART
10-wire cable
January 6, 2010 29
References
30 January 6, 2010
A P P E N D I X C
Microcontroller GPIO AssignmentsThe following table shows the LM3S9B92 GPIOs used by the EK-LM3S9B92 board. All other GPIOs are available for use and accessible on the test pads.
Table C-1. EK-LM3S9B92 Evaluation Board GPIO Usage
Port Function Board Signal Usage Description
PA0 U0RX VCP_RX
UART
Virtual Communications port receive signal from J2 header. To disconnect from header cut JR1 jumper.
PA1 U0TX VCP_TX Virtual Communications port transmit signal to J2 header. To disconnect from header cut JR2 jumper.
PB0 USB0ID USBID
USB
USBID signal from the USB-On-the-Go connector J5.
PB1 USB0VBUS VBUS USB VBUS input signal from USB-OTG connector J5 for sensing VBUS levels.
PB4 GPIO USR_PBn User Input from user pushbutton SW2. To disconnect from pushbutton cut JR3 jumper.
PC0 TCK/SWCLK PC0
JTAG/SWD
JTAG or SWD clock input
PC1 TMS/SWDIO PC1 JTAG TMS input or SWD bidirectional signal SWDIO
PC2 TDI PC2 JTAG TDI signal input.
PC3 TDO/SWO PC3 JTAG TDO output or SWD trace signal SWO output.
PD0 GPIO USR_LED User Output to user LED D2. To disconnect from LED cut JR4 jumper.
PF2 LED1 ETH_LED1
Ethernet
Output to RJ45 jack J6 yellow LED. To disconnect from LED cut JR5 jumper.
PF3 LED0 ETH_LED0 Output to RJ45 jack J6 green LED. To disconnect from LED cut JR6 jumper.
PH3 USB0EPEN USBPWR
USB
Output to USB-OTG power switch U3. When set high it enables the USB-OTG power switch to provide USB VBUS power to USB-OTG connector J5. When set low power switch U3 is disabled.
PH4 USB0PFLT USBPFLT
Overcurrent input status from USB-OTG power switch U3. When high the power switch status is normal. When low an overcurrent condition has been detected by the switch.
January 6, 2010 31
32 January 6, 2010
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