Strained Silicon Technology

8/3/2019 Strained Silicon Technology

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Strained Silicon Technology

TANZEEM IQBAL

M.Tech 3rd SEM.(EC&SD)10LEM301


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Overview Introduction

CMOS

CMOS Scaling

Strained SiliconWhy Strained Silicon ?

How does it work ?

How do we make it ? Drawbacks

Conclusions

References


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Introduction (CMOS History)

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The first ever MOSFET transistor wasdesigned by M. M. Atalla, D. Kahng, andE. Labate in late1959

first commercially availableintegrated circuit made byFairchild Semiconductor in 1960

Intel 4004 microprocessor in 1971Intel Pentium 4 released in late

90s


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CMOS

Complementary Metal-oxide-semiconductorfield-effect transistors

CMOS devices based on sophisticated Si are afundamental building block for mainstreamintegrated circuits

Technology drivers in the microelectronics

industry

Due to excellent scalability and integrationability


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Moores Law

More and moretransistors every year

Higher and higher

speeds How can we continue

to innovate and movefaster?


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CMOS scaling

Scaling of CMOS devices has reached innanometers

At nanoscale short channel effects occurs

SCE will degrade the current drivability andelectron mobility of MOSFET

Therefore, further improvement is required to goahead in scaling


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Short Channel Effects

As the channel length L is reduced to increase both theoperation speed and the number of components perchip, the so-called short-channel effects arise.

The short-channel effects are attributed to two physicalphenomena:

1. The limitation imposed on electron drift characteristics inthe channel,

2. The modification of the threshold voltage due to theshortening channel length.


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CMOS scaling

END OF TRADITIONAL SCALING ERA ~ 2003

Lasted ~40 YEARS

2X transistors

every 2 years

Traditional Scaling Era


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How scaling reduces Mobility ?

As gate length reduces vertical electric fieldincreases

This leads to velocity saturation

In velocity saturation, drift velocity remainsconstant after a fixed value of electric field


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Need for High Current drivability

In highly interconnected integrated circuits, thehigh current drivability of the transistors is veryimportant for the circuit performance

Circuit speed is dominate charging/dischargingof the load capacitance

We need mechanism so that we can increasethe current drivability in nanoscale CMOS

devices


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How to go ahead with scaling ?

To follow Moores Law, we will have to innovateand use materials that results in further scalingwithout performance degradation


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CMOS

CMOS Scaling

Strained Silicon

Why Strained Silicon ?

How does it work ?


Conclusions

References


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Strained Silicon

As gate length shrinks, mobility decreases

Method to increase mobility of electrons andholes in the channel of an FET

Tensile and compressive strain applied tochannel


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Strained Silicon


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Strained Silicon

Drain Current Improvement


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Strained silicon

How does it work?

Basic idea: Change the lattice constant of thematerial

Changes energy band structure!


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Strained Silicon


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Strained Silicon: Electrons


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Strained Silicon: Electrons

Electrical symmetry destroyed by strain Four energy valleys go down in energy, two

go up

Change in curvature

Reduction in effective mass!


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Strained Silicon: Holes

What about the holes?

Uniaxial strain reduces effective mass

Biaxial Strain splits LH and HH bands, reduces scattering


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Fabrication of strained silicon

Effect was noticed in early 1950s

Generally an effect to be avoided

In recent years, scaling has become more difficult

Idea revived at MIT in early 1990s


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Two types of strain

Compressive

Tensile

Two directions of strain

Uniaxial

Biaxial

Fabrication of strained silicon


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Biaxial Fabrication

Biaxial techniques pioneeredfirst

Method preferred by IBMthough examined by all majorsemiconductor firms

Graded SixGe1-x layer grown onsilicon substrate

Si Lattice constant = 5.4309 Ge Lattice constant = 5.6575


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Biaxial Fabrication

Additional SixGe1-x grown ontop of graded layer

Thin layer of siliconepitaxially grown on layer ofSiGe SiGe has larger lattice

constant than Si (1% larger) Strains the x and y

directions


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Strained Silicon on Insulator(SSOI)

SiGe on insulator, with silicon epitaxiallygrown on SiGe

Positive benefits of SOI (lower capacitances, faster

switching, lower leakage) as well as benefits ofstrain

But wouldnt it be good if we could do

strained silicon on insulator without SiGeunderlayer?


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Problems in Biaxial Strain

It takes high germanium content for high holemobility

Less throughput as compared to uniaxial strain

Biaxial strain is not cost effective


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Uniaxial Strain

Method preferred by INTEL

Problems with Biaxial strain

Reexamine the problem Need strain in the channel of

the MOSFET

Tensile strain in NMOS

Compressive in PMOS

Strain needed in directionfrom source to drain


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Uniaxial Strain

NMOS Standard fabrication

Cap with SiNx High temperature

deposition

Uniaxial Strain Only onedirection

10% increase in Idsat


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Uniaxial Strain

PMOS Remove source and

drain

Selectively grow epi-SiGein source and drain

Nickel Silicide grown onsource, drain and gate

Improvements in Idsatof 25%-30%


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Recent Strained Silicon TechnologyNodes


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CMOS

CMOS Scaling

Strained Silicon

Why Strained Silicon ?

How does it work ?


Conclusions

References


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Drawbacks

Strain is always a problem

Unwanted strain changes wave functions

Work always done to remove the strain

Proposals to actually increase the strain instead


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Conclusions

Strain in Silicon can increase mobility in NMOS andPMOS FETs

Biaxial and Uniaxial strain techniques are developed

In use by major players


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References

Alexey G. Shapin, Sergey V. Kalinin Strained Silicon as New High-Speed Technology. 7th International Siberian Workshop And Tutorials,EDM2006

Zoolfakar A.S, Ahmad A. Holes Mobility Enhancement Using StrainedSilicon,SiGe Technology. 5th International Colloquium on SignalProcessing & Its Application(CSPA)

Min Chu, Yongke Sun Strain: A Solution for Higher carrier mobility in NanoscaleSilicon Annual Review of Material Research 2009

K. Mistry, M. Armstrong Delaying Forever: Uniaxial Strained Silicon Transistors ina 90nm CMOS Technology 2004 Symposium on VLSI Technology Digest ofTechnical Papers

M. Reiche O. Moutanabbir Strained Silicon DevicesSolid State Phenomena Vols.156-158 (2010) pp 61-68

A.G.ONeill, S H OlsenStrained Silicon Technology, 2006 IEEE Scott E. Thompson, Guangyu Sun Uniaxial-Process-Induced Strained Si:Extending

the CMOS Roadmap IEEE Transactions on Electron devices, vol. 53, no. 5, May2006


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THANK YOU

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Strained Silicon Technology

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