JKAU

Sci..

vol. 8, pp. 55- 66 (1416 A.H.!]996 A.D.)

Study and Characterization ofa New Trapezoidal ChannelMOSFET for Negative Resistance Applications

FAHAD AL-MARZOUKI, ADEL EL-HENNAWY and SAID AL-GHAMDI

Physics Department. Faculty of Science.King Abdulaziz University, Saudi Arabia

ABSTRACT. MOSFET transistors may be fabricated with a variety of gategeometries. The trapezoidal shape provides a new interesting one. If this non-standard geometry is made dependent on the biasing conditions, originalbehaviour and new I- V characteristics are expected to be obtained. This paperpresents a study and characterization of this new device and shows that it pro-vides a voltage controlled negative resistance. It is seen to have many notice-able advantages over those devices which are already known..

1. Introduction

In the last ten years, solid state scientists gave great attention to and struggled to realizea negative resistance device which is easy to control and reliable when used in originalVLSI Applications[I-31. They realized quickly that negative resistance devices w~re nei-ther easy to control nor usable in many applications[21. These devices were not compati-ble with the MOSNLSI technology[2.41. They were also associated with serious drawbacks. Bad reproducibility, instability, narrow dynamic region of operation (some milli-volts, some milliamperes) and bad noise figures are examples of drawbacks whichmade it difficult to use these devices without considerable precautions[2,4,6]. The paperpresents a new MOSFET negative resistance device which is free from the majority ofdrawb~cks of those devices which are already known. It incorporates a trapezoidalchannel MOSFET which is so designed that the channel form is bias dependent. Anoriginal technique is employed which makes the channel width close to the draindecrease as the drain voltage V DS increases.

Section 2 explains the construction and presents the theory of operation and model~ing of the new negative-resistance trapezoidal-channel MOSFET (NRTC MOSFET).Experimental and simulation results are given in section 3. Discussion and conclusionsare finally debated in section 4.

55

56 Fahad AI-Marzouki et al.

2. Theory of Operation and Modeling

This section comprises presentation of the new negative-resistance device construc-tion and its theory of operation. It also develops analytical modeling for evaluating thedevice characteristics and predicting its performance.

2.1 Construction and Theory of Operation

The new negative-resistance trapezoidal-chan~el MOSFET is constructed as shownin Fig. (I) of a rectangular gate MOSFET with L, Z and do being the channel length,width and depth respectively, ho is the oxide layer thickness. A semitriangular floatinggate piece Fa is introduced below the control gate CO close to the drain. The heightand base length of the rectangular part of1he floating gate piece are L\lo and Z respec-tively. This piece is charged to a certain potential AV F' When the MOSFET is switchedinto saturation (V os ?: V GS -V T) and pinch-off is to occur, the potential at the edge ofthe source-region of the channel close to the drain should be equal to V GS -V T even ifVos is increased, further, to values greater than Vos = V GS -V T' However channel

regions lying below the semi triangular floating gate piece acquire potential equal toV GS + A V F -V T which is still greater than the value needed to establish pinch-off nearthe drain. As a consequence, pinch-off does not take place beneath the floating gatepiece (over a width Z') while occurring elsewhere. The channel current stream accom-modates itself in a trapezoidal formed channel and drain widths Z and Z' respectively.

As VOS is increased over its saturation value (Voss = V GS -V T)' the source-region

channel length Ls shrinks back, while the length L\l of the pinch-off region increases. Asa result the effective drain width of the channel Z'decreases and the channel currentwill be forced to undergo a more steeper trapezoidal stream.

As will be shown later, the MOSFET saturation current is expected to decrease asVos is increased (due to decreasing of the drain channel Z'). This means that the I-Vcharacteristic acquires a negative slope which indicates that the presented devide pro-vides a negative resistance.

2.2 Model

Referring to Fig. (I) where the NTRC MOSFET is shown with the coordinate sys-tem, x. y. z. The pinch-off region length L\l depends, in fact, on the device biasing volt-ages VOS' V GS and geometry L. ho and do' We have shown in other publications[7.8] thatAt is, given by :

(~~~111=1- .)"~ (~-l ).'~ (1)

\ 4Eo V DSS

with E.~ and Eo being the silicon and oxide permittivities respectively. Equation (1)shows that 111 increases proportionally with the drain voltage VOS as long as it is greaterthan the drain saturation value V DSS. The drain channel-width Z'is seen to decrease as111 increases (or in other words as Vos increases). It could be formulated by :

(2)z' = Zll- Lil

)~

Stud): and Characteriz£/tion of a New. 57

/

FIG. Cross sectional and top view of trapezoidal channel MOSFET.

Farnld AI-M(lrzaaki et al.

Substituting equation (1) into equation (2) yields,

Z' = Z[1- --.!-(~f!JJ!!!l!::.)2/3 (~ -

AlF 4£0 Vvss

)2/3

(3)

The channel fonn becomes trapezoidal as the MOSFET is switched into its saturationregion. The channel width Zx at any position x becomes no longer constant. It decreases

as X increases according to the following expression:

Z = Z-mx (4-a)x

withz-z'

L(4-b)m=

The traditional I-V characteristic equations of the rectangular gate MOSFET becomeno longer valid and new modeling is needed. Referring again to Fig. (1), the channelcurrent density Jjx) increases with the distance x, measured from the source, because

of the lateral contraction of the channel, it is given by :'"">

IJ.(x)= DS]. (S:'a)

doZ(l- j3x)

z'"with m 1(!3=Z=L 1- Z,

The channel current IDS can be written as[9.10J

IDS = s: qn(y),un (x, y)E., (x)Zxdy

multiplying and dividing by Qn = s: qn(y)dy yields[S.9J.

IDS = Qn ,un(x) E;Z., (6)

Since the total MaS system is charge neutral,

QG + Qss + Qn + QB = 0 (7)

where QG' QSS' Qn and QB are the charges at the gate, the interface states, the channelinversion layer and the bulk depletion region respectively. Q can be formulated by[2.SJn

Qn = -Cox [V GS- Vr- V x] (8-a)

(5-b)

with

QG= Cox (VGS- Vx)

and Q+ + Q-VT=- .,$ B

Cox

(8-c)

Substituting equation (4) and (8) into equation (6) and replacing Ex by-

Study and Characterization of a New. 59

~~ (9)Z(1- /3x)

The channel field Ex is enhanced in the contracted parts of the channel due to theenhancement of the channel current density (Ex = Jjx)/a, with a being the channelconductivity). The channel mobility degradation due to high field operation should,therefore, be taken into account. This effect becomes appreciably important when Exexceeds a certain critical value Ec(- 1.5 V/,u for electrons and 2V/,u for holes)[7.111. Thevalue of the channel mobility becomes position dependent. It is given by :

~~,un(x)=,un~Ec/ x 11/\\

= Cox.un (x) (VGS -VT -Vx)dVx

-dx

(I3-b)

with

Vg =VGS -Vr

Z(X = Coxllox -(~Vg)

L1/3

1 9E5dOhoL

~IF 4Eok=~1

and

Vr=E,L

Combining equations (9) and (10) yields

lbsdx 2 2 211)_2.. n -2:CoxllnEc(VGS-VT-Vx) dVx (

Z (l-~x)

To obtain los the left term of equation (11) should be integrated along the length of thechannel from x : 0 to x : L and the right term should be integrated between corre-sponding voltage limits V x : 0 to V x = Vos ;

Substituting equations (3) and (5) into equation (12) yields,

Fuhud AI-M£,rZOIlki et ,Ii.60

Equations (13-a,b) show that IDS increases, in the ohmic region (V DS < V g)' proportion-ally as V DS increases. However the rate of increase of IDS and V DS will be smaller thanthat observed with traditional rectangular gate MOSFETs. This is referred to the chan-nel field enhancement and the consequent degradation of the channel carrier mobility.In the saturation region of operation, IDS decreases as V DS is increased because thechannel width Z' at the drain decreases as increasing V DS .The I-V characteristics areexpected, therefore, to have negative slopes, which means that the device acquires anegative resistance. The sensitivity of the drain channel width Z'to variations in V DS'during ~he operation of the MOSFET in saturation, is seen to be dependent on thegeometry of the floating gate-piece. The device's negative resistance will also be con-trollable via control of the floating gate-piece geometry.

3. Experimental and Simulation Results

The experimental work begins by preparing trapezoidal gate N-channel testMOSFETs. The source channel-width Z = 50,um, the drain channel-width Z' rangesfrom 5 to 50,um, channel length L = 5,um and oxide thickness ho ranges from 40 tol200A. Measurements are performed on these test specimens to obtain the value of theeffective MOSFET geometrical ratio (Z/L)eff and its dependence on the device geome-try (Z,L,/1) and biasing (V DS ' Vas). Figure (2) shows a photomicrograph of the trape-zoidal gate test devices. Figure (3) presents the variation of the effective value of thegeometrical ratio (Z/L)eff with the drain channel-width Z' as deduced from the presentedmodel (Equation l3a,b) and compares it to experimental measurements. A good agree-ment is observed between the theory and experiment.

The variation of Z' with~is evaluated using equation (3). As Fig. (4) shows, Z'VDss

decreases as the value of V DS increases. It will be easy to conclude that the effective-Vvss

~increases,

value of the geometrical ratio (Z/L)eff also proportionally decreases as

VossThe experimentally determined values (Z/L)eff are fed to a simulation program based

on the proposed model and used to evaluate the I-V characteristics of the presented NR-

device. As shown in Fig. (5), when the NR-device is operated in its ohmic region, Iosseen to increase as Vos increases. However, when the device is switched into its satura-

tion region Ios decreases as Vos increases. This means that the I-V curves undergo a

negative slope, which indicates that the device has a negative resistance. The value of

this resistance is dependent on the sensitivity of Z" to the variation of V os. This latter

can be varied by varying the geometry of the floating gate piece (See Figs. (1) and (4)).

Figure (5) shows the variation of the device's negative resistance Vos with the gatevoltage V GS. We observe that the amplitude of Vos first decre~ses sharply as V GS

increases. Afterwards V GS > 5V) the decrement of ros with V GS becomes small. We

also notice that the amplitude of Vos is dependent on the shape and geometry of the

floating gate piece.

~N~

Stud)' and Characterization of a New,

,.,(!)

..,t~

c

L/)

I!)

I/)

8O~~£OJ'iUOJ)

~Os&§OJ

oS'-0

~EOJ)

eu

o§0-0c:N~

tr:

61

Fah"d AI-Marzouki et al.62

FIG. 3. Variation of geometrical ratio Z/L with drain channel width Z.

63Study and CharucteriZtltion of a New.

1Z = 50}tm

L =5 ~m

0

ho= 400A0.9

VT = 0.5 V0.8

~Io = Q.175}Jm

~IF=l~m(X)0.5 ~ m(O)

0.7

0.6 .77

..-

..-Q,'"""'

-l-N-

0.5

N-'N-0.4

0.3

0.2 .45

0

a

6 8 100 2 4

(Vos I Voss)

Variation of zrz and V DIY DSS

64 F"had At-M"rzvuki el at.

VoS(V)

FIG. 5. Variation of IDS and VDS'

Study and Characteriz,/tion of a New. 65

4. ConclusionsA new negative resistance device is presented. It is found to be free from the majori-

ty of drawbacks of those traditional devices which are already known. The new deviceis to be integrated using the floating gate MOSFET technology. The negative resistancemanifested by the presented device is shown to depend on the floating gate shape andgeometry and its value can be adjusted, during device operation, by adjustment of thegate to source voltage V GS' The theory of operation of this device is experimentallyverified by integrating a large number of rectangular gate test MOSFETs of differentchannel lengths and gate side steepness, and measuring the effective value of their geo-metrical ratios (Z/L)eff' The model of simulation takes into account the mobility degra-dation resulting from the carrier heating occurring due to channel field enhancement.Then new device is needed in many applications. It is quite easy to use without ~erious

precautions.

Acknowledgement:The authors wish to acknowledge fruitful discussion of Prof. Dr. M.N. Saleh, the

Dean of the Faculty of Engineering, Ain Shams University, Egypt. We are also gratefulto Prof. Dr. J. Borel, the Technical President of Thomson Semiconductor, Grenoble,France, for the useful suggestions and the fabrication of the test specimens.

References

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[2] Sze, S.M., Physics of Semiconductor Devices. John Wiley and Sons, New York. 200 p. (1984).[3] EI.Hennawy, A., AI-Ghamdi, F. and AI-Ghamdi, S., Modeling and Characterization of a New

Negative-Resistance NR-MOSFET for VLSI Applications, Int. Con! Microelectronics (ICM 91). CairoEgypt. pp. 84-87 (1991).

[4] Ramamoory, M., An Introduction to Thyristors and Their Applications. East-West Press. Chapter 2-5(1977).

[5] Grove, S., Semiconductor Physics. John Wiley and Sons, New York, Chapter (2-3) (1976).[6] Soppa, W.H. and Wagemann, H.G., Investigation and Modeling of the Surface Mobility of MOS-

FET.s from 25 to 15OC, IEEE Tran. Elec. Dev.. Vol. 35, No.7, pp. 970-977 (July 1988).[7] EI-Hennawy, A., EI-Said, M.H., Borel, J.and Kamarinos, G., Modeling of a MOSFET at Strong

Narrow Pulses for VLSI Applications, S. S. Elec. Vol. 30, No.5, pp. 519-524 (1987).[8] EI.Hennawy, A. and AI-Ghamdi, F., A Precise MOS IC Reference Voltage Generator for 12 b DAC

Applications. Sc. Bulletin of The FElASV. Vol. 26, No.3, pp. 246-269 (Sept. 1991).[9] EI-Hennawy, A. and AI.Harbi, T., Modeling and Characierization of a New Trapezoidal Gate MOS-

FET.lnt. J. Elec. Vol. 75, No.5, pp. 853-870 (1993).[10] Grignoux, P. and Geiger, R., Modeling of MOSFET with Nonrectangular Gate Geometries, IEEE

Tran. Elec. Vol. ED 29, No.8. p. 1261-1269 (1982).[II] EI-Hennawy, A., Design and Simulation of Nonvolatile CMOS-EEPROM Compatible with Scaling

Down Trends. Int. J. Elec.. Vol. 72, pp. 73-87 (1991).

FahL,d AI-ML,y:vl/ki et al.66

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