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Silicon Integration Initiative Innovation Through Collaboration Synergies in IC Design: PDKs and DFM Standards Working Together Sumit Dasgupta Sr. Vice President, Engineering Silicon Integration Initiative (Si2) Email: [email protected] June 06, 2011
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Page 1: Synergies in IC Design: PDKs and DFM Standards Working ... · Silicon Integration Initiative Innovation Through Collaboration Synergies in IC Design: PDKs and DFM Standards Working

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Innovation Through Collaboration

Synergies in IC Design: PDKs and DFM Standards Working

Together

Sumit DasguptaSr. Vice President, Engineering Silicon Integration Initiative (Si2)

Email: [email protected]

June 06, 2011

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Agenda• 08:30 AM - 09:00AM: Registration & Breakfast

• 09:00 AM - 09:10AM Welcome and Intro: Sumit DasGupta, Si2

• 09:10AM - 09:35PM: OPDK Coalition Overview: Robert Hum, Mentor

• 09:35AM - 10:00AM: Open Process Spec Progress: Gilles Namur, ST

• 10:00AM - 10:25AM: Symbols, CDF, and Callback Progress: Rich Morse, Springsoft

• 10:25AM – 10:45AM: Break

6/14/2011 2

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Agenda• 10:45AM - 11:10AM: 2011 OpenDFM Overview, A Customer

Perspective: Fred Valente, TI

• 11:10AM - 11:35AM: Targeting and Litho Bias, Bob Sayah, IBM

• 11:35AM - 12:00PM: Parasitic Extraction Standards and Design for Variability, Concetta Riccobene, LSI

6/14/2011 3

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Pre-OpenPDK Flow

Foundry Data

CDF descCallbacksSymbols

OA Tech FileDRC/LVSLPE/PEX

SPICE netlistTargeting

Test Harness

Pcellcode

IPLIPL

Flow A

Flow B

Flow C

Flow D

PDK Use Flows

Vndr C

Effort

Vndr B

Vndr A

IPL

Effort

Vndr AEffort

Effort

Effort

Vndr DEffort

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Full OpenPDK Flow

Foundry Data

OPS

Pcellcode

Effort

Gen

erate Flow A

Flow B

Flow C

Flow D

Vndr A

IPL

Vndr D

Vndr C

Vndr B

PDK Use FlowsCDF descCallbacks

Enh. SymbolsOA Tech FileDRC/DFM/LVS

LPE/PEXSPICE netlistTargeting

Test Harness

Effort

Effort

(Note: Enhanced OA symbols available  to members only)= Unique value added by OpenPDK members

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Vision: OpenPDK Development Flows

6

Open Process Spec. : Design Technology Representation (Open Language Based)

New standardization work

Cal

lbac

k Pa

ram

eter

Typ

es

(Not

act

ual v

alue

s)Format Generators

Existing Input Data Formats

OA API

OA DB

PDK Dev. Flow2

PDK Dev. Flow3

PDK Dev. Flown

SPICE Socket

SPICE EngineSPICE EngineSPICE EngineSPICE Engine

SPICE EngineSPICE EngineSPICE EngineDRC/LVS Engine

User

Foundry

Sche

mat

ic S

ymbo

ls E

nh.

PDK Dev. Flow1

OA Tech. File Enh.OpenDFM w/ Targeting

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Synergies Between Coalitions• UML diagrams generated by OPDKC provide consistent,

comprehensive & structured approach to handling the large amount of interrelated data in PDK’s

• Class diagrams of UML model used by DFMC as blueprint for layers used by DFM checks and targeting optimizations

• OPDKC defining structure of technology “Data Repository”, OPEX to use it to store process parameters, OA apps can access above data through Scripting Language Interface on OpenAccess

• XML, using XSD constraints, was chosen as the common data format between the OPDK and DFMC working groups

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In Conclusion…

• For more information– If interested, please contact Bob Carver (phone: 512-801-4350,

email: [email protected]) for membership details

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Thank You and Enjoy the Workshop

Sumit DasguptaSr. Vice President, Engineering Silicon Integration Initiative (Si2)

Email: [email protected]

June 06, 2011

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Current OpenPDK Scope

• Stakeholder-specified requirements:– Interoperable symbols

– Open Process Specification (using UML as formal vocabulary and relationship structure) containing:

• Device parameter specifications

• OA Technology File enhancements

• DRC/LVS/PEX

– Callback Specifications

– SPICE parameters passed with net-lists

– XML-based formal syntax for output to automated PDK generation tools

Items under current focus

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Pre-OpenPDK Flow

Foundry Data

CDF descCallbacksSymbols

OA Tech FileDRC/LVSLPE/PEX

SPICE netlistTargeting

Test Harness

Pcellcode

Flow A

Flow B

Flow C

Flow D

PDK Use Flows

Vndr C

Effort

Vndr B

Vndr AEffort

Effort

Effort

Vndr DEffort

Effort

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Open Process Spec. : Design Technology Representation (Open Language Based)

New standardization work

Cal

lbac

k Pa

ram

eter

Typ

es

(Not

act

ual v

alue

s)Format Generators

Existing Input Data Formats

OA API

OA DB

PDK Dev. Flow2

PDK Dev. Flow3

PDK Dev. Flown

SPICE Socket

SPICE EngineSPICE EngineSPICE EngineSPICE Engine

SPICE EngineSPICE EngineSPICE EngineDRC/LVS Engine

User

Foundry

Sche

mat

ic S

ymbo

ls E

nh.

PDK Dev. Flow1

OA Tech. File Enh.OpenDFM w/ Targeting

Vision: OpenPDK Development Flows

OPS WG

SCC WG

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Open Process Spec. WG (OPS WG)

• Goals:– Develop industry–standard specifications for representing

process information for electrical definition of Process Design Kits

• Scope of proposed standards includes:– Technology layers– Tool-specific layers– Technology constraints– Design rules– DFM/DFY rules– Electrical parameters, e.g., dielectric coefficients – Process parameters– Device specifications– Design Kit test harness,…

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Symbols, CDF Parameter & Callbacks WG (SCC WG)

• Goals:– Develop device parameter & callback standard specifications – Augment Si2 Symbol Library with additional symbols, parameters

and properties– Define standard representation for parameters to be passed with

SPICE netlists

• Scope of proposed standards includes:– Develop specification for device parameters (a la “CDF”) – Define semantics for parameter and attribute keywords – Current parameters used commonly in PDKs should be easily

captured by new specification – Develop specification for CDF callback mechanism – Define symbols to add to the current set of Si2 standard symbols – Define OpenAccess specifications for CDF as an interoperability

goal

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Accessing OPEX Process Parameters

OpenAccess APIC++ 

Programming Interface

EDA Programmer Centric

Tcl API

Type Mapping

Ruby API

Type Mapping

Perl API

Type Mapping

Python API

Type Mapping Common Wrapper Architecture Interface

Language‐Specific Bindings

Common SWIG Framework

6/14/2011 15

Type Mapping

C# API

XML FileYAML FileSQLite Database

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Status• OPS WG:

– Received 58 page example Open Process Spec from ST Micro– 1st pass draft specs for TSG evaluation: Target 09/2011– OPS Adopter Kit under active evaluation / discussion– DAC demo preparation underway

• SCC WG:– Created 4 parallel sub-groups to drive faster progress

• Symbols, Parameters, SPICE Netlist Parameters, Callbacks– Received contribution of 21 new symbols from SpringSoft– 1st pass draft specs for TSG evaluation: Target 09/2011

• DFMC OpenDFM 1.1:– OpenDFM Spec posted on Si2 front page for public distribution

OpenDFM parser, test cases posted for DFMC members only– Reviewing incompatible OPEX parameters with contributors


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