TCAD Process/Device ModelingChallenges and Opportunities

for the Next Decade

Martin D. Giles

Technology CAD Department Intel Corporation

2

Acknowledgements• S.Cea, T.Hoffmann, H.Kennel, P.Keys,

R.Kotlyar, A.Lilak, T.Linton, P.Matagne, B.Obradovic, R.Shaheed, L.Shifren, M.Stettler, C.Weber, X.Wang

• Portland Technology Development• Portland Quality and Reliability Engineering• K. Goodson, W. Tsai, W. Windl

3

Presentation Scope/Goals• Industrial perspective• Front-end process/device modeling• Logic technology development focus

• How has TCAD contributed to technology development?

• What TCAD capabilities does industry need through the next decade?

4

Outline• Introduction

– Technology scaling– Changing demands on TCAD

• Critical Modeling Needs– Computational Materials Science– Atomistic Modeling of Device Operation– Multiscale Hierarchical Modeling

• Conclusions

5

TechnologyNode

0.5µm0.35µm

0.25µm0.18µm

0.13µm90nm

65nm45nm

30nm

TransistorPhysical Gate

Length 130nm70nm

50nm

30nm20nm

15nm

1995 20051990 2000 20100.01

0.10

1.00M

icro

met

er

Nanotechnology

10

100

1000N

anometer

Nanotechnology in Production

•Product die will exceed 1.7 billion transistors in 2005•Physical gate length ~15nm before the end of this decade

6

Transistor Scaling – Past Decade

poly

source STISTI drainhalo

well

salicide

1994 0.35µm 2004 90nm

Gate oxide scalingDopant engineering

Shallow Trench Isolation Strained Silicon

• Continuum models used for the vast majority of TCAD process/device applications

7

30nm Length(Development)

Gate

LG = 10nmLG = 10nm

20nm Length(Development)

15nm Length15nm Length(Research)(Research)

65nm Node2005 45nm Node

2007

90nm Node2003

32nm Node2009 22nm Node

2011

10nm Length10nm Length(Research)(Research)

2013-2019

45nm Length(Production)

Gate

Source Drain

SiliconBody

Gate

Source Drain

SiliconBody

DrainSourceSource Tri-Gate

Architecture

30nm

UniaxialStrain

SiGe S/D

High-K/Metal-Gate

Nanowire/Nanotube

25 nm

15nm

Transistor Scaling – Next Decade

8

Nanotechnology Eras

Extending charge-based technologyto its ultimate limits; 22nm node and beyond

New channel materials, ballistic transport, barrier engineeringe.g. Ge FETs, III-V on Si, nanowire FETs, carbon nanotube FETs, …

Traditional scaling up to the 22nm nodeHigh-k/metal gate, strained Si/SiGe, fully depleted UTB SOI, double gate MOS, trigate MOS, new silicides, FUSI, …

Novel technologies beyond charge-baseddevices; beyond the roadmap

Spin logic, phase logic, molecular devices, photonics, …

Evolutionary CMOS

Revolutionary CMOS

Exotic Technologies

9

Process/Device TCAD Industry NeedsEvolutionary CMOS

Revolutionary CMOS

Exotic Technologies

MaterialsExtend traditional TCAD capabilities to next generations of devices, providing accurate models to enable technology optimization despite rapid introduction of new materials and structures

Physical device models and analysis to enable detailed evaluation of intrinsic device performance and impact of parasitics; strongconnection to fabrication processes/materials; enable selection and adoption of beyond-silicon devices

Models for initial assessment of device and technology choices to enable exploration of radically new systems / architectures

Devices

Systems

10

Outline• Introduction

– Technology scaling– Changing demands on TCAD

• Critical Modeling Needs– Computational Materials Science– Atomistic Modeling of Device Operation– Multiscale Hierarchical Modeling

• Conclusions

11

Computational Materials ScienceExample: dopant-defect diffusion

Diffusion intip and halo is influencedby S/D damage

PMOS

Net doping

Defect clustering

Tren

ch

S/D dopants anddamage encroach

Continuum reaction-diffusion models provide a powerful and efficient capability that can incorporate atomistic dopant-defect energetics

12

Boron-Interstitial diffusionI migration BI migration

0.9eV

0.3eV

0.7eV

0.2eV

0.2eV0.1eV

Jing Zhu, LLNL 1996

13

Boron Diffusivity under Stress

Transition (NEB):

W. Windl et al.

Transition state energy:

M. Diebel, SISPAD 2003Hop direction:

⇒ anisotropic diffusivity

)1,1,3(8ad =

r

14

0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6708090

100110120130140150160170180190200210220230

TiN/HfO2/chem oxidenMOSFETgate-first, 650 C

TaN/HfO2/chem oxidenMOSFETgate-first, 950 C

TiN/HfO2/chem oxidenMOSFETgate-last, 500 C

pea

k m

obili

ty (c

m2/

Vs)

EOT extracted (nm)

0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5

2

2

2

2

2

3

3

3

3

3

T. Schram, W. Tsai et al, WODIM, Cork, 6/2004

W. Tsai et al, IEDM Tech. Digest, p322, 2003

silicon

electrode

SiO2

high-k

interface layer 1

interface layer 2

Interfaces Critical in Scaled Devices

Electron mobility for scaled high-k as a function of process flow

15

100100 105105 110110

SiSi

0.5 nm0.5 nm

EnergyEnergy--loss (eV)loss (eV)

Inte

nsity

In

tens

ity

Si Si -- LL2,32,3

W. Windl, Ohio State University

00

0.40.4

0.80.8

0.20.2

0.60.6

000.40.4

1.21.2

000.50.5

11

100100 108108104104EnergyEnergy--loss, eVloss, eV

SiSi

SiSi4+4+

SiSi1+1+

SiSi2+2+

SiSi3+3+

DFT Calculation of Interface Structure

Experiment Model

Interface structure understanding

16

Structure(from EELS fit)

Spatiallyresolved

DOS

EELS(plus CB edge

from DOS)

~2.5 Å

coreholeeffect

Theory(scaled)

Expt.

~5 Å

Theory

Expt.(scaled)

(a)

(b)

(c)

(f)

(g)

(h)

FindGe/SiO2

interface is atomically sharp with “text book” band line-up

W. Windl, Ohio State University

Application: Si/SiO2 vs. Ge/SiO2

Si/SiO2

Ge/SiO2

17

Computational Materials Science

Where we need to be:• Atomistic models for process effects extensible

to new materials/interfaces• Accurate enough to enable process

optimization• Handles bandgap/charge effects and large

configuration spaces of real structures• Strongly linked to process fabrication chemistry

• Value extends beyond front-end modeling needs to device and fabrication

18

Outline• Introduction

– Technology scaling– Changing demands on TCAD

• Critical Modeling Needs– Computational Materials Science– Atomistic Modeling of Device Operation– Multiscale Hierarchical Modeling

• Conclusions

19

Atomistic Modeling of Device Operation

Where we are now:• Drift-diffusion approach has been pushed far

into the submicron MOS regime • Entering new phase of Evolutionary CMOS

with expanding materials and structures

• New requirements for atomistic physical modeling in current technology development

• Many needs for detailed evaluation of revolutionary CMOS options

20

Strain Engineered 90nm Technology

30% IDSAT gain

PMOS

SiGeSiGe

Lateral Stress (MPa)

SiGe

Channel

0

0 0.10.1

-0.10

-200-400

-600-800

-1000

21

PMOS Drive Current Gain with Stress

0.7

0.8

0.9

1

1.1

1.2

1.3

1.4

-400 -300 -200 -100 0 100 200 300 400Bending Stress (MPa)

Idsa

t Gai

n

Long channel

Short Channel

Heavy hole band50meV isosurface

• Bandstructure calculations enable understanding of physical dependencies of PMOS stress response

22

Phonon Mobility in Nanowires

Si

SiO2 cladding

100

200

300

400

500

600

700

800

0 0.5 1 1.5 2

Gate Voltage (V)

Mob

ility

(cm

2 /Vs)

357101515 iso(100) NMOS

Diameter (nm)

• Rigorous 1D Mobility calculation in nanowires– Schrödinger-Poisson

solution for wavefunctions

– Scattering/BTE solution – Compute mobility as a

function of diameter

23E. Pop, K. Goodson, R. Dutton Stanford University

Self-Consistent Monte Carlo and Quantum/AtomisticElectrothermal Simulation of Nanotransistors

24

Atomistic Modeling of Device Operation

Where we need to be:• Continue to drive the development of

atomistic models across the range of device options

• Strengthen the link to atomistic models of fabrication and materials properties

• Go beyond point solutions to bring the resulting tools to the maturity needed for industrial application

25

Outline• Introduction

– Technology scaling– Changing demands on TCAD

• Critical Modeling Needs– Computational Materials Science– Atomistic Modeling of Device Operation– Multiscale Hierarchical Modeling

• Conclusions

26

Multi-scale, Multi-phenomena ModelingPDE solution – 108 atomscontinuum reaction-diffusion

Kinetic Monte Carlo – 106 atomsclassical atoms, migration barriers

Molecular Dynamics – 104 atomsclassical atoms, empirical potentials

Density Functional Theory – 102 atoms single-electron wavefunctions

structures

energies

2Gate

Silicon substrate

1.2nm SiO2

PolySi

Quantum Monte Carlo – 10 atoms many-electron wavefunctions

Hierarchical modeling approaches are well recognized as essential within modeling areas

27

Hierarchical Modeling Systems

Systems

Circuits

Devices

MaterialsBulk/Interfaces

Atoms

Systems

Circuits

Devices

MaterialsBulk/Interfaces

Atoms

Evol

utio

nary

Revolutionary

Expandingmodel

hierarchies

28

Outline• Introduction

– Technology scaling– Changing demands on TCAD

• Critical Modeling Needs– Computational Materials Science– Atomistic Modeling of Device Operation– Multiscale Hierarchical Modeling

• Conclusions

29

Conclusions• TCAD process and device modeling has a critical

role in enabling future technology development• Evolutionary CMOS

– Analysis and optimization of new materials and structures• Revolutionary CMOS

– Detailed evaluation of the strengths and weaknesses of beyond-silicon devices

• Exotic Technologies– Exploration of radically new systems and architectures

• Atomic-scale physical modeling as the foundation of a hierarchical modeling approach is the key to successfully meeting these diverse challenges