The unified power flow controller (UPFC) is a powerful power flow and reactivecompensation FACTS controller. It consists of two voltage source convertersconnected back-to-back with a common DC bus. One of the VSC converters isshunt connected to the AC power system. It is equivalent to a STATCOM, whichinjects a current into the power system at the point of connection (POC). Theother is what is referred to as a Static Synchronous Series Compensator (SSSC),which injects a voltage in series with the transmission line. The injected seriesvoltage can be at any angle with respect to the line current. The injected currentshave two parts. First, when the two converters share the same DC bus capacitor,the real power part, which is in phase with the line voltage, delivers or absorbsreal power into/from the line. The real power also compensates for the losses inthe UPFC. Second, the reactive part, which is in quadrature with the line voltage,emulates an inductive reactance or a capacitive reactance at the point of connec-tion. That is, in an UPFC, the STATCOM can regulate the shunt reactive power atthe line connection and also inject or absorb real power to control the DC buscapacitor voltage, thereby facilitating real power transfer between the twoconverters.
The first installed UPFCs were built with the use of relatively slow switchinggate turn-off (GTO) thyristor devices, which were switched at fundamentalfrequency. This arrangement required the use of harmonically neutralizedvoltage-sourced converters (HN-VSC) to achieve harmonic cancellation andeliminate or reduce the need for harmonic filters. Currently built VSCs useModular Multilevel Converters (MMC) that use insulated gate bipolar transistors(IGBTs), which enable design of higher voltage converter valves that eliminatethe need for parallel connection of converter modules.
The chapter also provides information about two variations of the UPFC, theStatic Synchronous Series Compensator (SSSC) and the Interline Power FlowController (IPFC).
2 R. Adapa et al.
1 Introduction
UPFC is the abbreviation of united power flow controller (Gyugyi 1992). Thiscontroller consists of two voltage-sourced converters (VSCs), which share a DCbus and a DC capacitor. The most important characteristic of the UPFC is that it canrapidly and simultaneously control all the parameters affecting power flow in thecircuit to which it is connected (i.e., voltage, impedance, and phase angle). Alterna-tively, when the two converters are disconnected from each other, the two VSCs cancontrol reactive power flow independently of each other. It is, therefore, potentially avery powerful tool to assist increased utilization and dynamic compensation ofpower transmission systems by operating a line flexibly.
The UPFC consists of two three-phase VSCs, as described in the ▶ “PowerElectronic Topologies for FACTS Controllers” chapter, connected to a commonDC bus. One is basically a Static Synchronous Compensator (STATCOM), which,as described in the ▶ “Technical Description of the STATCOM” chapter, on its ACside is connected to a transformer, which is the interface between the STATCOM andthe AC system. The other VSC is a so-called Static Synchronous Series Compensa-tor (SSSC), which is connected on its DC side to the DC bus of the STATCOM andthe other side feeds a transformer, which on its line side has three separate windingsthat are connected in series with the AC line’s phase conductors (CIGRE TB160 2000; CIGRE TB 371 2009).
The primary function of the UPFC is active and reactive power flow control. Itcan be used in steady state or it can dynamically react to a disturbance. The UPFC isalso appropriate for carrying out the following functions simultaneously, although anappropriate control system would need to be designed:
• Transient stability improvement• Power swing damping• Voltage stability improvement
Both the STATCOM and the SSSC are, as mentioned above, so-called voltage-sourced converters (VSCs). The shunt-connected STATCOM can absorb or generatereactive power and thereby control the voltage at the point of connection. When theSTATCOM and SSSC modules are connected together on the DC bus side, activepower can also be transferred from the STATCOM module to the SSSC module orvice versa. That is, the SSSC can inject or divert active power into or from the ACline. In that way, the series-connected SSSC can act as a phase shifter with voltageregulation capability. That is, it has the capability to insert a voltage that can act as acombination of resistance and reactance, thereby controlling both real and reactivepower flows independently. In fact, by control actions, the UPFC can rapidly andsimultaneously control all the parameters affecting power flow in the circuit to whichit is connected (i.e., voltage, impedance, and phase angle). It is, therefore, potentiallya very powerful tool to increase the utilization of power transmission systems.
When the SSSC is disconnected from the STATCOM, its functionality is limitedto injecting a voltage in phase with or in opposite phase with the current flowing on
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 3
the line. This will change the voltage at the point of connection of the SSSC module,which changes the reactive power flows on the line.
This chapter also briefly describes the following variations of the UPFC:
• The SSSC• The Interline Power Flow Controller• The Generalized Power Flow Controller
2 UPFC Fundamentals
2.1 AC Power Flow Theories
As described in the▶ “AC Network Control Using FACTS Controllers” chapter, thepower flow in an AC transmission line depends on (1) line impedance, (2) magni-tudes of sending- and receiving-end voltages, and (3) phase angle between thesevoltages. Figure 1 shows a simple transmission line inserted between two machines.It is assumed that the line is relatively short so that the capacitive shunt impedancebetween the conductors and ground and between the conductors themselves can beignored. The symbols shown in the figure are:
• Vs is the sending-end voltage phasor whose amplitude is equal to Vs with an angleequal to δs.
• Vr is the receiving-end voltage phasor whose amplitude is equal to Vr with anangle equal to δr.
• Vx is the voltage drop across the line’s reactance equal to IX.• VR is the voltage drop across the line’s resistance equal to IR.• I is the current through the line.• Ps is the active power sent from the sending end.• Qs is the reactive power demand at the sending end.• Pr is the active power received at the receiving end.• Qr is the reactive power demand at the receiving end.
The equations for the active power flows through the line and the reactive powerdemands at the sending and receiving ends of the line are described by the followingwell-known equations, which are described in numerous textbooks (CIGRE TB
Fig. 1 Simple single transmission line between sending and receiving ends
51 1996; CIGRE TB 504 2012) and in the ▶ “Power Electronic Topologies forFACTS Controllers” chapter.
The active power flow at the sending end of the transmission line is given as
Ps ¼ RVs2
R2 þ X 2 þVsV r
R2 þ X 2 �R cos δs � δrð Þ þ X sin δs � δrð Þ½ � (1)
The reactive power flow at the sending end of the transmission line is given as
Qs ¼XVs
2
R2 þ X 2 þVsV r
R2 þ X 2 �R sin δs � δrð Þ � X cos δs � δrð Þ½ � (2)
The active power flow at the receiving end is given as
Pr ¼ � RVr2
R2 þ X 2 þVsV r
R2 þ X 2 R cos δs � δrð Þ þ X sin δs � δrð Þ½ � (3)
The reactive power flow at the receiving end is given as
Qr ¼ � XVr2
R2 þ X 2 þVsV r
R2 þ X 2 �R sin δs � δrð Þ þ X cos δs � δrð Þ½ � (4)
For simplicity, because the resistance of high-voltage transmission line conduc-tors is typically very low, it is normally ignored, in which case, as has been describedin the ▶ “AC Network Control Using FACTS Controllers” chapter, the equationsrevert to the typical equations for a relatively short lossless line as follows.
Ps ¼ Pr ¼ VsV r
Xsin δs � δrð Þ ¼ VsV r
Xsin δsrð Þ (5)
In addition, assuming that the sending- and receiving-end voltages are the same,the reactive power demand at each end of the line will then be
Qs ¼ Qr ¼V 2
X1� cos δsrð Þ (6)
2.2 UPFC Basics
The UPFC, as shown in Fig. 2, requires two VSCs connected back-to-back with acommon DC link capacitor. The two VSCs are connected to the same transmissionline through two interface transformers: one is shunt connected to the AC system andthe other has three isolated output windings each of which is connected in series withan AC line conductor.
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 5
The UPFC is typically connected to the sending end of a line as shown in Fig. 3.The series winding will insert a voltage, Vs’s, in series with the line conductors. Theinserted voltage is a voltage phasor with the amplitude Vs’s and a phase angle ofδs + β (denoted as ∠δs + β), where β is the angle of the injected voltage as shown inFig. 4.
An UPFC has three controllable parameters. These are (1) the magnitude of thevoltage injected in series with the line, (2) the phase angle of the injected voltage,and (3) the reactive component current flowing through the shunt-connected
Fig. 3 Simple transmission line with series voltage injection
VS’Sβ
VX
VS’VS
Vr
I
δ’
δS’δSδ
δr
ψ
Fig. 4 UPFC phasor diagram
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 7
converter. Note that the active power component flowing through the shunt converterinto the AC system is a function of the phase angle of the injected series voltagesince the active power injected or removed from the line via the series transformerhas to be matched by an equal amount of power flowing through the shunt convertersuch that the net power flowing through the DC link into the DC bus capacitorsis zero.
In the examples discussed here, the UPFC is connected to an assumed strong ACbus, where the voltage is not affected by the line current. If the UPFC is inserted intothe line at some point distant from the line termination, then according to CIGRE TB51 1996, the assumption that the reactive power component will not influence thevoltage seen by the shunt converter is invalid. In this case, numerical methods mighthave to be used since a closed form solution might not easily be found (CIGRE TB51 1996).
As stated above, the series-connected compensating voltage (Vs’s = Vs’ – Vs) iscontrollable and can vary between zero and a maximum value at any phase anglebetween 0 and 360�. It is independent of the line current since the charging of the DCbus capacitor is supplied from the shunt converter. Thus, if the inserted voltage is inphase with or out of phase with the line current, the series-connected converter willgenerate or absorb reactive power. At other voltage insertion angles, if the twoconverters are connected back-to-back with a common DC link, the UPFC canalso inject or remove active power to and from the line. The exchanged activepower (Pexchange) is then transferred across the shared DC capacitor link. When theinjected voltage Vs’s is added to the sending-end voltage, Vs (i.e., Vs ∠δs), as isshown in Fig. 4, the sending-end voltage on the line side after the series converterbecomes Vs’ (i.e., Vs’ ∠δs’).
The changed angle between the modified sending- (Vs’) and receiving-end Vr
(i.e., Vr ∠δr) voltages now determines the current flow through the line and conse-quently the active (P) power flow through the line and reactive power flow (Q) ateach end of the line.
2.3 Power Flows with an UPFC Installed in a Line
The power flow (Eqs. 5 and 6) for the transmission line needs to be modified after theinsertion of the UPFC. The new equations for the active power Ps’ and reactivepower Qs’ using the new δ’ angle after the insertion of the UPFC can be written asshown in Eqs. 7 through 9. These equations still describe a system in which the seriesresistance is zero and where the line’s shunt capacitances can be ignored, that is, arelatively short line.
Ps0 ¼ Pr ¼ Vs0Vr
Xsin δ0 (7)
8 R. Adapa et al.
Qs’ ¼ Vs0Vr
X
Vs0
Vr� cos δ0
� �(8)
Qr ¼ Vs0Vr
Xcos δ0 � Vr
V s0
� �(9)
where δ' = δs' � δr is the difference in phase angle between the sending- andreceiving-end voltage phase angles after installation of the UPFC.
The circle, shown in Fig. 4, defines the voltage injection limits of the UPFC anddefines the rating of the series converter. The rating of the shunt converter is thevectorial sum of the reactive power to be absorbed or generated by the converter plusthe active power that will flow to and from the series converter. Equations 7 and 9show that for a given active power (Pr) coupled with the reactive power demand (Qr)at the receiving end, the UPFC has to modify the sending-end voltage Vs’ (i.e., Vs’
The UPFC injects a voltage Vs’s (i.e., Vs’s ∠δs + β), such that Vs’ = Vs + Vs’s or
Vs0∠ψ ¼ Vs þ Vs0s∠β (11)
where the phase shift angle ψ shown in Fig. 4 is ψ = δ' � δ = δs' � δs.The magnitude (Vs’s) and the angle (β) of the injected series voltage are given by
CIGRE developed similar equations based on the angle between VS’S and Vr
equal to β plus δ (CIGRE TB 51 1996). That is, the equations are referenced to thereceiving-end bus instead of the sending-end bus.
2.4 Operating Principles (Functions)
A voltage (Vs’s) injected in series with the line, as shown in Figs. 3 and 4, modifiesthe magnitude and phase angle of the transmission line voltage independently of thecurrent. The amount of active and reactive power flows in the line is thereforecontrollable by injecting a voltage with a specific magnitude (Vs’s) and phase angle(β) with respect to the line voltage.
The voltage injected into the line from the series converter can be viewed as madeup by two orthogonal voltages: one that regulates the magnitude of the line voltage
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 9
and the other regulates the phase angle of the line voltage. This could be done usingregular transformer technologies where one voltage regulating transformer (VRT)controls the line voltage and a phase angle regulator (PAR) controls the phase angle.The UPFC can combine both functions of the VRT and PAR in a single unit.
Consider Fig. 3 where the simple power system of Fig. 1 is expanded to includethe UPFC. The UPFC is represented by a controllable voltage source in series withthe line which can generate or absorb the reactive power that it exchanges with theline, but the active power it exchanges must be supplied to it, or absorbed from it,through the shunt-connected converter as shown in Fig. 2 from the sending-end bus.The voltage injected by the UPFC in series with the line is represented by phasorVS’S having magnitude VS’S between zero and a maximum output voltage with anangle that can vary between 0 and 360 electrical degrees as illustrated in Fig. 4. Theline current, represented by phasor I, flows through the series voltage source VS’S
and results in both reactive and active power exchange. In order to represent theUPFC properly, the series voltage source is controlled to only generate or absorb thereactive power it exchanges with the line. Thus, the active power it exchanges withthe line is assumed to be transferred to the sending-end bus via the shunt-connectedconverter. This is in agreement with the UPFC circuit structure shown in Fig. 2 inwhich the DC link between the two converters establishes a bi-directional couplingfor active power flow between the injected series voltage source and the sending-endbus. As Fig. 3 implies, in the present discussion, it is further assumed for clarity thatthe shunt reactive compensation capability of the UPFC is not utilized. That is, theUPFC shunt converter is assumed to be operated at unity power factor, its solefunction being to transfer the active power demand of the series converter to thesending-end generator. With these assumptions, the phasor diagram shown in Fig. 4is an accurate representation of the basic UPFC (CIGRE TB 160 2000).
Figure 5 shows a simple representation of a UPFC placed at the sending end of atransmission line. The UPFC is shown as a voltage source inserted in series with theline. The shunt section of the UPFC is not shown since it is assumed that it cantransfer any active power transferred from the series section with no change in thesending-end voltage and phase angle.
Fig. 5 Transmission line with an UPFC at the sending end
10 R. Adapa et al.
Figure 6 illustrates the steady-state operating limits of the series converter. TheUPFC can inject a voltage phasor that can be controlled from 0� to 360� with amagnitude from zero to a maximum output voltage. The first two limits to consider arethe maximum and minimum allowable operating voltages as shown in Fig. 6. Theselimits have to be specified for each application, but the steady-state voltage limitsmight typically be � 10%, and the allowable low-voltage dynamic limits duringvoltage sags might be as low as �20%. (Of course, during a line fault, the voltagewill go lower perhaps even to zero.) When VS’S is in phase with VS (ψ shown in Fig. 6is equal to zero), only the terminal voltage is changed, but this will cause both activeand reactive power flows to change. That is, both Vd and Vq, shown in Fig. 5, arenon-zero. Any active power must of course flow through the shunt converter back intothe AC system at the VS bus. If VS’S is in quadrature with the current, the Vd shown inFig. 5 is zero, so only reactive power is flowing through the series converter. Finally, if
Vmax Vmin
I
b
Vr
Vx
Vs
Vs’
Y
d’
d
dr
dsds’
Vs’s
Fig. 6 UPFC’s steady-state operating limits
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 11
VS’S is moving the phase of the voltage phasor VS with constant magnitude, Vq shownin Fig. 5 is zero, so only active power flows through the series converter, which has toflow through the shunt converter and back into the power system at the VS bus. At anyother operating points, within the control space, voltage, reactive power, and activepower are all changed simultaneously.
It can be readily observed in Fig. 6 that the transmission line “sees” VS + VS’S,i.e., VS’ as the effective sending-end voltage. Thus, it is clear that the UPFC affectsthe voltage (both its magnitude and angle) across the transmission line and, there-fore, it is reasonable to expect that it is able to control, by varying the magnitude andangle of VS’S, the transmittable active power, as well as the reactive power demandof the line at any given transmission angle between the sending-end and thereceiving-end voltages (CIGRE TB 160 2000).
Gyugyi has shown that the UPFC can control the reactive power demand of theline at either end voltage source (bus) (Gyugyi et al. 1995).1 Of course, theminimization of the reactive power demand at one end does not, in general, resultin minimum reactive power at the other end. This is inherent in AC power systemssince the line voltage phasor (VX), which defines the line current, can be aligned tohave an optimal angle (e.g., 90�) with respect to either the sending-end or thereceiving-end voltage phasor but not both. The receiving-end reactive powerdemand is usually an important factor because it significantly influences the varia-tion of the line voltage with load demand, the overvoltage at load rejection, and thesteady-state losses (CIGRE TB 160 2000).
The series-connected converter is similar to the converters used in STATCOMsystems as described in the ▶ “Static Synchronous Compensator (STATCOM)”chapter. However, an in-line application of converters is subjected to differentstresses than a shunt-connected device, since it is exposed to the large changes inthe current flows through the line as well as the line’s normal voltage variation. Theconverter rating must, therefore, be adjusted for different stresses such as faultcurrents and high transient currents associated with fault recovery which are notpresent to the same degree in shunt-connected converter applications.
The required steady-state rating of the series converter in an UPFC has to beadapted to the specific application. In an application for control of loop flows, rapidpower boost or buck (opposing power flows) might determine the range of therequired angle (ψ) control range. For a large control range, the required outputvoltage could be large, which would lead to a relatively high converter outputvoltage. For optimum performance, the reactive power increase associated with apower boost should also be controlled. Also, the voltage variations on the AC linewill have to be taken into account because at higher AC system voltages, theeffective change in the line flows will be less at the maximum output voltage fromthe converter than at lower AC voltage levels. The maximum output voltage from theseries converter would then be a function of the critical operating point with the
1While controlling the receiving-end reactive power demand might be feasible for short AC lines, itwould not be applicable to long AC lines.
worst case line voltage tolerances. However, the maximum voltage to be injectedmight be required when the DC bus voltage connecting the shunt and seriesconverters together, as shown in Fig. 2, is at a minimum, which will determine theratio between the converter-side transformer winding and the AC lineside winding.
The current rating would be the highest when the line power needs a boostbecause this would represent the maximum power flow through the line. At thisoperating point, the reactive power control demand would also be the highest.
The power electronic subsystem of the series segment of the UPFC would thushave to be designed for the maximum steady-state injection voltage into the line withthe maximum DC bus voltage, since this determines the maximum steady-statevoltage stress on the valves, at the maximum current operating point. Note thatthere will be no DC current flow from the shunt inverter to the series inverter or viceversa except for compensating for the power losses in the UPFC converters. Thus,the shunt converter only has to be designed for the active power flow from and to theseries converter. However, the shunt converter is typically designed to providereactive power compensation of the sending-end power system, too, which has tobe considered in the STATCOM converter rating. While there might be some costadvantages from having the same ratings of the shunt and series converters, this isnot required. The application requirements should therefore be used to determine theratings of the converters.
3 UPFC Components
3.1 Configurations
The first UPFC system was built using two VSCs built by paralleling four six-pulseconverters (CIGRE TB 160 2000; Bian et al. 1997). As described in the ▶ “Tech-nical Description of Static Compensators (STATCOM)” chapter, an alternativedesign approach for realizing a high-power multilevel converter has evolved thatenables connection of converter bridges in series. Such converters are referred to asModular Multilevel Converters (MMC) or chain circuit converters (Ainsworth et al.1998). However, the lessons learned from the first few installed UPFC systems usingparallel-connected VSCs are also applicable to the MMC systems. Furthermore,newer semiconductor device technologies might emerge that will make parallelconnection of converters viable again. Therefore, the earliest UPFC system designedare discussed in some detail below.
3.1.1 Parallel-Connected VSC Modules for UPFCAt the time when these systems were developed, the only viable power electronicsemiconductor device that could be used for high-voltage and high-power voltagesource converter applications, requiring both device turn-on and turn-off capability,was the gate turn-off thyristor (GTO), shown in Fig. 7 (Mohan et al. 1995a).However, series-connected GTO semiconductor devices require very precise turn-off characteristics in order to share the recovery voltage evenly when a valve branch
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 13
is switched off. Careful matching of GTO devices, careful design of the thyristorcircuits including careful component layout to avoid excessive stray inductance, andadaptive turn-off time control are necessary in order to achieve sufficiently uniformturn-off performance. All or most of these design features were used in the 100 MvarSTATCOM installed in Tennessee Valley Authority’s (TVA) system in the early1990s in the USA as well as in the UPFC built for the American Electric Power(Schauder et al. 1995; Renz 1998). This makes it difficult to connect many GTOdevices in series. The alternatives were then to either parallel or series connection ofconverter modules in order to archive the high power levels required for UPFCapplications. At the time, parallel connection of the required number of VSCs waschosen.
The first high-power VSC systems were built using three phase Graetz bridges asshown in Figs. 2 and 8 with two-level switching which is described in detail in the▶ “Power Electronic Topologies for FACTS Controllers” chapter. Two-levelswitching just means that each of the three outputs from the three-phase bridgecan only be connected either to the positive or to the negative terminal of the DCsource by the upper or lower element of the corresponding phase leg (hence, “two-level”). When each phase leg is switched only twice a cycle, this becomes a six-pulsebridge.
As discussed in the ▶ “Technical Description of Static Compensators(STATCOM)” chapter, VSCs act as ripple-current sources at their DC terminals.Hence, all six-pulse converters with appropriate phase displacements may be directlyparallel-connected to the common DC voltage source, i.e., a DC bus capacitor. At theirAC terminals, however, the VSCs manifest their output distortion as harmonic-voltagesources. Thus, they cannot be connected directly to a common transformer with phase-shifting secondary windings (as is done with current-sourced converters used, e.g., inHVDC transmission systems) because large circulating harmonic currents betweenwindings would be established. Therefore, these VSC converters have to be arrangedin such a way that the harmonic voltages on the AC side are inserted in series and notin parallel. In order to reduce the ripple voltages on the AC side of a multi-converterarrangement, special phase-shifting transformers were used. High-voltage trans-formers with the complex winding arrangements required for harmonic voltagecancellation are, however, very costly to build. Therefore, the harmonic cancellationtransformers are often placed on the lower voltage converter side of the VSCs.
In a two-level converter, the AC output voltage magnitude can be made propor-tional to the DC bus voltage, as described by Eq. 14. This equation states that theoutput amplitudes of the fundamental phase to neutral components normalized to theDC capacitor voltage (gain of the VSC) from this type of converter are proportional tothe DC bus voltage. This poses a problem in a UPFC application because in a UPFC,the series converter has to be able to inject a voltage of varying magnitude in order toadjust the degree of reactive power compensation of the line based on varying lineloading as well as the amount of active power injected or removed from the line. Also,the shunt-connected VSC has to match the active power transferred to or from theseries-connected VSC as well as absorb or generate reactive power independent of theseries-connected VSC. These requirements cannot be met if the simple two-level,six-pulse VSC converter, shown in Fig. 8, were to be used for both converters.
ean,1Vdc
¼ ebn,1Vdc
¼ ecn,1Vdc
¼ 2
π(14)
The synthesized variable AC output voltage magnitude can be provided by athree-level converter as shown in Fig. 9. In such a converter, the angle α shown inFig. 9 can be varied to between 0 and 90� to adjust the output voltage amplitude fromthe converter.
The fundamental frequency AC output voltage can be calculated from Eq. 15(Mohan 1995a).
Van ¼ 4
π
Vd
2sin β (15)
where β = 90 – α.That is, if α is set to zero, the converter becomes a two-level converter, and if α is
set to 90�, the output voltage is zero. Thus, the AC output voltage can be variedbetween a maximum value determined by the DC bus voltage and zero.
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 15
The three-level converter technology was selected for the first UPFC built forAmerican Electric Power (AEP) (Renz et al. 1998). To achieve the required160 MVA power ratings for AEP’s UPFC, multiple VSC modules are connected inparallel. Furthermore, in order to reduce the magnitude of the low frequencyharmonics injected into the AC system and to avoid installing large harmonic filters,a 24-pulse quasi-harmonic neutralized (QHN inverter) consisting of 4 6-pulseinverters operated from a common DC capacitor bus was built (CIGRE TB160 2000). That is, the 24-pulse QHN-VSC generates 4 3-phase sets of squarewave voltages with a displacement angle between two consecutive 6-pulse VSCsin the multi-pulse VSC configuration of 15�.2 Since a 3-level converter has threevoltage levels for each “pulse,” the 24-pulse harmonics will be reduced. This hasbeen called a quasi-48-pulse converter. However, this will create very costly anddifficult to build AC transformers like the one shown in Fig. 10.
In the AEP UPFC, the outputs from the four inverters are connected to interme-diate transformers and reactors on the converter side to avoid building a complexhigh-voltage transformer for harmonic cancellation (Renz et al. 1998). An exampleof such a transformer arrangement is shown in Fig. 11.
The solution shown in Fig. 11, is a detailed view of the interface magneticstructures used for the Convertible Static Compensator system installed inNew York Power Authority’s Marcy substation in 2003 (EPRI Report 1001809,2003). Each of the converter groups consists of three GTO-based three-level con-verter legs as shown in Fig. 9. Each of the valve legs is connected in parallel on theDC side to the plus, neutral, and negative poles of the converters as indicated inFig. 11. The AC connections for Group #1 are fed to three reactors, and Groups
D1
D2T2
T1
½ Vdc
D3
D4T4
T3
½ Vdc
Neutral
½ Vdc
-½ Vdc
α
Dc1
Dc2
Fig. 9 Three-level neutral-point-clamped phase-leg and output voltage waveform (switches shownas IGBT devices)
2If 2 2-level converters are phase shifted by 30�, the combination produces 12-pulse harmonics. Toachieve 24-pulse operations with 2-level converters requires a second set of 12-pulse converterswith a phase shift of 15�, that is, the 30� phase shift split in half.
16 R. Adapa et al.
Fig. 10 A 24-pulse harmonic neutralized converter arrangement (a) and associated voltagewaveform (b)
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 17
2 through 4 are connected to the transformer windings as shown in Fig. 11. Thismagnetic circuit arrangement includes a delta-connected AC system side, whichblocks zero-sequence voltages from the AC system side. The intermediate trans-former also includes a delta winding that short-circuits the zero-sequence voltageson the converter side. In addition to the delta winding, the intermediate transformeris made up of an open Y-winding section and a zigzag section to obtain the neededphase shifts between the converter groups. There are also two zero-sequenceblockers not shown in Fig. 11, with series windings from each phase on a common
-Udc +Udc
U0dc
U0dc
LA
LB
LC
A
B1
A1
C1B
C
H2
H1
H3
X1
X3
X2
AHBH
CH
A2
B2
C2
D1
E1
F1
D2
E2
FGroup #4
Group #1
Group #3
Group #2
Intermediate Transformer
Shunt Transformer
Fig. 11 Main circuit topology used in the NYPA UPFC application. (Courtesy of EPRI)
18 R. Adapa et al.
core (EPRI 2003). One of these is in series with the A2, B2, and C2 phases, and theother is placed in series with the D2, E2, and F2 phases.
The series transformer-winding arrangement is shown in Fig. 12. The high-voltage side series windings are shown on the right side in Fig. 12. The transformerhas a delta winding to short-circuit the zero-sequence components in the linecurrents, which works as long as the breakers at both ends of the line are closed.3
The three connections marked LA, LB, and LC shown in Fig. 12 are connected to oneof the VSCs as shown in Fig. 11. The transformer connections marked A11, B11,and C11 shown in Fig. 12 are connected to the intermediate transformer terminals asshown in Fig. 11. In other respects, the converter connections are the same as thoseshown in Fig. 11.
3.1.2 GTO-Based UPFC Station DesignThe main circuit components in an UPFC are in principle the same if parallel orseries connection of converters is used. There are basically two transformer bays forconnection of the converters to the line and station. One is shunt connected and theother is connected in series with the line. When disconnected the series transformerlineside windings have to be short-circuited, whereas the shunt-connected trans-former is disconnected by a circuit breaker in the same manner as is used for regularsubstation transformers.
The main circuit components in a GTO-based UPFC design consisted of thefollowing major components:
• A shunt coupling transformer for connection of the STATCOM converter to theAC network.
X1
X3
X2
Series Transformer
Aout
Bout
Cout
Ain CinBin
LA
LC
LB
AH BH CH
Fig. 12 Series transformer connections
3If any breaker pole opens at one end of the line, there will be no path for current injection into thecircuit in which a breaker pole is opened. In that case, there is an ampere-turns unbalance in the legof the delta winding that is connected to the open line phase and the winding has to saturate beforezero-sequence current will flow in the delta winding.
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 19
• A series coupling transformer for connection of the SSSC into the ac line.• Two harmonic neutralized converters similar to the STATCOM developed in the
mid-1990s (Schauder et al. 1995). Each of these requires their own magneticcircuits for harmonic current cancellation. These magnetic circuits consist oflow-voltage, relatively high-current transformers and air-core reactors.
• A breaker and disconnect switches for connection of the shunt transformer to theAC network.
• A series disconnect switch for isolation of the SSSC from the series transformer.• A fast-acting electronic switch to bypass and protect the converter valves in the
SSSC from overcurrents until a bypass breaker on the line side of the seriestransformer closes. The electronic switch would be a thyristor switch since it canconduct high fault currents for a relatively long time. This is referred to as athyristor bypass switch or TBS.
• A DC link switch to separate the two DC capacitors such that when the switch isopen, the STATCOM and the SSSC have their own DC bus capacitors. This willenable the two converter systems to operate independently of each other.
When the DC line switch (DCLS) is open, and the STATCOM module isdisconnected from the SSSC module, the two VSCs can only generate or absorbreactive power.
3.1.3 Series transformer considerationsThe high-voltage interface transformer windings inserted in series with the AC lineconductors are significantly different from conventional shunt-connected trans-formers. Series windings such as those used in phase-shifting transformers and forthe top winding in an auto transformer are exposed to transient overvoltages andfault currents during line short-circuit events (Heathcote 2007). The windings haveto be able to withstand short-circuit currents, which are limited only by the systemshort-circuit level at the point of connection. That is, the short-circuit duty can bevery high and in particular if a phase-to-phase short circuit were to occur. Becauseboth ends of the series windings can be exposed to switching and lightning surges,the insulation level for the insulation withstand to ground must be the same for bothends of the windings. In addition, a lightning surge impinging on one or the otherends of the windings will impose a dielectric stress between the two winding ends.Thus, the insulation between winding turns will have to be built for this seriesvoltage stress. A lightning arrester across the series winding and arresters fromeach side of the series winding to ground might indeed be required. Some of thesurge voltages will also be transferred to the converter side of the transformer.
Because the rated voltage for the series windings might be a fraction of the systemvoltage at the point of connection, it is likely that the magnetic cores used for theseries windings will frequently saturate. This will bring the impedance of thewinding down to the air-core impedance level and reduce the switching reactancefor the converter valves. This has to be considered in the design of the convertervalves and in the control and protection system for the converters. A series reactor
20 R. Adapa et al.
might be needed in the converter’s output conductors to limit the di/dt if thetransformer core saturates.
Transient overvoltages arising from the line side of the series transformer wind-ings will be transferred to the converter-side windings and the systems connected tothose windings. This requires that the converter valves are designed to withstand thetransient overvoltages that can originate from the line side of the transformer. Thisincludes short-circuit current stresses since a short-circuit current on the line side ofthe series windings will lead to high short-circuit currents flowing through theconverter valves and into the DC bus unless the currents are shunted away fromthe DC bus by suitable control of the semiconductor switches.
As is shown in Fig. 13, the three series windings will also be exposed to short-circuit currents during power system short-circuit events. If the transformer windingsare arranged as single phase modules on the high-voltage side and connected to adelta on converter side, as shown in Fig. 13, then a part of the single phase to groundcurrent, the zero-sequence set as defined by Fortescue, will lead to circulatingcurrents in the low-voltage side delta, while the balanced, orthogonal sets, thepositive- and negative-sequence components, will induce voltages on the converterside of the transformer (Fortescue 1918).4 In that situation, by turning on theswitching devices in the converter, the positive and negative short-circuit currentcomponents can be short-circuited and prevented from flowing into the DC bus. Thisrequires that the switching devices can absorb the power dissipation associated withovercurrents until the series winding can be short-circuited by other means. If there isno short-circuit path enabled by the converter control system, then the inducedvoltages will charge the DC link capacitor through the converter leg diodes. Thiscan lead to capacitor overvoltage, which must be controlled. A DC bus so-calledcrowbar can be inserted in parallel with the DC bus capacitors to shunt excess energyflowing into the capacitors. This crowbar is most likely a GTO-switched resistance(CIGRE TB 144 2000). A turn-off device has to be used in the crowbar circuit sinceotherwise; the current through the crowbar device cannot be extinguished. In a three-level converter, a crowbar is needed for each of the capacitor half sections.
Fig. 13 Three single-phase to delta-connected transformers
4The zero-sequence currents will be short-circuited through the delta winding for as long as currentscan be induced in the AC line. However, if single-pole trip-reclose is used for the line or when oneend of the line opens up, the path for zero-sequence current flow is broken.
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 21
If the transformer connections are as shown in Fig. 14, and a short-circuit currentflows through one high side series winding, there will be no path for the short-circuitcurrent to flow on the low side, but a voltage will be induced into phase a (as shownin the figure) on the low-voltage side of the transformer. In that case, the current canonly flow through the converter circuits if the converter valves are turned on andafter the b- and c-phase windings have saturated. However, a delta winding can andshould be added to the series transformer, which will provide a short-circuit path tothe zero-sequence current component but also enable positive and negative currentflows into the converter if the AC sideline breaker poles are closed. If there is noshort-circuit path enabled by the converter control system, the induced voltage willstress the winding insulation system. Irrespective of the transformer connections asshown in Fig. 13 or Fig. 14, fast-acting, solid-state thyristor switches should beplaced across the windings on the low-voltage converter side to protect the converterside from overvoltages and overcurrents (CIGRE TB 160 2000).
Fast-acting thyristor bypass switches (TBSs) placed across the windings on theconverter side, as shown in Fig. 15, will only allow for short-circuit currents to flowthrough the converter-side windings, but it will not protect the lineside windingsfrom the forces associated with the short-circuit current flows. As is indicated inFig. 15, there could be bypass breakers placed across the series winding to shunt theshort-circuit currents from the series winding on the line side of the transformer.However, unless very fast, special breakers are used, it will take time for the breakersto close, and therefore, the series windings should be designed to sustain short-circuit currents for at least for a couple of cycles. Furthermore, unless a set ofredundant breakers are installed, it is not inconceivable that the protective breakerswill fail to close, which would require the AC line breakers to open to clear the fault.The possibility of having breaker failures will therefore also have to be considered.
3.1.4 GTO-Based UPFC System LossesThe power losses dissipated in VSC converter systems are not often published.However, losses have been published for the 100 Mvar STATCOM installed inTVA’s system (CIGRE TB144 2000). Since the converters in most UPFC installa-tions uses almost the same converter technologies, the TVA STATCOM losses might
Fig. 14 Three single-phase to Y-connected transformers
22 R. Adapa et al.
provide a useful data point. The loss curve shown for the TVA STATCOM istherefore reproduced here. However, the UPFC controllers use three-level con-verters, so the TVA STATCOM losses might be somewhat higher than the lossesin the UPFC converters because the switching losses should be lower in a three-levelconverter than in a two-level converter. Further information about the power lossesin STATCOM controllers can be found in the ▶ “Technical Description of StaticCompensators (STATCOM)” chapter.
The converter losses are due to semiconductor conduction and switching losses,as well as due to “snubber” losses (consumed by dv/dt and di/dt limiting circuits).These losses are greatly dependent on the characteristics of the power semiconduc-tors employed in the converter and the number of switching operations they have toexecute during each fundamental cycle. The loss characteristic shown in Fig. 16represents a GTO-based converter, employing devices with a voltage rating of4.5 kV and a peak turn-off current capability of 4 kA, operated at 60 Hz switchingfrequency with 6 μF snubber capacitor. Due to the low switching frequency, onlyabout one third of the converter losses are due to (semiconductor and snubber)switching losses; the other two thirds are due to conduction losses. Schauder statesthat the converter losses for the TVA STATCOM at full load were approximately600 kW (Schauder et al. 1996). Therefore, it is reasonable to assume that the lossesin the GTO-based, parallel GTO-type UPFC converters are about 1% for each of thetwo converters.
3.1.5 MMC-Based UPFC ConvertersThe UPFCs built from 2010 onward used the MMC technology, which makes itpossible to build high-power, high-voltage converters in which the switching mod-ules are connected in series instead of in parallel with low harmonic ripple in the ACoutput voltage. The MMC evolved rapidly after the introduction of the high-power,
~ ~
TBS TBS
Converter1
Converter2
Converter3
Meili-Mudu double-circuit linesMudu Meili
Shunt Transformer
Series Transformer 2
High Voltage Bypass Breaker
Start-up Resistor
Series Transformer 1
Low VoltageBypass Breaker
High VoltageBreaker
Low Voltage Breaker
Fig. 15 The structure of the Southern Suzhou UPFC Project
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 23
high-voltage IGBT devices, which displaced the GTOs because it enabled seriesconnection of many more devices than is possible with GTO-type devices (Fig. 7).5
The IGBT (Fig. 17), the equivalent circuit of which is shown in Fig. 18, wasinvented in 1982 (CIGRE TB 269 2005). The IGBT chip is designed only to haveforward blocking capability, since in reverse direction there is always an antiparalleldiode for protection. The IGBT and the diode must have the same voltagecapabilities.
Although substantial progress in the area of IGBTs for lower voltages(600–1200 V) was made in the 1980s, it was not until the beginning of the 1990sthat it was realized that this concept was also feasible for higher voltages (2.5 kV,then 3.3 kV in 1997, and 6.5 kV in 2002). Lately, a new type of IGBT has becomeavailable that takes advantage of the effect of electron injection from the emitter toachieve a low saturation voltage similar to that of a GTO. This type of IGBT iscalled IEGT.
An important aspect of IGBTs is their capability to turn-off current, while forwardvoltage is applied. This capability is defined in the safe switching operating area(SSOA) shown in Fig. 19 (CIGRE TB 269 2005).
During switching the IGBT must be able to turn off the peak current, includingripple. Additionally, a margin is added to handle current control regulation andprotection actions during transient conditions. The valve must also be capable ofturning off the current, should a short circuit occur close to the valve. If it is not ableto do so, then it must be able to conduct safely until the AC circuit breaker hasopened. The IGBT’s short-circuit operation capability is defined by the SCSOA
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0–0.5
Interface magnetic Transformer Converter Total
–1 0 0.5 1
Fig. 16 Approximate losses for a GTO-based 48-pulse parallel VSC 100 Mvar STATCOM.(Reproduced from CIGRE TB 144 2000)
5The power semiconductor technologies are still evolving. So it is not impossible for new types ofGTO devices to emerge based on wide bandgap devices (e.g., the silicon carbide technology).
24 R. Adapa et al.
(short-circuit safe operating area), which is slightly different from the SSOA undernormal operation.
At the end of 2004, most FACTS VSC valves used IGBT semiconductor switchesin forward direction with the capability to both turn on and turn off the current. To
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 25
obtain the rated current capability, as is shown in Fig. 17, the IGBT is made of anumber of chips connected in parallel in the same package. There may be anantiparallel freewheeling diode (FWD) integrated in the same semiconductor pack-age to ensure current capability in the opposite (reverse) direction and to prevent theapplication of reverse voltage. The FWD normally also consists of a number of chipsin parallel, in the same way as the IGBT. It is also possible to have the FWD in aseparate package in parallel with the IGBT.
The IGBT has lower gate power requirements and can sustain high frequencyswitching (Mohan 1995b). Initially, it was used in high-voltage, high-power con-verters using pulse width modulation (PWM) techniques, which is still used exten-sively for industrial and lower-power converters (Holmes and Lipo 2003). TheMMC-type converters have displaced pulse width modulated (PMW)-type con-verters because the MMC converters have significantly lower losses thanPWM-type converters. This was the major reason for the MMC’s rapid acceptancein the FACTS market even though the MMC converters require more componentsand are therefore more costly to produce.
The UPFCs and SSSCs built since 2010 have therefore been based on IGBTsusing the MMC half-bridge circuit configuration shown in Fig. 20 as described in the▶ “Power Electronic Topologies for FACTS Controller” chapter. The half-bridgeconverter requires fewer components than a full-bridge converter but will pass short-circuit currents from the AC to the DC side in case of a DC bus short circuit.
In a half-bridge converter with a sufficient number of bridges connected in series,the AC harmonic output from the converter may be acceptable to the connected ACsystem without the use of additional AC harmonic filters.
The switching of the individual half-bridges in an MMC converter can bearranged in different ways. Below is a brief description of two different ways forswitching of the sub-modules. One is a carrier phase shift sinusoidal pulse widthmodulation (CPS-SPWM) scheme, and the other is referred to as the nearest voltage-level modulation (NLM) technology.
The CPS-SPWM is one modulation strategy that can be used in multilevelconverters. The technical features of CPS-SPWM are as follows:
SPWM with low switching frequency is adopted in all of the M sub-modules. Ithas the same frequency modulation ratio, the same amplitude modulation ratio, andthe same sinusoidal modulation signal. The phase of a triangular carrier waveformfor each sub-module is shifted by a difference of 360/M degrees. Due to the uniformdistribution of the 2M triangular waves in the whole modulated wave period, thevoltage levels of the output waveforms is (2M+1). The output voltage increasesM times through linear amplification, and the equivalent switching frequencyincreases 2M times. In this way, the harmonic component of the output voltage isgreatly reduced without changing the switching frequency. Nearest voltage-levelmodulation (NLM) is another MMC modulation control strategy. The NLM modu-lation method achieves a low distortion rate with a high output voltage level using asimple calculation, rather than through separate controllers for each sub-module.MMC-UPFC includes a large number of sub-modules, and therefore, the NLM
technology is widely applied in UPFC-MMC topologies. The basic principle ofNLM is as follows:
The multilevel step voltage wave on the AC side is generated by controlling thenumber of conductive sub-modules to approach the reference wave, as shown inFig. 21. In Fig. 21, the hollow blocks and solid blocks represent the shedding statesub-modules and the working state sub-modules, respectively. The arm reactors arenot included in the diagram. Figure 21 shows the states of sub-modules in everyswitch period, and an approximate sinusoidal waveform (single phase,8 sub-modules of each arm) is synthesized. As the example shown in Fig. 21, eacharm has 8 sub-modules, thus, the output voltage is five-level step wave.
The CPS-SPWM and NLM modulation strategies have their own advantages anddisadvantages. For example, the CPS-SPWM modulation strategy for eachsub-module has the advantages of having the same switching frequency and bal-anced switching losses. However, the overall switching losses are slightly higher forthe CPS-SPWM modulation strategy than for the NLM modulation strategy.
Fig. 20 Half-bridge MMC
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 27
The NLM modulation strategy has the advantages of a low switching frequencyand low switching losses. However, the control accuracy and the harmonic spectrumare not as ideal as desired when the number of output voltage levels is low.
The performance comparison between CPS-SPWM and NLM are shown inTable 1.
Since the MMC unit is equivalent to a three-phase phase unit in parallel on theDC side, and its capacitive energy storage units are located in different sub-modules,the voltage between each arm cannot be exactly the same in steady-state operation;thus circulating current exists besides load current. The circulating current not onlycauses arm current distortion but also increases the currents through the switchingdevices and, therefore, produces unnecessary losses. The internal circulating cur-rents in the MMC result from the voltage unbalance of the upper and lower arms ofeach phase. The circulating current mainly contains a second harmonic negative-sequence component although there are also other lower harmonic components.These circulating current flows inside the arms of MMC have no impact on theexternal AC system. Actually, besides the second harmonic negative-sequencecomponent, the circulation currents also contain a DC component in normal oper-ation, which is generated by a uniform distribution of a DC current among the armsof three phases. Therefore, it is necessary to understand MMC circulating currentand take appropriate suppression strategy for MMC-UPFC control system. Figure 22demonstrates a MMC control block for circulating current suppression.
The simple block diagram shown in Fig. 22 includes the following:
• ucird and ucirq are internal imbalance voltage components of d- and q-axes ofMMC phase unit in the sequence rotating with double frequency coordinatesystem, respectively.
• icird and icirq are circulating current with double frequency of d- and q-axes ofMMC phase unit in the same coordinate, respectively.
0 1 2 3 4 3 2 1 0 –1 –2 –3 –4 –3 –2 –1 0
01
23
43
21
0
–1–2
–3–4
–3–2
–1
Fig. 21 The five-level step wave synthesis principle
28 R. Adapa et al.
• i�cird and i�cirq are command values of d- and q-axe components of shuntconverter input current, respectively.
• ipj and inj are arm currents ( j = a, b, c).
Furthermore, unlike in traditional two-level or three-level topology, MMC has nocentralized DC capacitor, which is replaced by distributed DC capacitors in eachsub-module. Therefore, maintaining the stability of sub-module capacitor voltagecannot be neglected, when power flows on both AC and DC sides of MMC.
MMC voltage balancing consists of three parts: sub-module capacitor voltagebalance within the arms, voltage balance between the arms, and the converter storagecontrol. Sub-module capacitor voltage balance within the arms can keep eachsub-module capacitor voltage at the same level, and each power semiconductordevice sees the same stress. Therefore, sub-module capacitor voltage balancingwithin the arm is a significant factor of evaluating MMC performance.
Table 1 Performance comparison between CPS-SPWM and NLM
Type CPS-SPWM NLM
Advantages The switching frequency of eachsub-module is the same, and theswitching losses are balancedHigh real-time performance, wideequivalent frequency band, and highcontrol precision
The switching frequency is low, andthe switching losses are smallThe hardware circuit is simple, andthe algorithm is simple
Disadvantages Hardware circuit is complex; FPGArequiredSwitching loss is slightly higher
The switching frequency of eachsub-module is not fixed, and thelosses are not balancedWhen the number of output voltagelevels is low, the control precision islow, and the harmonics cannot beignoredThe control precision relative to thereference signal is lowSlow real-time performance
1/2
PI
R0icird –2wsL0icirq
R0icirq +2wsL0icirq
PI
++
+
++
+
–
–
= 0
C2f C2f–1
ipj
icirj icird
ucirq
icirq
injicirq*
*
ucirj*
ucird*
= 0icird*
+
+
Fig. 22 MMC control block for circulating current suppression
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 29
An example of an UPFC built using such converters is shown in Fig. 23. This is asingle line diagram of the Southern Suzhou UPFC Project installed in China. In thisapplication, the UPFC system controls the power flows through two overhead linesthat run in parallel. Therefore, it can be considered as a combination of an UPFC andan Interline Power Flow Controller (IPFC). More information about this project canbe found in the ▶ “Application Examples of the UPFC and Its Potential Variations”chapter.
In Fig. 23 the following can be seen:
• In this system, a resistor (start-up resistor) is inserted between the shunt trans-former and converter #1. This limits the inrush current through the converterwhen the high-voltage breaker for the shunt transformer is closed. This resistor isbypassed after the converter is energized and the DC capacitors have beencharged up.
• Each of converters #2 and #3 has a thyristor bypass switch (TBS) inserted toshort-circuit the series transformer windings in case of an AC line overcurrent.
• Low-voltage bypass breakers are installed in parallel with the TBS to relieve theTBS thyristors from the high fault currents.
• The series transformers can be bypassed by means of high-voltage breakersplaced across the series transformer’s lineside windings.
This would be typical for most UPFC installations. In addition (not shown inFig. 23), there must be disconnect switches so that the system modules can be takenout of service for maintenance.
3.1.6 MMC VSC Converter LossesLosses in MMC VSC systems are not well defined in standards. The losses dependon the conduction and switching losses of the IGBT devices. The switching losses
~ ~
TBS TBS
Converter1
Converter2
Converter3
Meili-Mudu double-circuit linesMudu Meili
Shunt Transformer
Series Transformer 2
High Voltage Bypass Breaker
Start-up Resistor
Series Transformer 1
Low Voltage BypassBreaker
High VoltageBreaker
Low Voltage Breaker
Fig. 23 The structure of the Southern Suzhou UPFC Project
depend on the switching frequency used for the individual MMCmodules. They alsodepend on the power direction of the power flows since the diode losses are lowerthan in the IGBT switching component itself. Furthermore, the number of IGBTdevices installed in the converter valves will determine the harmonic content of theresulting AC output voltages. If it is assumed that the output voltages are sufficientlyharmonic-free to avoid installing AC harmonic filters, then the overall efficiency perconverter might be in the order of 1% at rated output power (Oates and Davidson2011). Allebrod has reached close to the same conclusion (Allebrod et al. 2008).
4 UPFC Protection
4.1 Overvoltage Protection and System Starts
The high-voltage AC system side of an UPFC installation requires the same protec-tion against sustained and transient overvoltages and lightning surges as is used forregular AC high-voltage substations. As discussed above, the exception being theinsulation requirements for the lineside transformer series windings. The powerelectronic subsystems of the UPFC installations are placed indoors in a valve hall.Thus, the equipment in the valve hall is protected from lightning surges. However,the transformers are normally placed outdoors, and these could be affected bylightning surges in the unlikely event of a failure of the lightning protections systemin the substation. In fact, the overvoltage protection requirements are similar to thoseof a VSC type HVDC system (CIGRE TB 269 2005).
All VSC systems can experience transient overvoltages if the AC circuit breakersfor the STATCOM section are closed with zero or low voltage on the DC bus. This isthe same as applying a step voltage on a capacitor from an inductive circuit. That is,there will be a sudden inrush current into the capacitors which will charge up thecapacitor. However, after the first current zeros, the converter diodes will block thecurrent from flowing back into the source. If, prior to energizing the converter, theDC side capacitors are charged up to the peak value of the applied AC voltage, therewill be no inrush current. An alternative is to use breakers with pre-insertionresistors. Such current limiting resistors might also be needed if the inrush currentscause voltage disturbances beyond what is allowed for in the grid code.
Energizing the series converter is easier since the DC side of the series convertercan be supplied with DC voltage for charging the DC bus capacitor from the shuntconverter. However, if the series converter is to be operating isolated from the shuntconverter, the AC bypass switch for the series winding can be opened to energize theconverter side. The current flowing through the TBS will be equal to the currentflowing in the lineside winding multiplied by the windings turns ratio. Assuming thatthe converter is connected to the series transformer, if the TBS switches are gated off,then the series windings will force the AC currents through the diodes in theconverter valves and charge up the DC bus capacitor(s). The DC bus capacitancewill initially act like a capacitive series-connected load in series with the line. Whenthe DC voltage has reached a certain level, the converter must be de-blocked to
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 31
control the DC voltage to the required level. If the converter is not de-blocked, thevoltage across the DC bus capacitor would rise until the bus crowbar operates or theseries transformers saturate. But, if the converter is controlled, it can begin toperform normal reactive power control. That is, this could be a viable method forstarting a SSSC.
4.2 VSC System Faults
The protection of a UPFC can be physically described in the following ways:
• Shunt transformers including any intermediate transformers are protected in theusual way for this type of equipment. This includes current differential protectiverelays, overcurrent relays, sudden pressure relays, etc.
• The shunt converter system is protected for most internal faults through specificactions of the control system on valves firing and eventually through specificdevices (e.g., circuit breaker trips fuses, disconnectors, etc.).
• The series transformer protection is more complicated. For this transformer, it isessential to avoid the effects of magnetic saturation since saturation could causefalse operation of differential relays. When the full phase voltage is applied to thetransmission line winding of the series transformer due to an earth fault on atransmission line near the series transformer, the winding is likely to quicklysaturate. If the transformer’s core is saturated, then the saturation will changepolarity after each current zero. That is, the core will go out of saturation and thensaturate again. This magnetic saturation yields a large current differential betweenthe transmission line current and the converter-side winding current that mightflow in the series transformer. This differential protective relays would thenoperate falsely, so other means of detecting transformer failures must be used.This could be accomplished by a set of overcurrent relays.
• It can be assumed that the series converter valves will be blocked if there is an ACside through fault current. To avoid malfunction of the detection relays, thefollowing relay systems are proposed for detecting internal transformer faults(most of this is described in CIGRE TB 160 2000):1. A sudden pressure relay can be used to detect internal ground faults in the
transformer tank.2. Ground fault in the lineside series winding can be detected using differential
current between both terminals of the transmission line winding. This methodis not affected by the magnetic saturation.
3. Ground faults in the converter winding can be detected using a differentialcurrent measurement between both terminals of the converter winding. Ingeneral, if there is a single point, high impedance ground used in the UPFCcontroller, ground fault can be detected very fast although there will be no faultlocation information when such a ground fault current is used to detect thefault.
32 R. Adapa et al.
4. Turn-to-turn short-circuit faults in the windings (both the lineside and theconverter-side windings) can be detected using differential current relaysplaced between the transmission line and converter windings. However, thismethod is affected by magnetic saturation caused by the earth faults ontransmission line near the series transformer. In order to prevent incorrectoperation, it is possible to restrain the operation by a signal of detectingundervoltage in line winding or detecting the second-order harmonic compo-nent in the winding current.
5. The series converter system is protected for most faults through specificactions of the control system on valve firing and through specific devicessuch as a crowbar.
The crowbar shown in Fig. 23 can be on the line side of the transformer. It can bealso placed on the converter side as shown in Fig. 23, but in this case, the leakagereactance of the transformer will remain during a fault, and it might be necessary toexamine its effect on system protection. Two circuit breakers in series with the UPFCcan be added to improve security for a UPFC internal fault (by disconnecting theUPFC without opening the line) (CIGRE TB 160 2000).
• The DC bus might be protected by specific devices such as fuses, if the fuses caninterrupt the capacitor discharge current.
• The valves normally include one or more redundant semiconductor switchingdevices. Therefore, operation can continue with one or more faulty devices untilthe number of failed devices in a valve exceeds the number of redundant devicesper valve. However, if the number of failed devices exceeds the redundant ones,the risk of complete VSC valve breakdown is increased. This is typically detectedby appropriate monitoring of the switches. When too many component failuresare detected, the converter is tripped with no further consequences except that theconverter is out of service until repaired.
• Ground faults internal to the valve structure might occur through leaks from theliquid valve cooling tubes. Coolant leak detection should be provided that detectsand prevents the development of low resistance ground faults. However, if thisfails, ground faults caused by coolant leaks can be detected through monitoringthe fault current through the converter system ground connections.
• The VSC DC capacitor elements are normally built using self-healing insulation,which eliminates full short circuits. Therefore, some degradation of capacitorelements can be tolerated. However, runaway capacitor insulation failures canoccur, leading to capacitor module short circuit with high fault currents. Thiswould result in a DC bus short circuit. It is therefore, necessary to arrange thecapacitors such that the degradation of one part of the overall capacitor can bedetected by measuring the unbalance current. The capacitor dielectric system isalso combustible, which would be a reason for installing fire protection systems inthe valve halls.
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 33
The series converter can be exposed to high surge currents during AC systemshort-circuit events. Because there has to be ampere-turns ratio balance between thelineside and the converter-side currents flowing through the series windings, a highAC surge current will flow through the diodes in the converter and charge the DCcapacitors. Overcharge of the capacitors can be avoided by enabling a short-circuitpath through the converter valves that will shunt the AC fault currents throughselected valve legs. If the currents exceed the thermal limit for the semiconductors,the TBS has to be triggered to place a short circuit across the series transformerwindings. Thus, the bypass devices for the series windings are critical for protectionof the converter. For example, if the power supply for operating the switching devicegates fails, the AC currents flowing from the series windings can give rise to severeovervoltage on the DC bus or cause failure of the DC bus crowbar if the TBSs areunable to be triggered. Thus, this potential failure mode might lead to requirementsfor redundant power supplies and a highly reliable system for turning on the TBSs.
4.3 Converter Valve Protection Consideration
Internal faults will be precluded to the largest extent possible using appropriatedesign margins for any component and a safe station layout. However, in the event ofan internal fault, all components will be protected by fast-acting protection systems(Schettler et al. 2000). Therefore, as is common in HVDC systems, special, fast-acting protective functions are embedded into the control system. This includesspecial overcurrent and overvoltage protections that limit the voltage and currentstresses on the semiconductors and detect semiconductor and other element failures.However, in spite of these goals, there are potential critical failure modes, whichmight not be cleared fast enough to prevent equipment damage. For example, inVSCs of the type shown in Fig. 24, there are a few severe internal failure modes toconsider.
These faults modes are:
• Location #1: A short circuit between the plus and minus DC buses will create verylow impedance paths. One is a discharge path for the DC bus capacitors, whichcan be extremely large currents because the stray inductance between the two bus
Virtualneutral
Ta1 Da1 Db1 Dc1
ea
eb
ec
Dc2
ia
ibic
Db2
Tc1
Tc2Da2
Tb1
Tb2Ta2
1
23
+
1/2 Vdc
1/2 Vdc
Fig. 24 Severe converter faults
34 R. Adapa et al.
polarities must be very low to enable fast switching and low losses when a valveleg switches from the plus pole to the minus pole or vice versa. Too high currentscan lead to failure of the bus capacitor(s). The other path for fault currents to flowis from the AC power system through the diodes into the fault. These faultcurrents are limited only by the AC circuit reactances. This might damage thesemiconductors if they are not rated for this fault current flow.
• Location #2: This fault path can be a short circuit through the switching devices:the GTO, IGBT, or the diode. If this is just one of many series-connected devices,it should be detected as discussed above. However, it could be a result of a falseturn on signal to the switching devices when the opposite side valve’s switchingdevice is also turned on. In that case, it will become a fault of the type discussedfor Location #3 below.
• Location #3: This fault path is often referred to as a shoot-thru, since it can be theresult of false triggering of the two series-connected valves in the same phase leg. Inthis scenario, the DC bus capacitor will discharge through the short-circuit pathwith consequences similar to a fault at location #1. The fault currents through theswitching devices might cause the switching devices to rupture. In MMC-typeconverters, such a short circuit should be limited to one MMC module.
In a UPFC where both the shunt and series converters are sharing a DC bus, thesefaults must be cleared by the AC breakers for the shunt converters, but it would besufficient to trigger the TBS devices in the series converters, since that will eliminatethe power flows into the faulted area from the series transformer windings.
These types of faults in the STATCOM converter must be detected extremely fast.This is done by special protections in the converter control systems but redundant,high-set overcurrent relays in the AC lines from the shunt transformer should also beinstalled. A short circuit at locations #1 and #3 in the series converter will cause highovercurrents to flow from the STATCOM converter and must be cleared by openingthe AC breaker for the shunt transformer. However, if the series converter is operatedisolated from the STATCOM (the DC bus is open between the two converters), thenthe current infeed from the AC side transformer windings will be limited to the ACline current as transferred to the converter side. Because the discharge of the DC buscapacitor will stop the operation of the converter, the fault can be cleared by TBS andthen by closing the lineside AC bypass breaker.
4.4 UPFC Impact on the Protective Relays
The UPFC may have an influence on the operation of distance protection (Zhou et al.2006). Many AC system protections are based on the principle of estimating theimpedance between the fault location and the protective relay. The presence of aUPFC may modify the measurements needed for making reliable estimates. Thisproblem has already been encountered while installing series capacitors and solu-tions exist, with differential protections, modified distance protections, and direc-tional comparison relaying being some of the options. For the UPFC the problem
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 35
may be slightly different, because during line short circuits, the stresses in the UPFCare high and it may need to be protected by a bypass switch. Therefore, depending onthe leakage reactance of the UPFC and its protection strategy, it may be necessary toconduct studies to verify that the existing protective relays will work properly whenshort circuits occur on the network.
5 UPFC Converter System Control
5.1 VSC Control Systems
The control systems built for creating the synthesized AC voltages on the AC sideof the VSC that are used in an UPFC include functions for creating the pulse trainsneeded to trigger the semiconductors used in the converter valves. Theses controlsalso control the phase and amplitude of the synthesized AC voltages with respectto the AC system voltages. In general, phase locked loops are used to synchronizethe pulse trains to the AC system voltage phasors, such that the created voltageshave a known phase position vis-a-vis the AC system voltages. The details abouthow this is accomplished are typically proprietary information owned by the VSCsuppliers.
All of the converters used in FACTS controllers, which have found acceptance inthe marketplace, are designed for low losses, which require operation with as few aspossible switching operations per cycle. To avoid having to install harmonic filters,the converters operate with a high number of pulses per cycle. However, there aresignificant differences between how these objectives are met. The synthesized outputvoltages are created in a system using parallel-connected, GTO-based relativelylow-voltage VSCs using two- or three-level converters or in a system using theMMC VSCs in which many converter modules are connected in series. All of themhave as an overriding control objective the control of the DC voltage on the installedDC capacitors, which are used for the generation of the output AC voltages (An et al.1998).
The two-level converters utilize a relatively large capacitor connected across theDC bus. This capacitor receives controlled active power to keep the DC voltageacross the capacitor relatively constant. In a three-level converter, as shown in Fig. 9,the DC capacitor is divided into two: one half between the DC bus and a neutral busand the other connected between the opposite DC bus and the neutral. In thisarrangement another control objectives is to keep the neutral bus voltage at zero.
In MMC converters, as shown in Fig. 20 in which the DC capacitors aredistributed across several MMC modules, the control system is designed to keepthe voltage across all of these capacitors constant. The STATCOM modules used forUPFC controllers are in many respects similar to those used for HVDC convertersexcept that the number of series-connected MMC modules is usually fewer inSTATCOM systems than in HVDC converters. That is, some of the publishedinformation for HVDC converters could be applicable to VSCs for FACTS applica-tions (Jacobson et al. 2010; Nam et al. 2016).
36 R. Adapa et al.
5.2 STATCOM Control Systems
The operation of the STATCOM when disconnected from the series converter isdescribed in more detail in the ▶ “Technical Description of Static Compensators(STATCOM)” chapter. Also, there are numerous application examples described inthe ▶ “Applications of STATCOM” chapter that describe many different controlconcepts used for STATCOM controllers.
When the STATCOM is disconnected from the SSSC, it can only control the ACsystem voltage or generate or absorb reactive power for the AC system. A smallamount of active power will flow into the STATCOM to compensate for the losses inthe converter system. A simple example of the STATCOM control system used forthe NYPA STACOM, as shown in Fig. 25, is used to illustrate the control system forthe shunt-connected STATCOM module of the UPFC.
The STATCOM in the NYPA system is designed using pulse amplitude modula-tion control, so the DC bus voltage is allowed to vary in a �18.8% range. While thismight result in some efficiency advantages by lowering the device switching tran-sients, it might result in a slower response when there is a need for increasing theoutput voltage.
In this control system, the instantaneous reactive current component is used toregulate the AC bus positive-sequence voltage. There is a one-cycle lag in thecontrol system to enable calculation of the voltage sequence components. Thefundamental reason for this is that the direct and quadrature components are phasorquantities valid for fundamental frequency components, which require time tomeasure and calculate (Ängquist 2002). There is also a slope function that deter-mines the deviation of the measured voltage from the voltage reference as a functionof the reactive current output level and phase. The slope function is typical for allSVC and STATCOM applications.
This control system is designed to deliver a constant AC voltage at the point ofconnection. However, reactive power control is also a control option. Constant
Fig. 25 Control system design for NYPA’s STATCOM converter
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 37
voltage control might not be the best control strategy for all STATCOM applicationsbecause constant voltage might be destabilizing for generators during power swings.The speed voltage characteristics of generators during transient swings should beconsidered for the design of the dynamic characteristics of the control systems forSTATCOMs and other FACTS controllers since there is a need for maximum poweroutput from a generator when the frequency swings high and reduced power whenthe generator’s frequency swings low. The control system strategy should be devel-oped based on the needs of the power system where the STATCOM/UPFC controlleris going to be installed.
CIGRE has proposed models for study of FACTS systems to be used in load flowand transient stability st udies (TB 145 1999). Figure 26 shows one of the modelsproposed to be used for the STATCOM part of the UPFC. This is a highly simplifiedmodel, only applicable for positive-sequence network models.
Much more detailed models are needed for detailed electromagnetic transientstudies and for control system design purposes (Sen and Keri 2003).
The simple block diagram shown in Fig. 26 includes the following:
• K controller gains• Tc converter time constant (10–30 ms)• VDC ref DC reference voltage (specific)• Droop slope of the V�I characteristics (a few percent)• Vq and Vp voltage limits corresponding to the current ratings of the shunt part of
the UPFC
When operating only as a STATCOM, the active power branch must be disabled.If the STATCOM is operating in the pulse amplitude modulation mode, then the
Fig. 26 Proposed control system model for the shunt converter to be used for load flow andtransient stability studies
38 R. Adapa et al.
variable VDC ref needs to be adjusted to match the amplitude to be produced at theoutputs of the STATCOM. There are also current limits not shown in the blockdiagram.
Much more detailed models are needed for detailed electromagnetic transientstudies and for control system design purposes.
5.3 SSSC Control Systems
When the SSSC operates disconnected from the STATCOM, it can inject a voltage inquadrature with the line current (Sen 1998). To achieve a capacitive compensationeffect, the SSSC injects a voltage in series with the line that is in phase opposition tothe voltage produced by the line current across the series line reactance. As a result,the voltage across the series line reactance is forced to increase, as if its inductancewas reduced, causing a proportional increase in the line current and thecorresponding transmitted power, as illustrated in Fig. 27. Similarly, inductivecompensation (when the SSSC’s output voltage leads the line current) injects avoltage in phase with the voltage across the line reactance. As a result, the voltageacross the line reactance decreases, as if its inductance was increased, causing theline current and the corresponding transmitted power to proportionally decrease. Theline current and the corresponding power increase or decrease are proportional to themagnitude of the series compensating voltage relative to the voltage across the seriesline reactance (CIGRE TB 371 2009).
That is, when the SSSC is operating in the stand-alone mode, it can act like acapacitive series compensation system that boosts the power flow on the line or as acontrolled reactor that bucks the line power flow. Traditionally, this is expressed by
Fig. 27 Vector diagram illustrating the SSSC capacitive and inductive operation modes
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 39
the degree of series compensation, which is defined as the impedance ratio of theseries line reactance to the effective series capacitor or reactor or, equivalently, theamplitude ratio of the voltage across the series line reactor to the series compensatingvoltage. One application of an SSSC is therefore the control of parallel path or loopflows.
The SSSC can, in addition to controlling the positive-sequence voltage injectedinto the line, also be programmed to minimize the negative-sequence components ofthe line although it will cause ripple voltages to arise on the DC bus.
The SSSC control system used for NYPA’s UPFC, shown in Fig. 28, is used toillustrate the design of the SSSC’s control system.
When the SSSC converter of the NYPA system is operating disconnected fromthe STATCOM DC bus, it is designed to use pulse amplitude modulation. In MMCsystems, the control range might be a function of how manyMMCmodules are used.In this operating mode, the SSSC can only produce reactive current compensation.
The model proposed by CIGRE for use in load flow and transient stability studiesof the SSSC in UPFC controllers is shown in Fig. 29 (TB 145 1999). This is also ahighly simplified model only applicable for positive-sequence network models.
The simple block diagram shown in Fig. 29 includes the following:
• K, T(x) controller gains and time constants (specific)• Tc converter time constant (10–30 ms)• Vseries (p,q)• Maximum series voltage (specific)
When operating only as a SSSC, the active power branch of the control system(not shown in Fig. 28) must be disabled. Also, if the SSSC is not connected to theSTATCOM, it needs to charge the DC bus capacitors in order for the SSSC tooperate. There are also current limits not shown in the block diagram.
Fig. 28 Control system design for NYPA’s SSSC converter
40 R. Adapa et al.
5.4 UPFC Control Systems
When the STATCOM and SSSC are operating together with a common DC bus, thetwo control systems must be coordinated such that they do not operate in conflictwith each other. Although the STATCOM and the SSSC can operate as stand-aloneFACTS controllers, the assumption here is that operating the VSCs isolated fromeach other will most likely only be needed if one of the VSCs is not needed or notcapable of operating.
When the controller is connected as an UPFC, the SSSC can perform thefollowing functions (Gyugyi et al. 1997):
• Voltage injection• Active power injection or extraction• Phase angle regulation• Line impedance emulation• Reactive power control• Automatic power flow control• Combinations of these modes
For active power control, there is an added control loop in the SSSC controller,which compares the actual power exchanged with the line based on a power setpoint. When the two converters are connected together, the DC bus voltage iscontrolled by the STATCOM converter (Fig. 30).
The control of the UPFC system as a component of an AC system should notdiffer much for GTO systems using parallel converters or MMC converters withseries-connected modules. The most important feature of a UPFC is its ability totransfer active power between a line and a system bus. This is the fundamentalfunction of the two VSCs in a UPFC when they share the same DC bus, in whichcase active power can be absorbed by the shunt VSC (the STATCOM) and injected
Fig. 29 Proposed control system model for the series converter to be used for load flow andtransient stability studies
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 41
by the series VSC (the SSSC) or vice versa. In this case, the power flows between thetwo VSCs must be exactly matched to avoid causing over or under voltage on theDC bus. That is:
PSTATCOM ¼ PSSSC (16)
If there is a mismatch between the SSSC and STATCOM VSCs, the voltageacross the DC bus of the UPFC could go very high or low. Thus, one of the twoconverters has to be in control of the DC bus voltage.
AC power system transients may cause active power to flow through the SSSCinto the DC bus capacitor (CIGRE TB 371 2009). This exchange of energy and theresulting change in the DC bus voltage must be controlled by the UPFC STATCOMmodule. Furthermore, if the SSSC or the STATCOM is programmed to minimize theAC system negative-sequence components, ripple voltages will arise on the DC bus.This might cause harmonic power to flow through the DC bus unless it is preventedby the control system. Nevertheless, it is possible to use an UPFC for phasebalancing.
As is obvious from Figs. 6 and 31, when the STATCOM and the SSSC share thatsame DC bus, the series-connected compensating voltage can be at any phase anglewith respect to the prevailing line current (Sen and Stacey 1998). That is, the twoVSC units can continue to operate as reactive power compensators independently ofeach other, unless the demand exceeds the rated power of one or both of the VSCssince only active power will flow across the DC bus.
When the STATCOM and UPFC are connected together with a shared DC bus,the control modes illustrated in Fig. 31 are as follows:
• If the voltage injected from the SSSC converter is in phase or with a phaseopposite to the source voltage VS, it operates to increase or decrease the sourcevoltage magnitude.
• If the voltage injected from the SSSC is in quadrature with the source voltage VS
as shown in the horizontal red line in Fig. 31, it operates as a phase shifter.• As has been discussed above and is shown in Fig. 31, when the voltage is in
quadrature with the line current, it acts as a reactive power compensator.
Fig. 30 Active power control system used in the UPFC
42 R. Adapa et al.
In the first two of these three modes, the UPFC must transfer active powerthrough the STATCOM converter. Of course, as stated before, the SSSC can injecta voltage that is a combination of all three modes (see also CIGRE TB 504 2012).From this, it is obvious that an UPFC can be used to boost the power flows on high-power, underutilized lines and buck (limit) the power flows across weaker lines, andthis functionality can be used to avoid overloading a line. Normally the STATCOMconverter would be controlled to keep unity power factor at the bus to which theUPFC is connected. However, the STATCOM and the SSSC converters do not needto have the same rating. The only requirement is that the active power transfer ratingis the same for both converters. Therefore, the STATCOM can if needed have alarger rating than the SSSC.
If two SSSCs with or without a STATCOM converter share the same DC bus,power can be transferred between the two SSSCs, which can be used to move powerbetween stronger and weaker lines, thereby managing overload situations. Anexample of a three-converter system comprised of two SSSCs and one STATCOMas shown in Fig. 32. This system can be operated as two SSSCs or as a UPFCcontrolling the power flow in either the line to New Scotland or to Coopers corner, orboth of these lines receiving the same compensation. All of this can be accomplishedwithout adding significant thermal load capability in the converters to manage short-term, high-current line flows.
The control of the UPFC as a controllable element of the AC system has to bespecially designed for the specific application. Typically, an UPFC controller wouldbe applied to enable stable power transfer across a transmission line that otherwisecould not operate reliably or would be tripped in case of specific system distur-bances. This could be an N-1 or an N-1-1 type contingency situation.
Transient stability improvement is also a typical AC system application forcompensation equipment. This typically requires a high-power boost through keylines during the first and maybe second swing as the system recovers from adisturbance. This might be required during the first second of the system recovery.
Vmax
β
Vx
Vmin
Vr
I
Vs
Vs’s
Vs’
Fig. 31 Control range foran UPFC
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 43
This is where the VSCs are limited because the inherent short-term overcurrentcapability of the IGBTs and GTOs is limited because the forward voltage drop andtherefore the conduction losses in IGBTs and GTOs are higher than in regular, high-power thyristors.6
It is normally detrimental to apply power system damping until the first swing haspassed because doing so may reduce the amount of synchronizing torque to betransferred across a line. However, the UPFC as well as other FACTS controllers andHVDC links can be used to provide such damping as needed if the system remainsstable after the first swing has passed (Grund et al. 1984).
UPFC controllers have, like all of the FACTS technologies, been applied fordamping of sub-synchronous resonances (SSR) affecting large steam turbine genera-tors. The risks associated with SSR are described in significant detail in the ▶ “Tech-nical Description of Thyristor Controlled Series Capacitors (TCSC)” chapter. With acorrectly designed control systems, UPFCs should not excite SSR modes (CIGRE TB371 2009). This might require that the SSR damping control mode in the UPFC isactive even under low load conditions. That is, in this case, an UPFC must be inoperation at all times, which might require redundant converters or changes to theoperation of the AC system to avoid operating regions in which SSR might arise.
CoopersCorner
CONTROL
New ScotlandMarcy 345 kV
±100 MVA voltage sourcedconverter
Fig. 32 Three-converter system installed in New York Power Authority’s Marcy station
6The overload rating might be limited to 15–30% unless higher-power devices are used for thesystem.
The SSSC described above is a fundamental part of a UPFC. However, as is shownin Fig. 33, it can be applied as a stand-alone series reactive power compensator fortransmission lines, too (CIGRE TB 371 2009). The only real power that is drawnfrom the line is to offset the losses of the converter, which includes keeping the DCcapacitor charged without an external DC power supply to keep the capacitorsconnected to the DC bus charged.
The VSC within the SSSC is operated in synchronism with the transmission linecurrent.
The voltage generated by the VSC is kept in quadrature with the line current,lagging or leading it by 90�. Thus, the operating mode of an SSSC, as describedabove and shown in Fig. 27, emulates a controlled series reactive compensator (suchas obtained with the Thyristor Controlled Series Capacitor (TCSC)) but provides awider control range as it can operate equally in the capacitive or inductive operatingdomains. However, since it operates by injecting a voltage in quadrature with the linecurrent, it is not modulating the impedance as is the case with series capacitors andreactors. This might make the SSSC into a powerful tool for moving power throughlines across which the normal angle between the sending and receiving ends is low.
If it is assumed that the line shown in Fig. 27 is embedded in an AC system, thepower flow through the line will increase or decrease proportionally to the magni-tude of the series compensating voltage relative to the voltage across the series linereactance. This might be an alternative to a phase angle regulator for relatively shortlines. The operating range is illustrated in Fig. 34, but there might be a small areaclose to the zero current axes in which the SSSC would not be able to operatebecause the AC current flow would be too low to keep the DC bus capacitor charged.
Fig. 33 Schematic diagramof SSSC
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 45
The transmitted power versus transmission angle, i.e., the Pq-δ characteristic ofthe SSSC at various per unit values of the compensating voltage, Vq (which may becapacitive or inductive), is shown in Fig. 35. This figure illustrates that the uniquecapability of the SSSC in maintaining the maximum compensating voltage indepen-dent of line current results in a wide control range for the transmitted power at agiven transmission angle and provides the means to control the desired power flowunder the transmission angle. It is observable in Fig. 35 that the SSSC is also able todecrease the transmitted power, which might be useful to control inadvertent loopflows in AC systems.
Fig. 34 Operating rangeof SSSC
Fig. 35 Pq-δ characteristicwith SSSC
46 R. Adapa et al.
As the SSSC inserts a voltage source in the AC line, it does not create a classicalseries resonant circuit with the inductive line impedance, which could createsub-synchronous oscillations. By suitable modulation of the inserted series voltage,the SSSC may be able to provide damping of sub-synchronous oscillation by meansof suitable control features. However, as with all controlled devices, there is a risk ofinteractions with other components in the AC network. Therefore, all applicationsmust be studied in detail to determine if the FACTS controller including its featurescan be safely applied in a given system.
6.2 Possible Applications
The SSSC has higher losses than other series compensation systems, which might bea drawback, but it could be a powerful FACTS controller for power flow control. Themain potential applications within the broad area of adjustable or dynamic powerflow control are as follows:
• Compensation of relatively short transmission lines.• In long transmission lines, the SSSC might provide an economical solution in
combination with conventional series capacitor banks to provide a vernier controlby adding to, or subtracting from, the fixed compensation provided by thecapacitors and also to increase the immunity against sub-synchronousoscillations.
• Equalization of power flow in lines and prevention of loop flows of real power.• Receiving-end voltage regulation of a radial line.• Improvement of transient stability and dynamic stability (power oscillation
damping).
6.3 The SSSC Components
The Static Synchronous Series Compensator (SSSC) has been described as part ofthe UPFC. There are no particular differences between the components needed for anSSSC and those for a UPFC, with the exception of the potential need to provide ameans for charging and controlling the voltage of the converter DC capacitor toenable operation of the SSSC with low line currents.
7 Interline Power Flow Controller
7.1 Basic Concepts
The Interline Power Flow Controller (IPFC) represents an extension of the UPFCconcept to control the power flows in a multiline scenario in which two (or more)lines employ SSSCs for series compensation (Gyugyi et al. 1999). In addition toindependently controlling reactive power in each line into which an SSSC is
Technical Description of the Unified Power Flow Controller (UPFC) and Its. . . 47
inserted, as is shown in Fig. 36 for two lines, since the SSSCs share a common DCbus, it would enable transfer of real power between the compensated lines. Thesystem shown in Fig. 36 is equal to the system installed by NYPA except without ashunt-connected STATCOM.
The IPFC could enable balancing of the power transfers between lines of the sameor different system voltage levels to avoid overloading of lower capacity lines andmoving power to higher capacity lines. The exchange of active power must be suchthat there is no net power flowing through the DC bus. This could result in betterutilization of line assets and lower the overall system losses. One application mightbe for power transmission management in a multiline substation.
As has been stated before, in an IPFC system, each SSSC can control the reactivepower flows in the line into which it is inserted independently of the other SSSCsconnected to the same DC bus. However, to enable active power flows, there must beone master SSSC that controls the active power flows for all of the connected SSSCsystems. Another constraint would be that the SSSC converters would have tooperate with a common DC bus voltage, which probably would require all of theSSSC converters to have a common design.
The modified sending-end voltages for lines 1 and 2 are
V1s0 ¼ Vs þ V1s0s (17)
V2s0 ¼ Vs þ V2s0s (18)
However, V1S’S and V2S’S would not need to be equal unless the circuits aresymmetrical and no active power is exchanged.
In theory the IPFC system could be connected between asynchronous systems,but then a better alternative might be a back-to-back HVDC system.
The IPFC concept could be extended to many SSSC controllers combined withSTATCOM systems as illustrated in Fig. 37 (Fardanesh et. al, 1998). This concept isreferred to as a Generalized Power Flow Controller. This becomes a DC power nodewith the AC system branches controlled by the SSSC converter.
Fig. 36 Basic Interline Power Flow Controller (IPFC)
48 R. Adapa et al.
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Ram Adapa, Technical Executive, Electric Power ResearchInstituteDr. RamAdapa is a Technical Executive in the Power Delivery andUtilization Sector at EPRI. His research activities focus on High-Voltage Direct Current (HVDC) transmission, Flexible AC Trans-mission Systems (FACTS), Custom Power, and Fault CurrentLimiters.Dr. Adapa joined EPRI in 1989 as a Project Manager in thePower System Planning and Operations program. Later hebecame Product Line Leader for Transmission, Substations,and Grid Operations where he developed the research portfolioand business execution plans for the Grid Operations and Plan-ning areas. Some of the tools in this portfolio included marketrestructuring, transmission pricing, ancillary services, and secu-rity tools to maintain the reliability of the grid.Before joining EPRI, Dr. Adapa worked at McGraw-EdisonPower Systems (presently known as Eaton’s Cooper PowerSystems) as a Staff Engineer in the Systems EngineeringDepartment.Dr. Adapa received a BS degree in electrical engineering fromJawaharlal Nehru Technological University, India, an MS degreein electrical engineering from the Indian Institute of Technology,Kanpur, India, and a PhD in electrical engineering from theUniversity of Waterloo, Ontario, Canada.Dr. Adapa is an IEEE Fellow and has been honored several timesby IEEE for his outstanding contributions to the profession. Hereceived the 2016 IEEE PES Nari Hingorani Custom PowerAward. He has authored or coauthored more than 125 technicalpapers and is an IEEE Distinguished Lecturer. He is an individ-ual member of CIGRE and a Registered Professional Engineer.
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Stig Nilsson, Principal Engineer, Exponent, Inc., USAStig Nilsson started out working for the Swedish State Tele-phone Board with carrier communication systems. Followingthis, he worked for ASEA (now ABB) with HVDC systemsand for Boeing with computer system developments. Duringhis 20 years with EPRI in the USA, he initiated in 1979 thedevelopment of digital protective relaying system developmentsand in 1986 EPRI’s FACTS initiative. In 1991 he was awarded apatent on Apparatus for Controlling the Reactive Impedance of aTransmission Line. Stig Nilsson is a Life Fellow of IEEE. He haschaired the IEEE PES T&D Committee, the IEEE HermanHalperin Electric Transmission and Distribution Award Com-mittee, the IEEE PES Nari Hingorani FACTS and Custom PowerAwards Committee, and several IEEE Fellow nomination reviewcommittees and been a member of the IEEE Standards Board,IEEE PES subcommittees, and other working groups. Stig Nils-son has been the US Representative and Secretary of CIGREStudy Committee B4 on HVDC and Power Electronics. He is therecipient of the 2012 IEEE PES Nari Hingorani FACTS andCustom Power Awards. He received the CIGRE U.S. NationalCommittee Philip Sporn Award and the CIGRE Technical Com-mittee Award in 2012. He has also received the CIGRE Distin-guished Member Award for active participation in CIGRE StudyCommittees and the USNC of CIGRE (2006) and the CIGREUSNC Attwood Associate Award in 2003. Stig Nilsson is aregistered Professional Engineer in the state of California, USA.
Bjarne Andersen, Director and Owner, Andersen PowerElectronic Solutions Limited (2003)Before becoming an independent consultant, Bjarne worked for36 years for what is now GE Grid, where his final role was asDirector of Engineering. He was involved with the developmentof the first chain link STATCOM and the relocatable SVCs’concept. Bjarne Andersen has extensive experience in all stagesof line-commutated and voltage-sourced converters for HVDCprojects. As a consultant he has worked on several internationalHVDC projects, including the Caprivi Link, the first commercialVSC HVDC project to use an HVDC overhead line, and a VSCHVDC project for multiterminal operation permitting multi-vendor access.Bjarne was the Chairman of CIGRE SC-14 from 2008 to 2014and initiated several working groups in the area of HVDC Grids.He is an Honorary member of CIGRE and was the 2012 recipientof the prestigious IEEE PES Uno Lamm Award.
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Yi Yang, PhD, Senior Engineer, Chair of IEEE PES T&DUPFC Working GroupYi Yang is the deputy director of secondary equipment assess-ment technical department in State Grid Jiangsu Electric PowerResearch Institute, Nanjing, China. His research interests includeFACTS, IEC 61850-based smart substation, relay protection,and smart grid cybersecurity.Yi Yang received the BS degree in electrical engineering andautomation from Chongqing University, Chongqing, China, in2005; the MS degree in electrical engineering from HuazhongUniversity of Science and Technology, Wuhan, China, in 2007;and the PhD degree in electrical and electronic engineering fromthe Queen’s University Belfast, Northern Ireland, UK, in 2013.From 2007 to 2010, he was with the Zhejiang Yuhang PowerSupply Company of State Grid Corporation of China. From2014 to 2017, he participated in the research and application ofthe first 220 and 500 kV MMC-based unified power flow con-troller (UPFC) projects around the world. As the Chair of IEEEPES UPFC WG, he is in charge of drafting the IEEE P2745series, Guide for Technology of Unified Power Flow ControllerUsing Modular Multilevel Converter.Dr. Yi Yang has published over 40 papers. He has participated inwriting four books in English. He is also serving as member ofCIGRE SC D2.02, IEEE PES Nanjing Chapter, Advisory Boardof IEEE PES China Standard Committee, IEEE PES SBLCAsia-Pacific Working Group, and IEEE SBLC P2781. He alsoserves as editorial board member of Progress in Energy & Fuelsand Energy for Sustainable Development, as well as referee ofsome renowned journals/conferences, such as IEEE Transactionon Smart Grid, IEEE Access, IETE Technical Review, IETnetwork, and IEEE PES General Meeting.
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