The 8051 Microcontroller -...

hsabaghianb @ kashanu.ac.ir Microprocessors 1-1

The 8051 Microcontroller

N1

Slide 1

N1 NAJIB, 19-12-2013


8051 Basic Component4K bytes internal ROM128 bytes internal RAMFour 8-bit I/O ports (P0 - P3).Two 16-bit timers/countersOne serial interface

RAM

I/O Port Timer

Serial COM Port

Microcontroller

CPU

A single chipROM


Block Diagram

CPU

InterruptControl

OSC BusControl

4kROM

Timer 1Timer 2

Serial

128 bytes RAM

4 I/O Ports

TXD RXD

External Interrupts

P0 P2 P1 P3Addr/Data


Other 8051 featurs only 1 On chip oscillator (external crystal)

6 interrupt sources (2 external , 3 internal, Reset)

64K external code (program) memory(only read)PSEN

64K external data memory(can be read and write) by RD,WR

Code memory is selectable by EA (internal or external)

We may have External memory as data and code


Embedded System(8051 Application)

What is Embedded System?An embedded system is closely

integrated with the main systemIt may not interact directly with

the environmentFor example – A microcomputer

in a car ignition control

An embedded product uses a microprocessor or microcontroller to do one task only

There is only one application software that is typically burned into ROM


Examples of Embedded Systems

KeyboardPrintervideo game playerMP3 music playersEmbedded memories to keep configuration

informationMobile phone unitsDomestic (home) appliancesData switchesAutomotive controls


Three criteria in Choosing a Microcontroller

meeting the computing needs of the task efficiently and cost effectivelyspeed, the amount of ROM and RAM, the number of I/O

ports and timers, size, packaging, power consumptioneasy to upgradecost per unit

availability of software development toolsassemblers, debuggers, C compilers, emulator, simulator,

technical supportwide availability and reliable sources of the

microcontrollers


Comparison of the 8051 Family Members ROM type

8031 no ROM 80xx mask ROM 87xx EPROM 89xx Flash EEPROM

89xx 8951 8952 8953 8955 898252 891051 892051

Example (AT89C51,AT89LV51,AT89S51) AT= ATMEL(Manufacture) C = CMOS technology LV= Low Power(3.0v)


Comparison of the 8051 Family Members

89XX ROM RAM Timer Int Source

IO pin Other

8951 4k 128 2 6 32 -

8952 8k 256 3 8 32 -

8953 12k 256 3 9 32 WD

8955 20k 256 3 8 32 WD

898252 8k 256 3 9 32 ISP

891051 1k 64 1 3 16 AC

892051 2k 128 2 6 16 AC

WD: Watch Dog TimerAC: Analog ComparatorISP: In System Programable


8051 Internal Block Diagram


8051 Schematic Pin out


8051 Foot Print

1234567891011121314151617181920

4039383736353433323130292827262524232221

P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7RST

(RXD)P3.0(TXD)P3.1

(T0)P3.4(T1)P3.5

XTAL2XTAL1

GND

(INT0)P3.2(INT1)P3.3

(RD)P3.7(WR)P3.6

VccP0.0(AD0)P0.1(AD1)P0.2(AD2)P0.3(AD3)P0.4(AD4)P0.5(AD5)P0.6(AD6)P0.7(AD7)EA/VPPALE/PROGPSENP2.7(A15)P2.6(A14)P2.5(A13)P2.4(A12)P2.3(A11)P2.2(A10)P2.1(A9)P2.0(A8)

8051(8031)(8751)(8951)


IMPORTANT PINS (IO Ports)

One of the most useful features of the 8051 is that it contains four I/O ports (P0 - P3)

Port 0 （pins 32-39）：P0（P0.0～P0.7） 8-bit R/W - General Purpose I/O Or acts as a multiplexed low byte address and data bus for external

memory design

Port 1 （pins 1-8）：P1（P1.0～P1.7） Only 8-bit R/W - General Purpose I/O

Port 2 （pins 21-28）：P2（P2.0～P2.7） 8-bit R/W - General Purpose I/O Or high byte of the address bus for external memory design

Port 3 （pins 10-17）：P3（P3.0～P3.7） General Purpose I/O if not using any of the internal peripherals (timers) or external

interrupts. Each port can be used as input or output (bi-direction)


Port 3 Alternate Functions


8051 Port 3 Bit Latches and I/O Buffers


Hardware Structure of I/O Pin

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pinP1.X

TB1

TB2


Hardware Structure of I/O Pin Each pin of I/O portsInternally connected to CPU busA D latch store the value of this pinWrite to latch＝1：write data into the D latch

2 Tri-state buffer：TB1: controlled by “Read pin”

Read pin＝1：really read the data present at the pin

TB2: controlled by “Read latch”Read latch＝1：read value from internal latch

A transistor M1 gateGate=0: openGate=1: close


Writing “1” to Output Pin P1.X

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pinP1.X

2. output pin is Vcc1. write a 1 to the pin

1

0 output 1

TB1

TB2


Writing “0” to Output Pin P1.X

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pinP1.X

2. output pin is ground1. write a 0 to the pin

0

1 output 0

TB1

TB2


Reading “High” at Input Pin

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pin

P1.X

2. MOV A,P1

external pin=High1. write a 1 to the pin MOV

P1,#0FFH

1

0

3. Read pin=1 Read latch=0 Write to latch=1

1

TB1

TB2


Reading “Low” at Input Pin

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pin

P1.X

8051 IC

2. MOV A,P1

external pin=Low1. write a 1 to the pin

MOV P1,#0FFH1

0

3. Read pin=1 Read latch=0 Write to latch=1

0

TB1

TB2


Port 0 with Pull-Up Resistors

P0.0P0.1P0.2P0.3P0.4P0.5P0.6P0.7

DS500087518951

Vcc10 K

Port

0


IMPORTANT PINS

PSEN (out): Program Store Enable, the read signal for external program memory (active low).

ALE (out): Address Latch Enable, to latch address outputs at Port0 and Port2

EA (in): External Access Enable, active low to access external program memory locations 0 to 4K

RXD,TXD: UART pins for serial I/O on Port 3

XTAL1 & XTAL2: Crystal inputs for internal oscillator.


Pins of 8051

Vcc（pin 40）：

Vcc provides supply voltage to the chip. The voltage source is +5V.

GND（pin 20）：groundXTAL1 and XTAL2（pins 19,18）：

These 2 pins provide external clock.Way 1：using a quartz crystal oscillator Way 2：using a TTL oscillator Example 4-1 shows the relationship

between XTAL and the machine cycle.


XTAL Connection to 8051

Using a quartz crystal oscillatorWe can observe the frequency on the XTAL2 pin.

C2

30pF

C1

30pF

XTAL2

XTAL1

GND


XTAL Connection to an External Clock Source

Using a TTL oscillatorXTAL2 is unconnected.

NC

EXTERNALOSCILLATORSIGNAL

XTAL2

XTAL1

GND


Machine cycle

Find the machine cycle for (a) XTAL = 11.0592 MHz (b) XTAL = 16 MHz.

Solution:

(a) 11.0592 MHz / 12 = 921.6 kHz; machine cycle = 1 / 921.6 kHz = 1.085 s (b) 16 MHz / 12 = 1.333 MHz; machine cycle = 1 / 1.333 MHz = 0.75 s


Pins of 8051

RST（pin 9）：reset input pin and active high（normally low）.The high pulse must be high at least 2

machine cycles.power-on reset.Upon applying a high pulse to RST, the

microcontroller will reset and all values in registers will be lost.Reset values of some 8051 registers

power-on reset circuit


Power-On RESET

EA/VPPX1

X2RST

Vcc

10 uF

8.2 K

30 pF

9

31


RESET Value of Some 8051 Registers:

0000DPTR0007SP0000PSW0000B0000ACC0000PCReset ValueRegister

RAM are all zero


Pins of 8051

/EA（pin 31）：external accessThere is no on-chip ROM in 8031 and 8032 .The /EA pin is connected to GND to indicate the code is

stored externally. /PSEN ＆ ALE are used for external ROM.For 8051, /EA pin is connected to Vcc.“/” means active low.

/PSEN（pin 29）：program store enableThis is an output pin and is connected to the OE pin of the

ROM.See Chapter 14.


Pins of 8051

ALE（pin 30）：address latch enableIt is an output pin and is active high.8051 port 0 provides both address and data.The ALE pin is used for de-multiplexing the

address and data by connecting to the G pin of the 74LS373 latch.


Address Multiplexing for External Memory

Figure 2-7Multiplexing the address (low-byte) and data

bus


Address Multiplexing for External Memory

Figure 2-8Accessing external

code memory



Accessing External Data Memory

Figure 2-11

Interface to 1K RAM


Timing for MOVX instruction


External code memory

ROM

D

74LS373ALE

P0.0

P0.7

PSEN

A0

A7

D0

D7

P2.0

P2.7

A8

A15

OECS

EA

G

8051

RDWR


External data memory

8051 RAM

D

74LS373ALE

P0.0

P0.7

PSEN

A0

A7

D0

D7

P2.0

P2.7

A8

A15

RD

CS

EA

G

RDWR WR


Overlapping External Code and Data Spaces



RAM8051

D

74LS373ALE

P0.0

P0.7

PSEN

A0

A7

D0

D7

P2.0

P2.7

A8

A15

RD

CS

EA

G

RDWR WR



Allows the RAM to be

written as data memory, and

read as data memory as well as code memory.

This allows a program to bedownloaded from outside into the RAM as data, and

executed from RAM as code.



On-Chip MemoryInternal RAM


Registers

0706050403020100

R7R6R5R4R3R2R1R0

0F

08

17

10

1F

18

Bank 3

Bank 2

Bank 1

Bank 0

Four Register BanksEach bank has R0-R7Selectable by psw.2,3


Bit Addressable Memory20h – 2Fh (16 locations X 8-bits = 128 bits)

7F 78

1A

10

0F 08

07 06 05 04 03 02 01 00

2726252423222120

2F

2E

2D

2C

2B

2A

29

28

Bit addressing:mov C, 1Ahormov C, 23h.2


Special Function Registers

DATA registers

CONTROL registersTimersSerial portsInterrupt systemAnalog to Digital converterDigital to Analog converterEtc.

Addresses 80h – FFh

Direct Addressing used to access SPRs


Bit Addressable RAM

Figure 2-6Summary

of the 8051 on-chip

data memory(RAM)


Figure 2-6Summary

of the 8051 on-chip

data memory(Special Function

Registers)

Bit Addressable RAM



Active bank selected by PSW [RS1,RS0] bit

Permits fast “context switching” in interruptservice routines (ISR).

Register Banks



8051 CPU RegistersA (Accumulator)BPSW (Program Status Word)SP (Stack Pointer)PC (Program Counter)DPTR (Data Pointer)

Used in assembler instructions


Registers


Registers

A

B

R0

R1

R3

R4

R2

R5

R7

R6

DPH DPL

PC

DPTR

PC

Some 8051 16-bit Register

Some 8-bit Registers of the 8051


The 8051Assembly Language


Overview

Data transfer instructionsAddressing modesData processing (arithmetic and logic)Program flow instructions


Data Transfer Instructions

MOV dest, source dest sourceStack instructions

PUSH byte ;increment stack pointer, ;move byte on stack

POP byte ;move from stack to byte, ;decrement stack pointer

Exchange instructionsXCH a, byte ;exchange accumulator and byteXCHD a, byte ;exchange low nibbles of

;accumulator and byte


Addressing Modes Immediate Mode – specify data by its value

mov A, #0 ;put 0 in the accumulator;A = 00000000

mov R4, #11h ;put 11hex in the R4 register;R4 = 00010001

mov B, #11 ;put 11 decimal in b register;B = 00001011

mov DPTR,#7521h ;put 7521 hex in DPTR;DPTR = 0111010100100001


Addressing Modes Immediate Mode – continue

MOV DPTR,#7521h MOV DPL,#21HMOV DPH, #75

COUNT EGU 30~~

mov R4, #COUNT

MOV DPTR,#MYDATA~~

0RG 200HMYDATA:DB “IRAN”


Addressing ModesRegister Addressing – either source or

destination is one of CPU registerMOV R0,A

MOV A,R7ADD A,R4ADD A,R7MOV DPTR,#25F5HMOV R5,DPLMOV R,DPH

Note that MOV R4,R7 is incorrect


Addressing ModesDirect Mode – specify data by its 8-bit address

Usually for 30h-7Fh of RAMMov a, 70h ; copy contents of RAM at 70h to aMov R0,40h ; copy contents of RAM at 70h to aMov 56h,a ; put contents of a at 56h to aMov 0D0h,a ; put contents of a into PSW


Addressing ModesDirect Mode – play with R0-R7 by direct address

MOV A,4 MOV A,R4

MOV A,7 MOV A,R7

MOV 7,2 MOV R7,R6

MOV R2,#5 ;Put 5 in R2MOV R2,5 ;Put content of RAM at 5 in R2


Addressing Modes

Register Indirect – the address of the source or destination is specified in registers

Uses registers R0 or R1 for 8-bit address:mov psw, #0 ; use register bank 0mov r0, #0x3Cmov @r0, #3 ; memory at 3C gets #3

; M[3C] 3

Uses DPTR register for 16-bit addresses:mov dptr, #0x9000 ; dptr 9000hmovx a, @dptr ; a M[9000]

Note that 9000 is an address in external memory


Use Register Indirect to access upper RAM block (+8052)


Addressing Modes

Register Indexed Mode – source or destination address is the sum of the base address and the accumulator(Index)

Base address can be DPTR or PCmov dptr, #4000hmov a, #5movc a, @a + dptr ;a M[4005]


Addressing Modes

Register Indexed Mode continue

Base address can be DPTR or PCORG 1000h1000 mov a, #51002 movc a, @a + PC ;a M[1008]1003 Nop

Table Lookup MOVC only can read internal code memory

PC


Acc Register A register can be accessed by direct and register mode

This 3 instruction has same function with different code0703 E500 mov a,00h0705 8500E0 mov acc,00h0708 8500E0 mov 0e0h,00h

Also this 3 instruction 070B E9 mov a,r1070C 89E0 mov acc,r1070E 89E0 mov 0e0h,r1


SFRs Address

B – always direct mode - except in MUL & DIV0703 8500F0 mov b,00h0706 8500F0 mov 0f0h,00h

0709 8CF0 mov b,r4070B 8CF0 mov 0f0h,r4

P0~P3 – are direct address 0704 F580 mov p0,a0706 F580 mov 80h,a 0708 859080 mov p0,p1

Also other SFRs (pcon, tmod, psw,….)


SFRs Address

All SFRs such as(ACC, B, PCON, TMOD, PSW, P0~P3, …) are accessible by name and direct

addressBut

both of them Must be coded as direct address


8051 Instruction Format

Op code Direct address

Op code Immediate data

immediate addressing

add a,#3dh ;machine code=243d

Direct addressing

mov r3,0E8h ;machine code=ABE8



Op code n n n

Register addressing

070D E8 mov a,r0 ;E8 = 1110 1000070E E9 mov a,r1 ;E9 = 1110 1001070F EA mov a,r2 ;EA = 1110 10100710 ED mov a,r5 ;ED = 1110 11010711 EF mov a,r7 ;Ef = 1110 11110712 2F add a,r70713 F8 mov r0,a0714 F9 mov r1,a0715 FA mov r2,a0716 FD mov r5,a0717 FD mov r5,a



Op code i

Register indirect addressing

mov a, @Ri ; i = 0 or 1

070D E7 mov a,@r1070D 93 movc a,@a+dptr070E 83 movc a,@a+pc070F E0 movx a,@dptr0710 F0 movx @dptr,a0711 F2 movx @r0,a0712 E3 movx a,@r1



A10-A8 Op code

relative addressing

here: sjmp here ;machine code=80FE(FE=-2)Range = (-128 ~ 127)

Absolute addressing (limited in 2k current mem block)

0700 1 org 0700h0700 E106 2 ajmp next ;next=706h0702 00 3 nop0703 00 4 nop0704 00 5 nop0705 00 6 nop

7 next:8 end

Op code Relative address

A7-A0 07FEh


8051 Instruction FormatLong distance address

Range = (0000h ~ FFFFh)

0700 1 org 0700h0700 020707 2 ajmp next ;next=0707h0703 00 3 nop0704 00 4 nop0705 00 5 nop0706 00 6 nop

7 next:8 end

Op code A15-A8 A7-A0


Stacks

pushpop

stack

stack pointer

Go do the stack exercise…..


Stack Stack-oriented data transfer

Only one operand (direct addressing) SP is other operand – register indirect - implied

Direct addressing mode must be used in Push and Pop

mov sp, #0x40 ; Initialize SPpush 0x55 ; SP SP+1, M[SP] M[55]

; M[41] M[55]pop b ; b M[55]

Note: can only specify RAM or SFRs (direct mode) to push or pop. Therefore, to push/pop the accumulator, must use acc, not a


Stack (push,pop) Therefore

Push a ;is invalidPush r0 ;is invalidPush r1 ;is invalidpush acc ;is correctPush psw ;is correctPush b ;is correctPush 13h Push 0Push 1Pop 7Pop 8Push 0e0h ;accPop 0f0h ;b


Exchange Instructions

two way data transferXCH a, 30h ; a M[30]XCH a, R0 ; a R0XCH a, @R0 ; a M[R0]XCHD a, R0 ; exchange “digit”

R0[7..4] R0[3..0]a[7..4] a[3..0]

Only 4 bits exchanged


Bit-Oriented Data Transfer transfers between individual bits. Carry flag (C) (bit 7 in the PSW) is used as a single-

bit accumulator RAM bits in addresses 20-2F are bit addressable

mov C, P0.0

mov C, 67h

mov C, 2ch.7


SFRs that are Bit Addressable

SFRs with addresses ending in 0 or 8 are bit-addressable. (80, 88, 90, 98, etc)

Notice that all 4 parallel I/O ports are bit addressable.


Data Processing Instructions

Arithmetic InstructionsLogic Instructions


Arithmetic Instructions

AddSubtractIncrementDecrementMultiplyDivide Decimal adjust


Arithmetic Instructions

Mnemonic DescriptionADD A, byte add A to byte, put result in AADDC A, byte add with carrySUBB A, byte subtract with borrowINC A increment AINC byte increment byte in memoryINC DPTR increment data pointerDEC A decrement accumulatorDEC byte decrement byteMUL AB multiply accumulator by b registerDIV AB divide accumulator by b registerDA A decimal adjust the accumulator


ADD Instructionsadd a, byte ; a a + byteaddc a, byte ; a a + byte + C

These instructions affect 3 bits in PSW:C = 1 if result of add is greater than FFAC = 1 if there is a carry out of bit 3OV = 1 if there is a carry out of bit 7, but not from bit 6, or

visa versa.


Instructions that Affect PSW bits


ADD Examples

mov a, #3Fhadd a, #D3h

What is the value of the C, AC, OV flags after the second instruction is executed?0011 1111

1101 00110001 0010

C = 1AC = 1OV = 0


Signed Addition and Overflow0111 1111 (positive 127)0111 0011 (positive 115)1111 0010 (overflow cannot represent 242 in 8 bits 2’s complement)

2’s complement:0000 0000 00 0…0111 1111 7F 1271000 0000 80 -128…1111 1111 FF -1

1000 1111 (negative 113)1101 0011 (negative 45)0110 0010 (overflow)

0011 1111 (positive)1101 0011 (negative)0001 0010 (never overflows)


Addition Example; Computes Z = X + Y; Adds values at locations 78h and 79h and puts them in 7Ah;------------------------------------------------------------------X equ 78hY equ 79hZ equ 7Ah;-----------------------------------------------------------------

org 00hljmp Main

;-----------------------------------------------------------------org 100h

Main: mov a, Xadd a, Ymov Z, aend


The 16-bit ADD example; Computes Z = X + Y (X,Y,Z are 16 bit);------------------------------------------------------------------X equ 78hY equ 7AhZ equ 7Ch;-----------------------------------------------------------------

org 00hljmp Main

;-----------------------------------------------------------------org 100h

Main: mov a, Xadd a, Ymov Z, amov a, X+1adc a, Y+1mov Z+1, aend


Subtract

SUBB A, byte subtract with borrow

Example:SUBB A, #0x4F ;A A – 4F – C

Notice thatThere is no subtraction WITHOUT borrow. Therefore, if a subtraction without borrow is desired, it is necessary to clear the C flag.

Example:Clr cSUBB A, #0x4F ;A A – 4F


Increment and Decrement

The increment and decrement instructions do NOT affect the C flag.

Notice we can only INCREMENT the data pointer, not decrement.

INC A increment A

INC byte increment byte in memory

INC DPTR increment data pointer

DEC A decrement accumulator

DEC byte decrement byte


Example: Increment 16-bit Word

Assume 16-bit word in R3:R2

mov a, r2 add a, #1 ; use add rather than increment to affect C mov r2, a mov a, r3 addc a, #0 ; add C to most significant bytemov r3, a


Multiply

When multiplying two 8-bit numbers, the size of the maximum product is 16-bits

FF x FF = FE01(255 x 255 = 65025)

MUL AB ; BA A * B

Note : B gets the High byteA gets the Low byte


Division

Integer DivisionDIV AB ; divide A by B

A Quotient(A/B)B Remainder(A/B)

OV - used to indicate a divide by zero condition.C – set to zero


Decimal Adjust

DA a ; decimal adjust a

Used to facilitate BCD addition. Adds “6” to either high or low nibble after an addition to create a valid BCD number.

Example:mov a, #23hmov b, #29hadd a, b ; a 23h + 29h = 4Ch (wanted 52)DA a ; a a + 6 = 52


Logic Instructions

Bitwise logic operations (AND, OR, XOR, NOT)

Clear Rotate Swap

Logic instructions do NOT affect the flags in PSW


Bitwise Logic

ANL AND ORL OR XRL XOR

CPL Complement

Examples:0000111110101100ANL

0000111110101100ORL

0000111110101100XRL

10101100CPL

00001100

10101111

10100011

01010011


Address Modes with Logic

a, bytedirect, reg. indirect, reg, immediate

byte, adirect

byte, #constant

a ex: cpl a

ANL – AND ORL – OR XRL – eXclusive oR

CPL – Complement


Uses of Logic Instructions

Force individual bits low, without affecting other bits.anl PSW, #0xE7 ;PSW AND 11100111

Force individual bits high.orl PSW, #0x18 ;PSW OR 00011000

Complement individual bitsxrl P1, #0x40 ;P1 XRL 01000000


Other Logic Instructions

CLR - clearRL – rotate leftRLC – rotate left through CarryRR – rotate rightRRC – rotate right through CarrySWAP – swap accumulator nibbles


CLR ( Set all bits to 0)

CLR ACLR byte (direct mode)CLR Ri (register mode)CLR @Ri (register indirect mode)


RotateRotate instructions operate only on a

RL a

Mov a,#0xF0 ; a 11110000RR a ; a 11100001

RR a

Mov a,#0xF0 ; a 11110000RR a ; a 01111000


Rotate through Carry

RRC a

mov a, #0A9h ; a A9add a, #14h ; a BD (10111101), C0

rrc a ; a 01011110, C1

RLC a

mov a, #3ch ; a 3ch(00111100)setb c ; c 1

rlc a ; a 01111001, C1

C

C


Rotate and Multiplication/Division

Note that a shift left is the same as multiplying by 2, shift right is divide by 2

mov a, #3 ; A 00000011 (3)clr C ; C 0rlc a ; A 00000110 (6)rlc a ; A 00001100 (12)rrc a ; A 00000110 (6)


Swap

SWAP a

mov a, #72h ; a 27hswap a ; a 27h


Bit Logic Operations

Some logic operations can be used with single bit operands

ANL C, bitORL C, bitCLR CCLR bitCPL CCPL bitSETB CSETB bit

“bit” can be any of the bit-addressable RAM locations or SFRs.


Shift/Mutliply Example

Program segment to multiply by 2 and add 1.


Program Flow Control

Unconditional jumps (“go to”)

Conditional jumps

Call and return


Unconditional Jumps

SJMP <rel addr> ; Short jump, relative address is 8-bit 2’s complement number, so jump can be up to 127 locations forward, or 128 locations back.

LJMP <address 16> ; Long jumpAJMP <address 11> ; Absolute jump to

anywhere within 2K block of program memory

JMP @A + DPTR ; Long indexed jump


Infinite Loops

Start: mov C, p3.7mov p1.6, Csjmp Start

Microcontroller application programs are almost always infinite loops!


Re-locatable CodeMemory specific NOT Re-locatable (machine code)

org 8000hStart: mov C, p1.6

mov p3.7, Cljmp Startend

Re-locatable (machine code)

org 8000hStart: mov C, p1.6

mov p3.7, Csjmp Startend


Jump tableMov dptr,#jump_tableMov a,#index_numberRl aJmp @a+dptr

...Jump_table: ajmp case0

ajmp case1ajmp case2ajmp case3


Conditional Jump

These instructions cause a jump to occur only if a condition is true. Otherwise, program execution continues with the next instruction.

loop: mov a, P1jz loop ; if a=0, goto loop,

; else goto next instruction

mov b, a

There is no zero flag (z) Content of A checked for zero on time


Conditional jumpsMnemonic Description

JZ <rel addr> Jump if a = 0

JNZ <rel addr> Jump if a != 0

JC <rel addr> Jump if C = 1

JNC <rel addr> Jump if C != 1

JB <bit>, <rel addr> Jump if bit = 1

JNB <bit>,<rel addr> Jump if bit != 1

JBC <bir>, <rel addr> Jump if bit =1, &clear bit

CJNE A, direct, <rel addr> Compare A and memory, jump if not equal


Example: Conditional Jumps

jz led_offSetb P1.6sjmp skipover

led_off: clr P1.6mov A, P0

skipover:

if (a = 0) is truesend a 0 to LED

elsesend a 1 to LED


More Conditional Jumps

Mnemonic Description

CJNE A, #data <rel addr> Compare A and data, jump if not equal

CJNE Rn, #data <rel addr> Compare Rn and data, jump if not equal

CJNE @Rn, #data <rel addr> Compare Rn and memory, jump if not equal

DJNZ Rn, <rel addr> Decrement Rn and then jump if not zero

DJNZ direct, <rel addr> Decrement memory and then jump if not zero


Iterative Loops

For A = 0 to 4 do{…}

clr a loop: ...

...inc acjne a, #4, loop

For A = 4 to 0 do{…}

mov R0, #4loop: ...

...djnz R0, loop


Iterative Loops(examples)

mov a,#50hmov b,#00hcjne a,#50h,nextmov b,#01h

next: nopend

mov a,#25hmov r0,#10hmov r2,#5

Again: mov @ro,ainc r0djnz r2,againend

mov a,#0hmov r4,#12h

Back: add a,#05djnz r4,backmov r5,aend

mov a,#0aahmov b,#10h

Back1:mov r6,#50Back2:cpl a

djnz r6,back2djnz b,back1end


Call and Return

Call is similar to a jump, butCall pushes PC on stack before branching

acall <address ll> ; stack PC; PC address 11 bit

lcall <address 16> ; stack PC

; PC address 16 bit


Return

Return is also similar to a jump, butReturn instruction pops PC from stack to get

address to jump to

ret ; PC stack


Subroutines

Main: ...acall sublabel......

sublabel: ......ret

the subroutine

call to the subroutine


Initializing Stack Pointer

SP is initialized to 07 after reset.(Same address as R7)

With each push operation 1st , pc is increased

When using subroutines, the stack will be used to store the PC, so it is very important to initialize the stack pointer. Location 2Fh is often used.

mov SP, #2Fh


Subroutine - Examplesquare: push b

mov b,amul abpop bret

8 byte and 11 machine cycle

square: inc amovc a,@a+pcret

table: db 0,1,4,9,16,25,36,49,64,81

13 byte and 5 machine cycle


Subroutine – another example; Program to compute square root of value on Port 3 ; (bits 3-0) and output on Port 1.

org 0ljmp Main

Main: mov P3, #0xFF ; Port 3 is an inputloop: mov a, P3

anl a, #0x0F ; Clear bits 7..4 of Alcall sqrtmov P1, asjmp loop

sqrt: inc amovc a, @a + PCret

Sqrs: db 0,1,1,1,2,2,2,2,2,3,3,3,3,3,3,3end

reset service

main program

subroutine

data


Why Subroutines?

Subroutines allow us to have "structured" assembly language programs.

This is useful for breaking a large design into manageable parts.

It saves code space when subroutines can be called many times in the same program.


example of delay

mov a,#0aahBack1:mov p0,a

lcall delay1cpl asjmp back1

Delay1:mov r0,#0ffh;1cycleHere: djnz r0,here ;2cycle

ret ;2cycleend

Delay=1+255*2+2=513 cycle

Delay2:mov r6,#0ffh

back1: mov r7,#0ffh ;1cycleHere: djnz r7,here ;2cycle

djnz r6,back1;2cycleret ;2cycleend

Delay=1+(1+255*2+2)*255+2=130818 machine cycle


Long delay ExampleGREEN_LED: equ P1.6

org oohljmp Main

org 100h Main: clr GREEN_LED Again: acall Delay

cpl GREEN_LEDsjmp Again

Delay: mov R7, #02Loop1: mov R6, #00hLoop0: mov R5, #00h

djnz R5, $ djnz R6, Loop0 djnz R7, Loop1 retEND

reset service

main program

subroutine


Example ; Move string from code memory to RAM

org 0mov dptr,#stringmov r0,#10h

Loop1: clr amovc a,@a+dptrjz stopmov @r0,ainc dptrinc r0sjmp loop1

Stop: sjmp stop

; on-chip code memory used for stringorg 18h

String: db ‘this is a string’,0end


Example ; p0:input p1:output

mov a,#0ffhmov p0,a

back: mov a,p0mov p1,asjmp back

setb p1.2mov a,#45h ;data

Again: jnb p1.2,again ;wait for datarequest

mov p0,a ;enable strobesetb p2.3clr p2.3


Example ; duty cycle 50%back: cpl p1.2

acall delaysjmp back

back: setb p1.2acall delayClr p1.2acall delaysjmp back


Example ; duty cycle 66%back: setb p1.2

acall delayacall delayClr p1.2acall delaysjmp back


8051 timer


Interrupts…mov a, #2mov b, #16mul abmov R0, amov R1, bmov a, #12mov b, #20mul abadd a, R0mov R0, amov a, R1addc a, bmov R1, aend

Program Execution

interruptISR: inc r7

mov a,r7jnz NEXTcpl P1.6

NEXT: reti

return


Interrupt Sources

Original 8051 has 5 sources of interrupts Timer 0 overflow Timer 1 overflow External Interrupt 0 External Interrupt 1 Serial Port events (buffer full, buffer empty, etc)

Enhanced version has 22 sourcesMore timers, programmable counter array, ADC, more

external interrupts, another serial port (UART)


Interrupt Process

If interrupt event occurs AND interrupt flag for that event is enabled, AND interrupts are enabled, then:

1. Current PC is pushed on stack.2. Program execution continues at the interrupt

vector address for that interrupt.3. When a RETI instruction is encountered, the PC

is popped from the stack and program execution resumes where it left off.


Interrupt Priorities

What if two interrupt sources interrupt at the same time?

The interrupt with the highest PRIORITY gets serviced first.

All interrupts have a default priority order.

Priority can also be set to “high” or “low”.


Interrupt SFRs

Global Interrupt Enable –must be set to 1 for any interrupt to be enabled

Interrupt enables for the 5 original 8051 interrupts:Timer 2

Serial (UART0)Timer 1

External 1Timer 0

External 01 = Enable0 = Disable


Interrupt Vectors

Each interrupt has a specific place in code memory where program execution (interrupt service routine) begins.

External Interrupt 0: 0003hTimer 0 overflow: 000BhExternal Interrupt 1: 0013hTimer 1 overflow: 001BhSerial : 0023hTimer 2 overflow(8052+) 002bh

Note: that there are only 8 memory locations between vectors.


Interrupt Vectors

To avoid overlapping Interrupt Service routines, it is common to put JUMP instructions at the vector address. This is similar to the reset vector.

org 009B ; at EX7 vectorljmp EX7ISRcseg at 0x100 ; at Main program

Main: ... ; Main program...

EX7ISR:... ; Interrupt service routine... ; Can go after main programreti ; and subroutines.


Example Interrupt Service Routine;EX7 ISR to blink the LED 5 times. ;Modifies R0, R5-R7, bank 3.;----------------------------------------------------

ISRBLK: push PSW ;save state of status wordmov PSW,#18h ;select register bank 3mov R0, #10 ;initialize counter

Loop2: mov R7, #02h ;delay a whileLoop1: mov R6, #00hLoop0: mov R5, #00h

djnz R5, $djnz R6, Loop0djnz R7, Loop1cpl P1.6 ;complement LED valuedjnz R0, Loop2 ;go on then off 10 timespop PSWreti


8051timer/counter


Timers /Counters Programming The 8051 has 2 timers/counters: timer/counter 0

and timer/counter 1. They can be used as1. The timer is used as a time delay generator.

The clock source is the internal crystal frequency of the 8051.

2. An event counter. External input from input pin to count the number of events

on registers. These clock pulses cold represent the number of people

passing through an entrance, or the number of wheel rotations, or any other event that can be converted to pulses.



Timer Set the initial value of registers Start the timer and then the 8051 counts up. Input from internal system clock (machine cycle)When the registers equal to 0 and the 8051

sets a bit to denote time out

toLCD

P1

8051

TL0

TH0

P2SetTimer 0


Counter Count the number of events

Show the number of events on registers External input from T0 input pin (P3.4) for Counter 0 External input from T1 input pin (P3.5) for Counter 1 External input from Tx input pin. We use Tx to denote T0 or T1.

T0

toLCD

P3.4

P1

8051

a switch

TL0

TH0


Registers Used in Timer/Counter

TH0, TL0, TH1, TL1 TMOD (Timer mode register)TCON (Timer control register)You can see Appendix H (pages 413-415) for

details.Since 8052 has 3 timers/counters, the

formats of these control registers are different. T2CON (Timer 2 control register), TH2 and TL2

used for 8052 only.


Basic Registers of the Timer

Both timer 0 and timer 1 are 16 bits wide.These registers stores the time delay as a timerthe number of events as a counter

Timer 0: TH0 & TL0Timer 0 high byte, timer 0 low byte

Timer 1: TH1 & TL1Timer 1 high byte, timer 1 low byte

Each 16-bit timer can be accessed as two separate registers of low byte and high byte.


Timer Registers

D15 D8D9D10D11D12D13D14 D7 D0D1D2D3D4D5D6

TH0 TL0

D15 D8D9D10D11D12D13D14 D7 D0D1D2D3D4D5D6

TH1 TL1

Timer 0

Timer 1


TMOD Register

Timer mode register: TMODMOV TMOD,#21H

An 8-bit register Set the usage mode for two timers

Set lower 4 bits for Timer 0 (Set to 0000 if not used)

Set upper 4 bits for Timer 1 (Set to 0000 if not used)

Not bit-addressable

GATE C/T M1 M0 GATE C/T M1 M0Timer 1 Timer 0

(MSB) (LSB)


Figure 9-3. TMOD Register

GATE Gating control when set. Timer/counter is enabled only while the INTx pin is high and the TRx control pin is set. When cleared, the timer is enabled whenever the TRx control bit is set.

C/T Timer or counter selected cleared for timer operation (input from internal system clock). Set for counter operation (input from Tx input pin).

M1 Mode bit 1M0 Mode bit 0

GATE C/T M1 M0 GATE C/T M1 M0Timer 1 Timer 0

(MSB) (LSB)


C/T (Clock/Timer)

This bit is used to decide whether the timer is used as a delay generator or an event counter.

C/T = 0 : timerC/T = 1 : counter


Gate

Every timer has a mean of starting and stopping. GATE=0

Internal controlThe start and stop of the timer are controlled by way of

software.Set/clear the TR for start/stop timer.

GATE=1External controlThe hardware way of starting and stopping the timer by

software and an external source.Timer/counter is enabled only while the INT pin is high and

the TR control pin is set (TR).


M1, M0M0 and M1 select the timer mode for timers 0 & 1.

M1 M0 Mode Operating Mode 0 0 0 13-bit timer mode

8-bit THx + 5-bit TLx (x= 0 or 1)0 1 1 16-bit timer mode

8-bit THx + 8-bit TLx 1 0 2 8-bit auto reload

8-bit auto reload timer/counter; THx holds a value which is to be reloaded intoTLx each time it overflows.

1 1 3 Split timer mode


Example 9-3Find the value for TMOD if we want to program timer 0 in mode 2, use 8051 XTAL for the clock source, and use instructions to start and stop the timer.Solution:

TMOD= 0000 0010 Timer 1 is not used.Timer 0, mode 2,C/T = 0 to use XTAL clock source (timer)gate = 0 to use internal (software) start and stop method.

timer 1 timer 0


Timer modes


TCON Register (1/2)Timer control register: TMODUpper nibble for timer/counter, lower nibble for

interrupts

TR (run control bit)TR0 for Timer/counter 0; TR1 for Timer/counter 1.TR is set by programmer to turn timer/counter on/off.TR=0: off (stop)TR=1: on (start)

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0Timer 1 Timer0 for Interrupt

(MSB) (LSB)


TCON Register (2/2)TF (timer flag, control flag) TF0 for timer/counter 0; TF1 for timer/counter 1.TF is like a carry. Originally, TF=0. When TH-TL roll

over to 0000 from FFFFH, the TF is set to 1.TF=0 : not reach TF=1: reach If we enable interrupt, TF=1 will trigger ISR.


(MSB) (LSB)


Equivalent Instructions for the Timer Control Register

For timer 0SETB TR0 = SETB TCON.4CLR TR0 = CLR TCON.4

SETB TF0 = SETB TCON.5CLR TF0 = CLR TCON.5

For timer 1SETB TR1 = SETB TCON.6CLR TR1 = CLR TCON.6

SETB TF1 = SETB TCON.7CLR TF1 = CLR TCON.7

TF1 IT0IE0IT1IE1TR0TF0TR1

TCON: Timer/Counter Control Register


Timer Mode 1 In following, we all use timer 0 as an example.

16-bit timer (TH0 and TL0)

TH0-TL0 is incremented continuously when TR0 is set to 1. And the 8051 stops to increment TH0-TL0 when TR0 is cleared.

The timer works with the internal system clock. In other words, the timer counts up each machine cycle.

When the timer (TH0-TL0) reaches its maximum of FFFFH, it rolls over to 0000, and TF0 is raised.

Programmer should check TF0 and stop the timer 0.


Steps of Mode 1 (1/3)

1. Choose mode 1 timer 0 MOV TMOD,#01H

2. Set the original value to TH0 and TL0. MOV TH0,#FFH MOV TL0,#FCH

3. You had better to clear the flag to monitor: TF0=0. CLR TF0

4. Start the timer. SETB TR0



5.The 8051 starts to count up by incrementing the TH0-TL0.TH0-TL0= FFFCH,FFFDH,FFFEH,FFFFH,0000H

FFFC FFFD FFFE FFFF 0000

TF = 0 TF = 0 TF = 0 TF = 0 TF = 1

TH0 TL0Start timer Stop timer

Monitor TF until TF=1

TR0=1 TR0=0

TF


Steps of Mode 1 (3/3)6. When TH0-TL0 rolls over from FFFFH to 0000,

the 8051 set TF0=1. TH0-TL0= FFFEH, FFFFH, 0000H (Now TF0=1)

7. Keep monitoring the timer flag (TF) to see if it is raised.AGAIN: JNB TF0, AGAIN

8. Clear TR0 to stop the process.CLR TR0

9. Clear the TF flag for the next round.CLR TF0


Mode 1 Programming

XTALoscillator ÷ 12

TR

TH TL TF

Timeroverflow

flag

C/T = 0

TF goes high when FFFF 0


Timer Delay Calculation for XTAL = 11.0592 MHz

(a) in hex (FFFF – YYXX + 1) × 1.085 s where YYXX are TH, TL initial values respectively. Notice that values YYXX are in hex.

(b) in decimal Convert YYXX values of the TH, TL register to

decimal to get a NNNNN decimal number then (65536 – NNNNN) × 1.085 s


Example 9-4 (1/3) square wave of 50% duty on P1.5 Timer 0 is used

;each loop is a half clockMOV TMOD,#01 ;Timer 0,mode 1(16-bit)

HERE: MOV TL0,#0F2H ;Timer value = FFF2HMOV TH0,#0FFH CPL P1.5 ACALL DELAY SJMP HERE

50% 50%whole clock

P1.5


Example 9-4 (2/3);generate delay using timer 0DELAY:

SETB TR0 ;start the timer 0AGAIN:JNB TF0,AGAIN

CLR TR0 ;stop timer 0CLR TF0 ;clear timer 0 flagRET

FFF2 FFF3 FFF4 FFFF 0000

TF0 = 0 TF0 = 0 TF0 = 0 TF0 = 0 TF0 = 1


Example 9-4 (3/3)Solution:In the above program notice the following steps.1. TMOD = 0000 0001 is loaded.2. FFF2H is loaded into TH0 – TL0.3. P1.5 is toggled for the high and low portions of the pulse.4. The DELAY subroutine using the timer is called.5. In the DELAY subroutine, timer 0 is started by the “SETB TR0”

instruction.6. Timer 0 counts up with the passing of each clock, which is provided by the

crystal oscillator. As the timer counts up, it goes through the states of FFF3, FFF4, FFF5, FFF6,

FFF7, FFF8, FFF9, FFFA, FFFB, FFFC, FFFFD, FFFE, FFFFH. One more clock rolls it to 0, raising the timer flag (TF0 = 1). At that point, the JNB instruction falls through.

7. Timer 0 is stopped by the instruction “CLR TR0”. The DELAY subroutine ends, and the process is repeated.

Notice that to repeat the process, we must reload the TL and TH registers, and start the timer again (in the main program).


Example 9-9 (1/2) This program generates a square wave on pin P1.5 Using timer 1 Find the frequency.(dont include the overhead of instruction delay) XTAL = 11.0592 MHz

MOV TMOD,#10H ;timer 1, mode 1AGAIN:MOV TL1,#34H ;timer value=3476H

MOV TH1,#76H SETB TR1 ;start

BACK: JNB TF1,BACK CLR TR1 ;stopCPL P1.5 ;next half clockCLR TF1 ;clear timer flag 1SJMP AGAIN ;reload timer1


Example 9-9 (2/2)

Solution:FFFFH – 7634H + 1 = 89CCH = 35276 clock count Half period = 35276 × 1.085 s = 38.274 ms Whole period = 2 × 38.274 ms = 76.548 msFrequency = 1/ 76.548 ms = 13.064 Hz.

NoteMode 1 is not auto reload then the program must reload the TH1, TL1 register every timer overflow if we want to have a continuous wave.


Find Timer Values

Assume that XTAL = 11.0592 MHz . And we know desired delay how to find the values for the TH,TL ?

1. Divide the delay by 1.085 s and get n.2. Perform 65536 –n3. Convert the result of Step 2 to hex (yyxx )4. Set TH = yy and TL = xx.


Example 9-12 (1/2) Assuming XTAL = 11.0592 MHz, write a program to generate a square wave of 50 Hz

frequency on pin P2.3.

Solution:1. The period of the square wave = 1 / 50 Hz = 20 ms.2. The high or low portion of the square wave = 10 ms.3. 10 ms / 1.085 s = 92164. 65536 – 9216 = 56320 in decimal = DC00H in hex.5. TL1 = 00H and TH1 = DCH.


Example 9-12 (2/2)

MOV TMOD,#10H ;timer 1, mode 1AGAIN: MOV TL1,#00 ;Timer value = DC00H

MOV TH1,#0DCH SETB TR1 ;start

BACK: JNB TF1,BACK CLR TR1 ;stopCPL P2.3 CLR TF1 ;clear timer flag 1SJMP AGAIN ;reload timer since

;mode 1 is not;auto-reload


Generate a Large Time Delay

The size of the time delay depends on two factors:They crystal frequencyThe timer’s 16-bit register, TH & TL

The largest time delay is achieved by making TH=TL=0.What if that is not enough? Next Example show how to achieve large time delay


Example 9-13Examine the following program and find the time delay in seconds. Exclude the overhead due to the instructions in the loop.

MOV TMOD,#10H MOV R3,#200

AGAIN: MOV TL1,#08 MOV TH1,#01 SETB TR1

BACK: JNB TF1,BACKCLR TR1 CLR TF1 DJNZ R3,AGAIN

Solution:TH – TL = 0108H = 264 in decimal 65536 – 264 = 65272.One of the timer delay = 65272 × 1.085 s = 70.820 msTotal delay = 200 × 70.820 ms = 14.164024 seconds


Timer Mode 0Mode 0 is exactly like mode 1 except that it is a

13-bit timer instead of 16-bit.8-bit TH0 5-bit TL0

The counter can hold values between 0000 to 1FFF in TH0-TL0.213-1= 2000H-1=1FFFH

We set the initial values TH0-TL0 to count up.When the timer reaches its maximum of 1FFFH, it

rolls over to 0000, and TF0 is raised.


Timer Mode 2

8-bit timer. It allows only values of 00 to FFH to be loaded into TH0.

Auto-reloadingTL0 is incremented continuously when TR0=1.next example: 200 MCs delay on timer 0.See Examples 9-14 to 9-16



1. Chose mode 2 timer 0MOV TMOD,#02H

2. Set the original value to TH0.MOV TH0,#38H

3. Clear the flag to TF0=0.CLR TF0

4. After TH0 is loaded with the 8-bit value, the 8051 gives a copy of it to TL0.TL0=TH0=38H

5. Start the timer.SETB TR0



6. The 8051 starts to count up by incrementing the TL0. TL0= 38H, 39H, 3AH,....

7. When TL0 rolls over from FFH to 00, the 8051 set TF0=1. Also, TL0 is reloaded automatically with the value kept by the TH0. TL0= FEH, FFH, 00H (Now TF0=1) The 8051 auto reload TL0=TH0=38H. Clr TF0 Go to Step 6 (i.e., TL0 is incrementing continuously).

Note that we must clear TF0 when TL0 rolls over. Thus, we can monitor TF0 in next process.

Clear TR0 to stop the process. Clr TR0


Timer 1 Mode 2 with internal Input

XTALoscillator ÷ 12

TR1

TL1

TH1

TF1overflow flag

reload

TF goes high when FF 0

C/T = 0


Example 9-15 Find the frequency of a square wave generated on pin P1.0.Solution:

MOV TMOD,#2H ;Timer 0,mode 2MOV TH0,#0

AGAIN:MOV R5,#250 ;count 250 timesACALL DELAYCPL P1.0SJMP AGAIN

DELAY:SETB TR0 ;startBACK: JNB TF0,BACK ;wait until TL0 ovrflw auto-reload

CLR TR0 ;stopCLR TF0 ;clear TFDJNZ R5,DELAYRET

T = 2 (250 × 256 × 1.085 s) = 138.88 ms, and frequency = 72 Hz.


Example 9-16Assuming that we are programming the timers for mode 2, find the value (in hex) loaded into TH for each of the following cases.(a) MOV TH1,#-200 (b) MOV TH0,#-60 (c) MOV TH1,#-3(d) MOV TH1,#-12 (e) MOV TH0,#-48

Solution:Some 8051 assemblers provide this way.-200 = -C8H 2’s complement of –200 = 100H – C8H = 38 H

Decimal 2’s complement (TH value)-200 = - C8H 38H- 60 = - 3CH C4H- 3 FDH- 12 F4H

- 48 D0H


Example 9-17 (1/2)

Find(a) the frequency of the square wave generated in the following code (b) the duty cycle of this wave.

Solution:“MOV TH0,#-150” uses 150 clocks. The DELAY subroutine = 150 × 1.085 s = 162 s. The high portion is twice tat of the low portion (66% duty cycle). The total period = high portion + low portion T= 325.5 s + 162.25 s = 488.25 s Frequency = 2.048 kHz.


Example 9-17 (2/2)MOV TMOD,#2H ;Timer 0,mode 2MOV TH0,#-150 ;Count=150

AGAIN:SETB P1.3 ACALL DELAY ACALL DELAYCLR P1.3 ACALL DEALY SJMP AGAIN

DELAY:SETB TR0 ;startBACK: JNB TF0,BACK

CLR TR0 ;stopCLR TF0 ;clear TF RET

high period

low period


Counter

These timers can also be used as counters counting events happening outside the 8051.

When the timer is used as a counter, it is a pulse outside of the 8051 that increments the TH, TL.

When C/T=1, the counter counts up as pulses are fed fromT0: timer 0 input (Pin 14, P3.4)T1: timer 1 input (Pin 15, P3.5)


Port 3 Pins Used For Timers 0 and 1

Pin Port Pin Function Description

14 P3.4 T0 Timer/Counter 0 external input15 P3.5 T1 Timer/Counter 1 external input

GATE C/T=1 M1 M0 GATE C/T=1 M1 M0Timer 1 Timer 0

(MSB) (LSB)


Timer/Counter selection


Counter Mode 1 16-bit counter (TH0 and TL0) TH0-TL0 is incremented when TR0 is set to 1 and

an external pulse (in T0) occurs.When the counter (TH0-TL0) reaches its maximum

of FFFFH, it rolls over to 0000, and TF0 is raised. Programmers should monitor TF0 continuously and

stop the counter 0. Programmers can set the initial value of TH0-TL0

and let TF0=1 as an indicator to show a special condition. (ex: 100 people have come).


Timer 0 with External Input (Mode 1)

Timer 0 external input Pin 3.4

TR0

TH0 TL0 TF0

TF0 goes high when FFFF 0

overflow flag

C/T = 1


Counter Mode 2

8-bit counter. It allows only values of 00 to FFH to be loaded

into TH0.Auto-reloading• TL0 is incremented if TR0=1 and external

pulse occurs.See Figure 9.6, 9.7 for logic view• See Examples 9-18, 9-19


Example 9-18 (1/2)Assuming that clock pulses are fed into pin T1, write a program for counter 1 in mode 2 to count the pulses and display the state of the TL 1 count on P2.Solution:

MOV TMOD,#01100000B ;mode 2, counter 1MOV TH1,#0 SETB P3.5 ;make T1 input port

AGAIN:SETB TR1 ;startBACK: MOV A,TL1

MOV P2,A ;display in P2JNB TF1,Back ;overflowCLR TR1 ;stopCLR TF1 ;make TF=0SJMP AGAIN ;keep doing it


Example 9-18 (2/2)

P2 is connected to 8 LEDs and input T1 to pulse.

T1

toLEDs

P3.5

P2

8051

Timer 1 as an event counter fed into pin3.5. “SETB P3.5” make P3.5 an input port by making it high


Example 9-19 (1/3)Assume that a 1-Hz frequency pulse is connected to input pin 3.4. Write a program to display counter 0 on an LCD. Set the initial value of TH0 to -60.Solution:Note that on the first round, it starts from 0 and counts 256 events,

since on RESET, TL0=0. To solve this problem, load TH0 with -60 at the beginning of the program.

T0

toLCD

P3.4

P1

8051

1 Hz clock


Example 9-19 (2/3)

ACALL LCD_SET_UP ;initialize the LCDMOV TMOD,#00000110B ;Counter 0,mode2MOV TH0,#-60 SETB P3.4 ;make T0 as input

AGAIN:SETB TR0 ;starts the counterBACK: MOV A,TL0 ;every 60 events

ACALL CONV ;convert in R2,R3,R4ACALL DISPLY ;display on LCDJNB TF0,BACK ;loop if TF0=0CLR TR0 ;stop CLR TF0 SJMP AGAIN


Example 9-19 (3/3)

;converting 8-bit binary to ASCIICONV: MOV B,#10 ;divide by 10

DIV AB MOV R2,B ;save low digitMOV B,#10 ;divide by 10 once moreDIV AB ORL A,#30H ;make it ASCIIMOV R4,A MOV A,BORL A,#30H MOV R3,A MOV A,R2 ORL A,#30H MOV R2,A ;ACALL LCD_DISPLAY here RET

R4 R3 R2


A Digital Clock Example 9-19 shows a simple digital clock.

If we feed an external square wave of 60 Hz frequency into the timer/counter, we can generate the second, the minute, and the hour out of this input frequency and display the result on an LCD.

You might think that the use of the instruction “JNB TF0,target” to monitor the raising of the TF0 flag is a waste of the microcontroller’s time. The solution is the use of interrupt. See Chapter 11. In using interrupts we can do other things with the 8051. When the TF flag is raised it will inform us.


GATE=1 in TMOD

All discuss so far has assumed that GATE=0.The timer is stared with instructions “SETB TR0”

and “SETB TR1” for timers 0 and 1, respectively.

If GATE=1, we can use hardware to control the start and stop of the timers.INT0 (P3.2, pin 12) starts and stops timer 0INT1 (P3.3, pin 13) starts and stops timer 1This allows us to start or stop the timer externally

at any time via a simple switch.


GATE (external control)

Timer 0 must be turned on by “SETB TR0”If GATE=1 count up if INT0 input is highTR0=1

If GATE=0 count up ifTR0=1






8051Interrupts


Interrupts Programming

An interrupt is an external or internal event that interrupts the microcontroller to inform it that a device needs its service.

Interrupts vs. Polling A single microcontroller can serve several devices. There are two ways to do that:

interrupts polling.

The program which is associated with the interrupt is called the interrupt service routine (ISR) or interrupt handler.


Steps in executing an interrupt Finish current instruction and saves the PC on stack.

Jumps to a fixed location in memory depend on type of interrupt

Starts to execute the interrupt service routine until RETI (return from interrupt)

Upon executing the RETI the microcontroller returns to the place where it was interrupted. Get pop PC from stack


Interrupt Sources

Original 8051 has 6 sources of interrupts Reset Timer 0 overflow Timer 1 overflow External Interrupt 0 External Interrupt 1 Serial Port events (buffer full, buffer empty, etc)

Enhanced version has 22 sourcesMore timers, programmable counter array, ADC, more

external interrupts, another serial port (UART)


Interrupt Vectors

Each interrupt has a specific place in code memory where program execution (interrupt service routine) begins.

External Interrupt 0: 0003hTimer 0 overflow: 000BhExternal Interrupt 1: 0013hTimer 1 overflow: 001BhSerial : 0023hTimer 2 overflow(8052+) 002bh

Note: that there are only 8 memory locations between vectors.


SJMP mainORG 03Hljmp int0srORG 0BHljmp t0srORG 13Hljmp int1srORG 1BHljmp t1srORG 23Hljmp serialsrORG 30H

main:…END

ISRs and Main Program in 8051


Interrupt Enable (IE) register

All interrupt are disabled after resetWe can enable and disable them bye IE


Enabling and disabling an interrupt

by bit operationRecommended in the middle of program

SETB EA ;Enable All SETB ET0 ;Enable Timer0 ovrf SETB ET1 ;Enable Timer1 ovrfSETB EX0 ;Enable INT0SETB EX1 ;Enable INT1SETB ES ;Enable Serial port

by mov instructionRecommended in the first of program

MOV IE, #10010110B

SETB IE.7SETB IE.1SETB IE.3SETB IE.0SETB IE.2SETB IE.4


ExampleA 10khz square wave with 50% duty cycle

ORG 0 ;Reset entry poit

LJMP MAIN ;Jump above interrupt

ORG 000BH ;Timer 0 interrupt vector

T0ISR:CPL P1.0 ;Toggle port bit

RETI ;Return from ISR to Main program

ORG 0030H ;Main Program entry point

MAIN: MOV TMOD,#02H ;Timer 0, mode 2

MOV TH0,#-50 ;50 us delay

SETB TR0 ;Start timer

MOV IE,#82H ;Enable timer 0 interrupt

SJMP $ ;Do nothing just wait

END


Example

Write a program using interrupts to simultaneously create 7 kHz and 500 Hz square waves on P1.7 and P1.6.

71s

143s

1ms

2ms

P1.7

P1.6

8051


71s

143s

1ms

2ms

P1.7

P1.6

8051

SolutionORG 0LJMP MAINORG 000BHLJMP T0ISRORG 001BHLJMP T1ISRORG 0030H

MAIN: MOV TMOD,#12HMOV TH0,#-71SETB TR0SETB TF1MOV IE,#8AHMOV IE,#8AHSJMP $

T0ISR: CPL P1.7RETI

T1ISR: CLR TR1MOV TH1,#HIGH(-1000)MOV TL1,#LOW(-1000)SETB TR1CPL P1.6RETIEND


Timer ISR

Notice thatThere is no need for a “CLR TFx” instruction in

timer ISR 8051 clears the TF internally upon jumping to ISR

Notice that We must reload timer in mode 1There is no need on mode 2 (timer auto reload)


External interrupt type control By low nibble of Timer control register TCON IE0 (IE1): External interrupt 0(1) edge flag.

set by CPU when external interrupt edge (H-to-L) is detected. Does not affected by H-to-L while ISR is executed(no int on int) Cleared by CPU when RETI executed. does not latch low-level triggered interrupt

IT0 (IT1): interrupt 0 (1) type control bit. Set/cleared by software IT=1 edge trigger IT=0 low-level trigger


(MSB) (LSB)


External Interrupts

IE0 (TCON.3)0003

INT0(Pin 3.2) 0

12

IT0

Edge-triggered

Level-triggered (default)

IE1 (TCON.3)

INT0(Pin 3.3) 0

12

IT1

Edge-triggered

Level-triggered (default)

0013


Example of external interuuptORG 0000HLJMP MAIN

;

;interrupt service routine (ISR) ;for hardware external interrupt INT1;

ORG 0013HSETB P1.1MOV R0,200

WAIT: DJNZ R0,WAITCLR P1.1RETI

;

;main program for initialization;

ORG 30HMAIN: SETB IT1 ;on negative edge of INT1

MOV IE,#10000100BWAIT2: SJMP WAIT2

END


Example of external interuupt


Example of external interuuptOrg 0000hLjmp main

Org 0003hx0isr: clr p1.7

Reti

Org 0013hx1isr: setb p1.7

Reti

Org 0030hMain: mov ie,#85h

Setb it0Setb it1Setb p1.7Jb p3.2,skipClr p1.7

Skip: Sjmp $end


Interrupt Priorities What if two interrupt sources interrupt at the same

time? The interrupt with the highest PRIORITY gets

serviced first. All interrupts have a power on default priority order.

1. External interrupt 0 (INT0)2. Timer interrupt0 (TF0)3. External interrupt 1 (INT1)4. Timer interrupt1 (TF1)5. Serial communication (RI+TI)

Priority can also be set to “high” or “low” by IP reg.


Interrupt Priorities (IP) Register

IP.7: reservedIP.6: reservedIP.5: timer 2 interrupt priority bit(8052 only)IP.4: serial port interrupt priority bitIP.3: timer 1 interrupt priority bitIP.2: external interrupt 1 priority bitIP.1: timer 0 interrupt priority bitIP.0: external interrupt 0 priority bit

--- PX0PT0PX1PT1PSPT2---


Interrupt Priorities Example

MOV IP , #00000100B or SETB IP.2 gives priority order1. Int12. Int03. Timer04. Timer15. Serial

MOV IP , #00001100B gives priority order1. Int12. Timer13. Int04. Timer05. Serial

--- PX0PT0PX1PT1PSPT2---


Interrupt inside an interrupt--- PX0PT0PX1PT1PSPT2---

A high-priority interrupt can interrupt a low-priority interrupy

All interrupt are latched internally Low-priority interrupt wait until 8051 has finished

servicing the high-priority interrupt


Serial Communication


Basics of serial communicationParallel: expensive - short distance – fastSerial :cheaper– long (two different cities by modem)-slow


Basics of serial communication


Start and stop bitsWhen there is no transfer the signal is highTransmission begins with a start (low) bitLSB firstFinally 1 stop bit (high)Data transfer rate (baud rate) is stated in bpsbps: bit per second


How to communicate 8051 to PC

Connect TXD to RXD and RXD to TXD from pc to 8051 Use max232 to transform signal from TTL level to RS232 level The baud rate of the 8051 must matched the baud rate of the pc PC standard baud rate

2400-4800-9600-14400-19200-28800-33600-57600

Serial mode 1 is used Timer 1 is used The 8051 UART divides the machine cycle frequency by 32 Machine cycle is 1/12 XTAL frequency We use timer1 in mode 2 (auto reload) See example 10-1


RxD and TxD pins in the 8051

TxD pin 11 of the 8051 (P3.1)RxD pin 10 of the 8051 (P3.0)

SBUF registerMOV SBUF,#’D’ ;load SBUF=44H, ASCII for ‘D’

MOV SBUF,A ;copy accumulator into SBUF

MOV A,SBUF ;copy SBUF into accumulator


MAX232


Serial port block diagram




Serial control (SCON) Register

SM0 (SCON.7) : mode specifierSM1 (SCON.6) : mode specifierSM2 (SCON.5) : used for multi processor communicationREN (SCON.4) : receive enable (by software enable/disable)TB8 (SCON.3) : transmit bit8RB8 (SCON.2) : receive bit 8TI (SCON.1) : transmit interrupt flag set by HW clear by SWRI (SCON.0) : receive interrupt flag set by HW clear by SW

SM0 RITIRB8TB8RENSM2SM1


Mode of operation

SM0 SM1 MODE operation transmit rate0 0 0 shift register fixed (xtal/12)0 1 1 8 bit UART variable (timer1)1 0 2 9 bit UART fixed (xtal/32 or xtal/64)1 1 3 9 bit UART variable (timer1)


Mode of operation Mode 0 :

Serial data enters and exits through RxD TxD outputs the shift clock. 8 bits are transmitted/received(LSB first) The baud rate is fixed a 1/12 the oscillator frequency.

Application Port expansion

8051TXDRXD Shift register

clkdata


Mode of operation Mode 1

Ten bits are transmitted (through TxD) or received (through RxD) A start bit (0), 8 data bits (LSB first), and a stop bit (1) On receive, the stop bit goes into RB8 in SCON the baud rate is determined by the Timer 1 overflow rate. Timer1 clock is 1/32 machine cycle (MC=1/12 XTAL) Timer clock can be programmed as 1/16 of machine cycle Transmission is initiated by any instruction that uses SBUF as a

destination register.


Mode of operation


Mode of operation Mode 2 :

Eleven bits are transmitted (through TxD), received (through RxD) A start bit (0) 8 data bits (LSB first) A programmable 9th data bit and a stop bit (1)

On transmit, the 9th bit (TB8) can be assigned 0 or 1. On receive, the 9the data bit goes into RB8 in SCON. the 9th can be parity bit The baud rate is programmable to 1/32 or 1/64 the oscillator

frequency in Mode 2 by SMOD bit in PCON register

Mode 3 Same as mode 2 But may have a variable baud rate generated from Timer 1.


What is SMOD Bit 7 of PCON register If SMOD=1 double baud rate PCON is not bit addressable How to set SMOD

Mov a, pconSetb acc.7Mov pcon,a


Serial example(1)An example of sending a message.;initialization

MOV TMOD,#20HMOV TH1,#-12MOV SCON,#52H

;begin to trnasmitSETB TR1

AGAIN1: MOV A,#'B'CALL TRANSSMOV A,#'A'CALL TRANSSMOV A,#'L'CALL TRANSSMOV A,#'E'CALL TRANSSSJMP AGAIN1

;seial transmiting subroutineTRANSS: MOV SBUF,AAGAIN2: JNB TI,AGAIN2

CLR TIRETEND


Serial example(2)An example for serial port interrupt

ORG 0000HLJMP MAIN

;jump to serial ISRORG 23HLJMP ISR

;main programORG 30H

;1-initializtionMAIN: MOV P0,#0FFH

MOV TMOD,#20HMOV TH1,#-13MOV SCON,#50HMOV IE,#90H

;2-beginSETB TR1

AGAIN: MOV A,P0MOV P1,ASJMP AGAIN

;

;ISR for reading from serial portISR: PUSH ACC

JB TI,TRANSMMOV A,SBUFMOV P2,ACLR RISJMP ISREND

TRANSM: CLR TIISREND: POP ACC

RETIEND


Serial example(3)an example for serial port interrupt;for transmitting

ORG 0000HLJMP MAIN

;jump to serial ISRORG 23HLJMP ISR

;main programORG 30H

;initializtionMAIN: MOV P0,#0FFH

MOV TMOD,#20HMOV TH1,#-13MOV SCON,#50HMOV IE,#90H

;2-beginSETB TR1

AGAIN: SJMP AGAIN

;ISR for receive from serial to p0;transmitting to serial from p1ISR: JB TI,TRANSM

MOV A,SBUFmov P0,ACLR RIRETI

TRANSM: MOV A,P1MOV SBUF,ACLR TIRETIEND


Serial example(4)ORG 0000;Initialize serial port & timerINIT: MOV SCON,#52H ;Serial port mode 1

MOV TMOD,#20H ;Timer 1, mode 2MOV TH1,#-13 ;Reload count for 2400 baudSETB TR1 ;Start timer 1

;move character 'B' to accumulator for transmittingMOV A,#'B'

;Transmit characters by serial portOUTCHR: MOV C,P ;Put parity bit in C flag

CPL C ;Change to odd parityMOV ACC.7,C ;Add to character code

AGAIN: JNB TI,AGAIN ;Buffer empty? no:check againCLR TI ;Yes:clear falg andMOV SBUF,A ;send characterCLR ACC.7 ;Strip off parity bitJMP $ END


Power control register


Power control

A standard for applications where power consumption is critical

two power reducing modes Idle Power down


Idle mode An instruction that sets PCON.0 causes Idle mode

Last instruction executed before going into the Idle mode the internal CPU clock is gated off Interrupt, Timer, and Serial Port functions act normally. All of registers , ports and internal RAM maintain their data

during Idle ALE and PSEN hold at logic high levels

Any interrupt will cause PCON.0 to be cleared by HW (terminate Idle mode) then execute ISR with RETI return and execute next instruction after Idle

instruction. RST signal clears the IDL bit directly


Power-Down Mode

An instruction that sets PCON.1 causes power dowm mode

Last instruction executed before going into the power down mode

the on-chip oscillator is stopped. all functions are stopped,the contents of the on-chip

RAM and Special Function Registers are maintained. The ALE and PSEN output are held low The reset that terminates Power Down


Power control exampleOrg 0000hLjmp main

Org 0003hOrl pcon,#02h ;power down modeReti

Org 0030hMain:

………………Orl pcon,#01h ;Idle modeend


example

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