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The AEGIS Read-Out Chip for Gamma-Ray Detectors · The AEGIS Read-Out Chip for Gamma-Ray Detectors...

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The AEGIS Read-Out Chip for Gamma-Ray Detectors AEGIS is an array of CMOS (Complementary Metal-Oxide-Semiconductor) circuits for reading the output from the semi-conductor gamma-ray detectors used in SPECT medical imaging systems. The advanced design of the AEGIS application-specific integrated circuit (ASIC) enables gamma-ray events to be recorded about 1,000 times faster than previous read-out arrays designed by CGRI (or anybody else). In previous designs, such as CGRI's SemiSPECT system, the array was continuously scanned and the values for every pixel were all read out to the central processing unit, a process which took about 1 millisecond. With AEGIS, the chip remains dormant until a gamma-ray event occurs, at which time it wakes up and sends out the reading for the active pixel, along with the pixel's location. Values for neighboring pixels can be read out as well, because gamma-ray events are seldom confined to a single pixel. The entire sequence takes 1 microsecond–an improvement of three orders of magnitude in data-capture time. This method also has the advantage of producing only the most useful information, rather than large quantities of sparse data which must be stored and sorted through. Another advantage is that this system operates at room temperature; unlike SemiSPECT, it does not need to be cooled to -10˚C. The project is nearing the end of Phase I, in which a prototype of 64 pixels (an 8 x 8 array of 300 micron pitch) is produced and tested. Forty ASICs have been designed, fabricated, and mounted on a test board, and software has been developed using the LabVIEW programming environment for testing and running the device. Some of the chips have been bonded to cadmium zinc telluride (CZT) detector crystals for testing with a gamma source. Phase II will develop a 64 x 64 pixel version. AEGIS is a collaboration between CGRI (the Center for Gamma-Ray Imaging) at the University of Arizona and Augustine Engineering of Encinitas, California (AEGIS stands for Augustine Engineering Gamma-ray Imaging and Spectroscopy, Inc.). It is funded by a Small Business Innovation Research (SBIR) grant from the National Institutes of Health. Dr. H. Bradford Barber of CGRI is the Principal Investigator, Frank L. Augustine designed the ASIC, and Graduate Research Assistant Pier Ingram developed the software. Figure 1: The AEGIS chip (upper right) mounted on its test board.
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Page 1: The AEGIS Read-Out Chip for Gamma-Ray Detectors · The AEGIS Read-Out Chip for Gamma-Ray Detectors AEGIS is an array of CMOS (Complementary Metal-Oxide-Semiconductor) circuits for

The AEGIS Read-Out Chip for Gamma-Ray Detectors

AEGIS is an array of CMOS (Complementary Metal-Oxide-Semiconductor) circuits for readingthe output from the semi-conductor gamma-ray detectors used in SPECT medical imaging systems.The advanced design of the AEGIS application-specific integrated circuit (ASIC) enables gamma-rayevents to be recorded about 1,000 times faster than previous read-out arrays designed by CGRI (oranybody else).

In previous designs, such as CGRI's SemiSPECT system, the array was continuously scannedand the values for every pixel were all read out to the central processing unit, a process which tookabout 1 millisecond. With AEGIS, the chip remains dormant until a gamma-ray event occurs, at whichtime it wakes up and sends out the reading for the active pixel, along with the pixel's location. Valuesfor neighboring pixels can be read out as well, because gamma-ray events are seldom confined to asingle pixel. The entire sequence takes 1 microsecond–an improvement of three orders of magnitude indata-capture time. This method also has the advantage of producing only the most useful information,rather than large quantities of sparse data which must be stored and sorted through. Another advantageis that this system operates at room temperature; unlike SemiSPECT, it does not need to be cooled to-10˚C.

The project is nearing the end of Phase I, in which a prototype of 64 pixels (an 8 x 8 array of

300 micron pitch) is produced and tested. Forty ASICs have been designed, fabricated, and mounted ona test board, and software has been developed using the LabVIEW programming environment fortesting and running the device. Some of the chips have been bonded to cadmium zinc telluride (CZT)detector crystals for testing with a gamma source. Phase II will develop a 64 x 64 pixel version.

AEGIS is a collaboration between CGRI (the Center for Gamma-Ray Imaging) at theUniversity of Arizona and Augustine Engineering of Encinitas, California (AEGIS stands forAugustine Engineering Gamma-ray Imaging and Spectroscopy, Inc.). It is funded by a Small BusinessInnovation Research (SBIR) grant from the National Institutes of Health. Dr. H. Bradford Barber ofCGRI is the Principal Investigator, Frank L. Augustine designed the ASIC, and Graduate ResearchAssistant Pier Ingram developed the software.

Figure 1: The AEGIS chip (upper right) mounted on its test board.

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