9/21/2006 HJF DOE Review 1 The Development of The Development of Large Large - - Area Psec Area Psec - - Resolution TOF Systems Resolution TOF Systems Henry Frisch Henry Frisch Enrico Fermi Institute and Physics Dept Enrico Fermi Institute and Physics Dept University of Chicago University of Chicago With Harold Sanders, and Fukun Tang (EFI-EDG) Karen Byrum and Gary Drake (ANL); Tim Credo (IMSA, now Harvard), Shreyas Bhat, and David Yu (students)
Transcript
9/21/2006 HJF DOE Review 1
The Development of The Development of LargeLarge--Area PsecArea Psec--
Resolution TOF SystemsResolution TOF Systems
Henry FrischHenry Frisch
Enrico Fermi Institute and Physics DeptEnrico Fermi Institute and Physics Dept
University of ChicagoUniversity of Chicago
With Harold Sanders, and Fukun Tang (EFI-EDG) Karen Byrum and Gary Drake (ANL); Tim Credo (IMSA, now Harvard), Shreyas Bhat, and David Yu (students)
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What is the intrinsic limit What is the intrinsic limit for TOF for for TOF for relrel. particles?. particles?
Typical path lengths for light and electrons are set by physical dimensions of the light collection and amplifying device.
These are now on the order of an inch. One inch is 100 psec. That’s what we measure- no surprise! (pictures swiped from T. Credo talk at Workshop)
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Major advances for TOF measurements:Major advances for TOF measurements:
1. Development of 1. Development of MCP’sMCP’s with 6with 6--10 micron 10 micron pore diameters
Micro-photograph of Burle 25 micron tube-Greg Sellberg(Fermilab)
pore diameters
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Major advances for TOF measurements:Major advances for TOF measurements:
22. . Ability to simulate electronics and systemsAbility to simulate electronics and systemsto predict design performanceto predict design performance
Output at anode from simulation of 10 particles going through fused quartz window- T. Credo, R. Schroll
Jitter on leading edge 0.86 psec
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Major advances for TOF measurements:Major advances for TOF measurements:
Simulation with IHP Gen3 SiGeprocess-Fukun Tang (EFI-EDG)
3. Electronics with typical gate jitters << 1 psec3. Electronics with typical gate jitters << 1 psec
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Geometry for a Collider DetectorGeometry for a Collider Detector
Coil
2” by 2” MCP’s
Beam Axis
““r” is expensiver” is expensive-- need a thin segmented detectorneed a thin segmented detector
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Generating the signalGenerating the signalUse Use CherenkovCherenkov light light -- fastfast
A 2” x 2” MCP-actual thickness ~3/4”
e.g. Burle (Photonis) 85022-with mods per our work
Time Stretcher:Time Stretcher: Simulation ResultSimulation Result
1ns Time Interval (Input Signal)
Stretched Time = 274ns
(pedestal=74ns)
x200 Stretched Time Interval(Output Signal )
0 50ns 100ns 150ns 200ns 250ns 300ns
Tang Slide
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VCO: Submission of Oct. 2006VCO: Submission of Oct. 2006Ultimate Goal:Ultimate Goal:
To build TDC with 1 To build TDC with 1 pSecpSec Resolution for Large Scale of TimeResolution for Large Scale of Time--ofof--Flight Flight Detector.Detector.
Primary Goal:Primary Goal:To build 2To build 2--Ghz VCO, key module of PLL that generates the TDC reference Ghz VCO, key module of PLL that generates the TDC reference signalsignal
CycleCycle--toto--Cycle TimeCycle Time--jitter < 1 jitter < 1 pspsTo evaluate IHP SG25H1/M4M5 Technology for our applicationsTo evaluate IHP SG25H1/M4M5 Technology for our applicationsTo gain experiences on using Cadence tools To gain experiences on using Cadence tools (Virtuoso Analog Environment)(Virtuoso Analog Environment)
Diagram of PhaseDiagram of Phase--Locked LoopLocked Loop
Tang Slide
1N
PD
CPI1
I2LF
VCOUcFref
F0
PD: Phase Detector
CP: Charge Pump
LF: Loop Filter
VCO: Voltage Controlled Oscillator
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IHP (SG25H1) 0.25IHP (SG25H1) 0.25µµm m SiGeSiGeBiCMOSBiCMOS TechnologyTechnology
0.250.25µµm m BiCMOSBiCMOS technology technology 200Ghz NPN HBT (hetero200Ghz NPN HBT (hetero--junction bipolar junction bipolar transistor)transistor)MIM Capacitors (layer2MIM Capacitors (layer2--layer3) ( 1f/1ulayer3) ( 1f/1u22 ))Inductors (layer3Inductors (layer3--layer4)layer4)High dielectric stack for RF passive componentHigh dielectric stack for RF passive component5 metal layers (Al) 5 metal layers (Al) Digital Library: DevelopingDigital Library: Developing
Tang Slide
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SG25 Process SpecificationSG25 Process SpecificationTang Slide
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Tang Slide
22--GHz BiCMOS VCO SchematicGHz BiCMOS VCO SchematicNegative Resistance and Current-Limited Voltage Control Oscillator with Accumulating PMOS Varicapand 50Ω Line Drivers
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VV--F Plot (3 model cases @ 27CF Plot (3 model cases @ 27C--55C)55C)
Temperature: 27C-55CSupply: VDD=2.5V
VControl varied 0.18V
VControl
Frequency
Tang Slide
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BestBest --89.94 dBc/Hz89.94 dBc/Hz
TypicalTypical --89.58 dBc/Hz89.58 dBc/Hz
WorstWorst --89.90 dBc/Hz89.90 dBc/Hz
Phase Noise ( 3 model cases @ 27C)Phase Noise ( 3 model cases @ 27C)
Worst
Typical
Best
@100KHz offset
Temperature: 27CSupply: VDD=2.5V
Tang Slide
Tang Slide
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Calculation of CycleCalculation of Cycle--toto--Cycle JitterCycle Jitter
Transit Analysis: Comparison of Schematic and Transit Analysis: Comparison of Schematic and Post Layout SimulationsPost Layout Simulations
Schematic
Post Layout
Outputs@50Ω loads
Tang Slide
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Simulation for Coil Showering and Simulation for Coil Showering and various various PMTsPMTs ((Shreyas BhatShreyas Bhat))
Right now, we have a simulation using GEANT4, ROOT, Right now, we have a simulation using GEANT4, ROOT, connected by a python scriptconnected by a python scriptGEANT4: piGEANT4: pi++ enters solenoid, eenters solenoid, e-- showersshowersROOT: MCP simulation ROOT: MCP simulation -- get position, time of arrival of get position, time of arrival of charge at anode padscharge at anode padsBoth parts are approximationsBoth parts are approximationsCould we make this less homeCould we make this less home--brew and more modular?brew and more modular?Could we use GATE (Geant4 Application for Could we use GATE (Geant4 Application for TomographicTomographicEmission) to simplify present and future modifications?Emission) to simplify present and future modifications?Working with Prof. ChinWorking with Prof. Chin--tutu Chen and students, Chen and students, UCHospitalsUCHospitalsRadiologyRadiology-- they know GATE very well, use it regularlythey know GATE very well, use it regularly
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Possible Collider ApplicationsPossible Collider Applications•Separating b from b-bar in measuring the top mass (lessenscombinatorics)•Identifying csbar and udbar modes of the W to jj decays in the top mass analysis (need this once one is below 1 GeV, I believe)•Separating out vertices from different collisions at the LHC in the z-t plane•Identifying photons with vertices at the LHC (requires spacial resolution and converter ahead of the TOF system• Locating the Higgs vertex in H to gamma-gamma at the LHC (mass resolution) •Kaon ID in same-sign tagging in B physics (X3 in CDF Bs mixing analysis)•Fixed target geometries- LHCb, Diffractive LHC Higgs, (and rare K and charm FT experiments) •Super-B factory (Nagoya Group, V’avra at SLAC)
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SynergiesSynergies-- The ILC, RadiologyThe ILC, RadiologyANL,Fermilab,SLACANL,Fermilab,SLAC, , BSD,SaclayBSD,Saclay, ,
PhotonisPhotonis•ILC- met with Fermilab last week to discuss possible ILC applications- have propsed a workshop with them to explore physics of particle ID at the ILC•Positron-Emission Tomography – have a draft of a proposal to UC for a program for applying HEP techniques to radiology -with Chin-Tu Chen, RadiologyHave agreed to write MOU with Saclay (Patrick LeDu)Have agreed to write MOU with Photonis/Burle to
develop new MCPs optimized for timingWe are working with Jerry V’avra (SLAC) on measurement setups (Karen and Gary at ANL have the setup).
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StatusStatus1. Have a simulation of Cherenkov radiation in MCP into electronics2. Have placed an order with Burle- have the 1st of 4 tubes and have a
good working relationship (their good will and expertise is a major part of the effort): 10 micron tube in the works; optimized versions discussed
3. Have licence and tools from IHP working on our work stations-Tang is adept and fast working with them. Excellent support from Cadence.
4. Have modeled DAQ/System chip in Altera (Jakob Van Santen: Sr)5. ANL has put together a test stand with working DAQ, has bought a
very-fast laser, has made contact with advanced accelfolks:(+students)
6. Have established strong working relationship with Chin-Tu Chen’s PET group at UC; source of good students; common interests (withSaclay too). Hope can establish a program in the application of HEPto meds
7. Harold and Tang have a good grasp of the overall system problemsand scope, and have a top-level design plus details
8. Have found Greg Sellberg at Fermilab to offer expert precision assembly advice and help (wonderful tools and talent!).
9. Are working closely with Jerry V’avra (SLAC); will work with Saclay
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Next StepsNext Steps1. Start testing the MK-0 device we have (ANL)
2. Understand the electrical circuit in the MCP and specify the next model (MK-I) we want
3. Finish the design and place the order to IHP for the 1st chip.
This was the text on my penultimate slide at the workshop at Arlington TX in April
THE END (not really)Substantial Progress on all 3
See hep.uchicago.edu/~frisch
For more documents and links
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The Electronics Development GroupThe Electronics Development Groupof the EFIof the EFI
Over a million dollars of software tools Over a million dollars of software tools from a number of vendorsfrom a number of vendors-- built up by built up by Harold. Nowhere else I know of…Harold. Nowhere else I know of…Major impact on Major impact on CDF,AtlasCDF,Atlas, , KTeVKTeV, Quiet, , Quiet, ……Serves not just UCServes not just UC-- other institutions send other institutions send folks herefolks here-- systems are collaborativesystems are collaborativeStudent involvementStudent involvement-- we train students in we train students in cuttingcutting--edge electronics (grad and edge electronics (grad and undergunderg))Highly innovative designs Highly innovative designs --
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DOEDOE--ADR FundsADR Funds
First chip submission was last weekFirst chip submission was last week--ADRADRTang leaves tomorrow for Germany for Tang leaves tomorrow for Germany for IHP WorkshopIHP Workshop--ADRADRStarting on next submission design…Starting on next submission design…Will seed collaborative work with ANL, Will seed collaborative work with ANL, SLAC SLAC ((VV’’avraavra), and, hopefully, Fermilab), and, hopefully, FermilabWould like to discuss longerWould like to discuss longer--term support term support for a program of Applications of HEP for a program of Applications of HEP Techniques to Radiology, and also some Techniques to Radiology, and also some EDG support.EDG support.
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Backup SlidesBackup Slides
Miscellaneous…..Miscellaneous…..
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Got Burle MKGot Burle MK--0 (our name)0 (our name)-- many many thanks!thanks!
Paul Mitchell has done nice thingsPaul Mitchell has done nice things-- wonderful test bed for wonderful test bed for understandingunderstanding
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VV--F Plot: Comparison of Schematic and Post F Plot: Comparison of Schematic and Post Layout SimulationsLayout Simulations
Post Layout
Schematic
Vcontrol
Frequency
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Phase Noise: Post Layout SimulationsPhase Noise: Post Layout SimulationsVDD=2.5V Temp.=27C, 55CVDD=2.5V Temp.=27C, 55C
But, we need to writeSource code for Magnetic Field, recompile
PMT/MCP GATE - swap with
default “digitization”module
GATE Get position, time
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The Hard PartsThe Hard Parts-- RealityReality
1. Haven’t yet plugged in a device- all simulation2. Harold and Paul Mitchell (Burle) have taught us that the hard
part is the return path from MCP-OUT to the Gd3. Haven’t yet submitted a design to IHP- don’t know the
realities of making chips (in progress as we speak)4. Have no equipment to test these chips when we get them5. Have no experience on how to measure device performance
