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The domestic refrigerator-An example A car door mechanism.

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The domestic refrigerator-An The domestic refrigerator-An exampleexample

A car door mechanismA car door mechanism

A car door mechanismA car door mechanism There are some sensors, some human interaction and a There are some sensors, some human interaction and a

set of actuators that must respond to the requirements of set of actuators that must respond to the requirements of the system. the system.

One set of sensors relates to the door lock and another One set of sensors relates to the door lock and another to the window. There are two actuators, the window to the window. There are two actuators, the window motor and the lock actuator.motor and the lock actuator.

Central locking can be introduced or an alarm sounded if Central locking can be introduced or an alarm sounded if the door is not locked when the driver tries to pull away. the door is not locked when the driver tries to pull away.

There is therefore considerable advantage in having a There is therefore considerable advantage in having a network which links the humble actions of the door network which links the humble actions of the door control to other functions of the car.control to other functions of the car.

Microchip and the PIC microcontrollerMicrochip and the PIC microcontroller Background:Background:

The PIC was originally a design of the company The PIC was originally a design of the company General Instruments.General Instruments.

It was intended for simple control applications, hence It was intended for simple control applications, hence the name – the name – Peripheral Interface Controller.Peripheral Interface Controller.

The simple CPU was a RISC structure, with a single The simple CPU was a RISC structure, with a single Working register and just 30 instructions.Working register and just 30 instructions.

General Instruments sold off its semiconductor General Instruments sold off its semiconductor division to a group of venture capitalists. division to a group of venture capitalists. MICROCHIP.MICROCHIP.

Microchip made their development tools simple and Microchip made their development tools simple and low cost or free. low cost or free.

Microchip stayed firmly entrenched in the 8-bit world.Microchip stayed firmly entrenched in the 8-bit world.

Choosing a PIC MicrocontrollerChoosing a PIC Microcontroller

The microcontrollers in the PIC10 The microcontrollers in the PIC10 through PIC14 families are considered through PIC14 families are considered low-end microcontrollers.low-end microcontrollers.

PIC microcontrollers in the PIC16 and PIC microcontrollers in the PIC16 and PIC18 families are considered mid-level PIC18 families are considered mid-level microcontrollersmicrocontrollers

16-bit PICs are considered high-end 16-bit PICs are considered high-end microcontrollers.microcontrollers.

Choosing a PIC MicrocontrollerChoosing a PIC Microcontroller Each PIC has unique features and subtle Each PIC has unique features and subtle

differences. The correct choice for your project differences. The correct choice for your project depends on:depends on: Does the project require analog input or output?Does the project require analog input or output? Does the project require digital input or output?Does the project require digital input or output? How many I/O pins are required?How many I/O pins are required? Does the project require precise timing?Does the project require precise timing? How much memory does the project require?How much memory does the project require? Is serial I/O required?Is serial I/O required?

Harvard ArchitectureHarvard Architecture

A 14-bit wide program memory access bus fetches a 14-A 14-bit wide program memory access bus fetches a 14-bit instruction in a single cycle.bit instruction in a single cycle.

This means that all locations are valid instructions.This means that all locations are valid instructions.

Instruction PipelineInstruction Pipeline

The instruction pipeline is a two-stage pipeline The instruction pipeline is a two-stage pipeline which overlaps the fetch and execution of which overlaps the fetch and execution of instructions.instructions.

The fetch of the instruction takes one TThe fetch of the instruction takes one TCYCY, while , while

the execution takes another Tthe execution takes another TCYCY. .

However, due to the However, due to the overlapoverlap of the fetch of of the fetch of current instruction and execution of previous current instruction and execution of previous instruction, an instruction is fetched and another instruction, an instruction is fetched and another instruction is executed every single Tinstruction is executed every single TCYCY..

Instruction PipelineInstruction Pipeline

Orthogonal (Symmetric) Orthogonal (Symmetric) InstructionsInstructions

Orthogonal instructions make it possible to carry out any Orthogonal instructions make it possible to carry out any operation on any register using any addressing mode. operation on any register using any addressing mode.

This symmetrical nature and lack of “special instructions” This symmetrical nature and lack of “special instructions” make programming simple yet efficient. make programming simple yet efficient.

The mid-range instruction set uses only two non-register The mid-range instruction set uses only two non-register oriented instructions, which are used for two of the cores oriented instructions, which are used for two of the cores features.features.

One is the One is the SLEEPSLEEP instruction which places the device into the instruction which places the device into the lowest power use mode. lowest power use mode.

The other is the The other is the CLRWDTCLRWDT instruction which verifies the chip is instruction which verifies the chip is operating properly by preventing the on-chip Watchdog Timer operating properly by preventing the on-chip Watchdog Timer (WDT) from overflowing and resetting the device.(WDT) from overflowing and resetting the device.

Clocking Scheme/Instruction Clocking Scheme/Instruction CycleCycle The clock input (from OSC1) is internally divided by four to generate four The clock input (from OSC1) is internally divided by four to generate four

non-overlapping quadrature clocks, namely Q1, Q2, Q3, and Q4. non-overlapping quadrature clocks, namely Q1, Q2, Q3, and Q4. Internally, the program counter (PC) is incremented every Q1, and the Internally, the program counter (PC) is incremented every Q1, and the

instruction is fetched from the program memory and latched into the instruction is fetched from the program memory and latched into the instruction register in Q4. instruction register in Q4.

The instruction is decoded and executed during the following Q1The instruction is decoded and executed during the following Q1

Program Memory Organization

The PIC16F87X devices have a 13-bit program counter capable of addressing an 8K x 14 program memory space.

The PIC16F877/876 devices have 8K x 14 words of FLASH program memory.

Accessing a location above the physically implemented address will cause a wraparound.

The RESET vector is at 0000h and the interrupt vector is at 0004h.


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