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The new E-port interface circuits
Filip TavernierCERN
Filip Tavernier - CERN 2
Required modifications to the previous version
• modify the TX so that it has a high-impedant output when disabled
• add a programmable (ON/OFF) termination network to the RX
• modify the RX so that it can handle both SLVS and LVDS signals
• boost the RX operation speed so that it can handle a 320 MHz clock signal(‘bandwidth switch’ to trade speed for power?)
• make a bi-directional cell
Filip Tavernier - CERN 3
Architecture of the SLVS TX
• signals:– input: digital single-ended voltage– output: analog differential current
• building blocks:– predriver: converts the input signal into a differential
digital voltage– driver: converts the differential voltage into a
differential current
predriver driver
Filip Tavernier - CERN 4
The previous TX predriver
outn
outp
latp1
latp3
latn2
latn1
latn3
latp2
latp1
latp3
latn2
latn1
latn3
latp2
GND
GND
GND
GND
GND
GND
offb1
offb3
offb2in
off
offb1
offb3
offb2
cset<0:3>
cset<0:3>
cset<0:3>
off = HIGH → outp = LOW & outn = HIGH
Filip Tavernier - CERN 5
The TX driver
inn
inpinn
inp
at the RX
bias1
bias2zero-Vt
outn outp
• off = LOW– inp = HIGH & inn = LOW
→ current flows ‘from right to left’ in the termination resistor
– inp = LOW & inn = HIGH→ ‘from left to right’
• off = HIGH– bias1 = bias2= 0 V– a low-impedant path still exists
between outp and GND because inn = HIGH and the zero-Vt device is not completely off
Filip Tavernier - CERN 6
The new TX predriver
outn
outp
latn1
latn3
latn2latn2
latn1
latn3
GND
GND
GND
GND
GND
GND
offb1
offb3
offb2
off
offb1
offb3
offb2
cset<0:3>
cset<0:3>
cset<0:3> latn1
latn3
latn2latp2
latp1
latp3
offb1
offb3
offb2
in
off = HIGH → outp = LOW & outn = LOW
Filip Tavernier - CERN 7
Simulation of the new SLVS TX• Simulation of the TX in the bi-directional cell• Simulation of RC-extracted netlists• Simulation in 3 corners:
typical: VDD = 1.2 V (1.5 V) / T = 27° C / TT modelsslow: VDD = 1.1 V (1.4 V) / T = 100° C / SS modelsfast: VDD = 1.35 V (1.65 V) / T = -30° C / FF models
• Simulation with the ‘nominal’ current setting (2 mA)• Input signal: 27-1 PRBS @ 640 Mbit/s• Off-chip termination resistor of 100 Ω• Package modeled by 1 nH bondwire inductors and 1 pF
off-chip parasitic capacitance
TX
RX
Filip Tavernier - CERN 8
Simulation of the SLVS TX @ VDD = 1.2 V
current [mA] / power [mW]:• typical: 3.31 / 3.97• slow: 2.73 / 3.00• fast: 4.13 / 5.58
Filip Tavernier - CERN 9
Simulation of the SLVS TX @ VDD = 1.5 V
current [mA] / power [mW]:• typical: 4.01 / 6.02• slow: 3.41 / 4.77• fast: 4.93 / 8.13
Filip Tavernier - CERN 10
SLVS TX layout
Filip Tavernier - CERN 11
SLVS and LVDS signals for the RX
single-ended input signal levels when terminated with a differential 100 Ω resistor:
→ RX termination network needs nMOS (SLVS) and pMOS switch (LVDS)
time
volt
age
[V
]
1.2
0.2
LVDS
SLVS
0.4 V
0.2 V
term
termb
50 Ω 50 Ω
→ 4 mA in 100 Ω
→ 2 mA in 100 Ω
Filip Tavernier - CERN 12
Amplifier of the SLVS/LVDS RX
inverter buffer
outinn
inn
inp
inp
biasn
biasp
input pair for SLVS(off for LVDS)
input pair for LVDS(off for SLVS)
reduce sensitivityof the current wrt
variation of VDD
Filip Tavernier - CERN 13
Biasing network of the SLVS/LVDS RX
biasn biasp
M1 M2
M3M4
M5
(W/L)pk(W/L)p
(W/L)n (W/L)n
R
• current in the 2 branches is equal and completely determined by: (W/L)p, k and R:
• M5 is a start-up device to force that biasn ≠ 0 V and biasp ≠ VDD: → Vth,1 + |Vth,2| + Vth,5 < VDD,min = 1.1 V
→ Vgs,1 + |Vgs,2| + Vth,5 > VDD,max = 1.65 V
2
2
11
12
kRLWC
Ipoxp
Filip Tavernier - CERN 14
• Simulation of the RX in the bi-directional cell• Simulation of RC-extracted netlists• Simulation in 3 corners:
typical: VDD = 1.2 V (1.5 V) / T = 27° C / TT modelsslow: VDD = 1.1 V (1.4 V) / T = 100° C / SS modelsfast: VDD = 1.35 V (1.65 V) / T = -30° C / FF models
• Simulation with the on-chip termination network activated
• Input signal: 27-1 PRBS @ 640 Mbit/s• Package modeled by 1 nH bondwire inductors and 1 pF
off-chip parasitic capacitance
Simulation of the new SLVS/LVDS RX
TX
RX
Filip Tavernier - CERN 15
Simulation of the RX @ VDD = 1.2 V with SLVS input signals
current [µA] / power [µW]:• typical: 320 / 384• slow: 310 / 341• fast: 298 / 402
Filip Tavernier - CERN 16
Simulation of the RX @ VDD = 1.5 V with SLVS input signals
current [µA] / power [µW]:• typical: 391 / 587• slow: 439 / 615• fast: 390 / 644
Filip Tavernier - CERN 17
Simulation of the RX @ VDD = 1.5 V with LVDS input signals
current [µA] / power [µW]:• typical: 453 / 680• slow: 474 / 664• fast: 481 / 794
Filip Tavernier - CERN 18
Input CM range of the RX amplifier
• In theory, the RX amplifier has a rail-to-rail CM input range thanks to the input stage with nMOS and pMOS transistors.
• In reality, the voltage gain changes significantly with varying CM input voltage because the input transistors go out of saturation at ‘extreme’ CM voltages, as such reducing the gain of the amplifier.
• Note that the correct operation of the RX amplifier relies on the clipping of the signal at the input of the inverter (see slide 12) so that it can make a reliable decision. This means that the amplifier should not work in its linear region.
• Therefore, the effective CM input range varies with the input signal amplitude (a larger signal can work over a larger CM input range), or alternatively, the minimal signal amplitude depends on the CM input voltage (a smaller signal can be used at the ‘optimal’ CM input voltage than at the extremes).
Filip Tavernier - CERN 19
Input range of the RX @ VDD = 1.2 V for large signals in the typical corner
→ typical corner CM input range @ VDD = 1.2 V for ‘large’ signals : 0 V – 1 V
Filip Tavernier - CERN 20
Input range of the RX @ VDD = 1.2 V for small signals in the typical corner
→ typical corner CM input range @ VDD = 1.2 V for ‘small’ signals : 0.1 V – 0.9 V
Filip Tavernier - CERN 21
Input range of the RX @ VDD = 1.5 V for large signals in the typical corner
→ typical corner CM input range @ VDD = 1.5 V for ‘large’ signals : 0 V – 1.3 V
Filip Tavernier - CERN 22
Input range of the RX @ VDD = 1.5 V for small signals in the typical corner
→ typical corner CM input range @ VDD = 1.5 V for ‘small’ signals : 0.1 V – 1.2 V
Filip Tavernier - CERN 23
Input range of the RX @ VDD = 1.2 V for large signals in the slow corner
→ slow corner CM input range @ VDD = 1.2 V for ‘large’ signals : 0.1 V – 0.9 V
Filip Tavernier - CERN 24
Input range of the RX @ VDD = 1.2 V for small signals in the slow corner
offset frominverter threshold
→ slow corner CM input range @ VDD = 1.2 V for ‘small’ signals : 0.2 V – 0.8 V
Filip Tavernier - CERN 25
Input range of the RX @ VDD = 1.5 V for large signals in the slow corner
→ slow corner CM input range @ VDD = 1.5 V for ‘large’ signals : 0 V – 1.2 V
Filip Tavernier - CERN 26
Input range of the RX @ VDD = 1.5 V for small signals in the slow corner
→ slow corner CM input range @ VDD = 1.5 V for ‘small’ signals : 0.2 V – 1 V
Filip Tavernier - CERN 27
Input range of the RX @ VDD = 1.2 V for large signals in the fast corner
→ fast corner CM input range @ VDD = 1.2 V for ‘large’ signals : 0 V – 1.2 V
Filip Tavernier - CERN 28
Input range of the RX @ VDD = 1.2 V for small signals in the fast corner
→ fast corner CM input range @ VDD = 1.2 V for ‘small’ signals : 0 V – 1.1 V
Filip Tavernier - CERN 29
Input range of the RX @ VDD = 1.5 V for large signals in the fast corner
→ fast corner CM input range @ VDD = 1.5 V for ‘large’ signals : 0 V – 1.5 V
Filip Tavernier - CERN 30
Input range of the RX @ VDD = 1.5 V for small signals in the fast corner
→ fast corner CM input range @ VDD = 1.5 V for ‘small’ signals : 0.1 V – 1.5 V
Filip Tavernier - CERN 31
SLVS/LVDS RX layout