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The Router SC 504 Project Gardar Hauksson Allen Liu.

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The Router SC 504 Project Gardar Hauksson Allen Liu
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Page 1: The Router SC 504 Project Gardar Hauksson Allen Liu.

The Router

SC 504 Project

Gardar Hauksson

Allen Liu

Page 2: The Router SC 504 Project Gardar Hauksson Allen Liu.

Overview

Design principals, requirements and constraints

The Router – quick introduction The iSLIP algorithm Packet generation Underlying datastructures The program interface The Router – revisited

Page 3: The Router SC 504 Project Gardar Hauksson Allen Liu.

Design principles, requirements and constraints

Project was open-ended, routing is a rather general term. You may see more resemblence to a

network switch than to a network router in this project.

Main objectives can be split into two: Creating packets and inserting them into

input queues Routing the packets from input queues to

output queues as efficiently as possible

Page 4: The Router SC 504 Project Gardar Hauksson Allen Liu.

Program parameters

Input/output queues (q) – same number of input/output queues

Number of packets per queue (n) Maximum number of packets routed per

second (p) – upper bound is q (reasons shown later)

Length of routing timeslot Packet generation rate Probability distribution of generated

packets.

Page 5: The Router SC 504 Project Gardar Hauksson Allen Liu.

A quick peak

The program flow: A thread generates packets to a random

input queue. Each packet has a destination queue to go to. This thread can generate up to 1000 packets per second.

Once in every timeslot (example timeslot is one second) The Router goes through all input queues and moves packets from their input queues to their destination queues.

A short demo of the program might make things more clear...

Page 6: The Router SC 504 Project Gardar Hauksson Allen Liu.

Crossbar switch

Each input queue can send one packet per timeslot. Each output queue can receive one packet per second.

Our job is to make connections between input and output queues in a clever way.

Source: Wikipedia

Page 7: The Router SC 504 Project Gardar Hauksson Allen Liu.

Crossbar switch

Number of packets routed per timeslot can never exceed the number of input/output queues. (p <= q)

If number of packets routed per each timeslot reaches p, then we have 100% efficiency.

Packets are sent away from the output queues at a rate of 1 per queue per timeslot (total of q packets per timeslot)

Why is this hard to achieve??

Page 8: The Router SC 504 Project Gardar Hauksson Allen Liu.

Routing algorithm

In FIFO we just look at first packet of each queue and pass it on to the destination.

If the destination is already occupied in this timeslot we have to cancel any subsequent packets going to the same destination in this timeslot.

It has been shown1 that this yields a

efficiency.2 2 58.6%

1Nick McKeown: iSLIP: A Scheduling Algorithm for Input-Queued Switches

Page 9: The Router SC 504 Project Gardar Hauksson Allen Liu.

Head of Line blocking

This problem with FIFO queueing is called “Head of Line blocking” where the first packet in the queue is “Head of Line” or HOL.

Page 10: The Router SC 504 Project Gardar Hauksson Allen Liu.

HOL blocking in FIFO queues

1->11->31->1...

2->42->1...

3->13->3...

4->24->44->4...

2->2

3->3

1

2

3

4

Input queues Output queues

Only 3 packets routed when capacity is 4!In the long run, efficiency is only 58.6%

1

2

3

4

HOL

These packets could go to output queue 3 in this routing slot but since the HOL packet is blocking the queue, they just sit around andthe queue doesn’t utilize it’s opportunity to send packets, even though it has packets tosend and an idle output queue to receive them!

Page 11: The Router SC 504 Project Gardar Hauksson Allen Liu.

Virtual Output Queues (VOQ)

This HOL blocking is not just a fact of life we have to accept. Being the engineers we are we can’t sleep at nights when this is the case!

That’s why someone invented Virtual Output Queues (VOQ).

1Nick McKeown: iSLIP: A Scheduling Algorithm for Input-Queued Switches

Page 12: The Router SC 504 Project Gardar Hauksson Allen Liu.

Virtual Output Queues (VOQ) VOQ is a fundamental method in iSLIP. Instead of just looking at the first packet in

each input queue, we create virtual output queues in each input queue.

Each input queue has one virtual output queue for each “actual” output queue.

Thus, if there are q input queues and q output queues, there are a total of q2 virtual output queues.

Therefore iSLIP is not feasible for very high number of input/output queues.

Page 13: The Router SC 504 Project Gardar Hauksson Allen Liu.

Virtual Output Queues (VOQ)

1->11->31->1

2->42->1

3->13->2

4->24->44->4

2->3

3->2

Input queues (FIFO)

1

2

3

4

HOL

These input queues...

4

1

3

1

34

12

34

2

3

2

2

4

1

HOLInput queues (VOQ)

1

2

3

4

...become like this

Page 14: The Router SC 504 Project Gardar Hauksson Allen Liu.

Virtual Output Queues

Eliminate HOL blocking Perform better when queue size is

greater (the higher n the better) Simulations showed that n=50 was a

good number for 100 queues. So have we solved all the problems in

the world by using VOQ? No!

Page 15: The Router SC 504 Project Gardar Hauksson Allen Liu.

iSLIP

If two input queues both have packets for the same output queue, which one gets to send the packet?

iSLIP tackles this problem by using a Round-Robin scheme that is fair and efficient.

Page 16: The Router SC 504 Project Gardar Hauksson Allen Liu.

iSLIP

iSLIP has three main steps which are iterated: REQUEST: Input queues send a request for every

HOL packet to a corresponding queue GRANT: Output queues accept the highest priority

request it gets and drops others. Priority is determined from which queue number is next in a fixed, round-robin schedule from a pointer gi. gi is incremented each time an output queue receives an ACCEPT from step 3.

ACCEPT: Each input now looks at its grants and accepts the one that appears next in a fixed, round-robin schedule from a pointer ai. ai is updated accordingly.

Page 17: The Router SC 504 Project Gardar Hauksson Allen Liu.

iSLIP

4

1

3

1

34

12

34

2

3

2

2

4

1

HOLInput queues

1

2

3

4

1

2

3

4

Output queues

REQUEST

g1=1

g2=1

g3=1

g4=1

a1=1

a2=1

a3=1

a4=1

GRANTACCEPT

a1=2

a2=1

a3=4

g1=2

g3=4

g4=3

UPDATE POINTERS!

Page 18: The Router SC 504 Project Gardar Hauksson Allen Liu.

iSLIP

Sharp individuals might have noticed that we actually just routed 3 packets out of 4 in last turn. Our observations showed that first iteration usually gave around 50-60% efficiency.

To increase efficiency the iSLIP steps are iterated lg(q) times (7 times for 100 queues). This is the time it takes for iSLIP to converge.

The ai and gi pointers are not updated until after all iterations have finished. This is to avoid starvation but won’t be discussed in detail here.

Page 19: The Router SC 504 Project Gardar Hauksson Allen Liu.

Packet generation machine

Simulating network traffic is not a trivial task. Each protocol has its own characteristics and each network has its own characteristics.

We decided to simulate two traffic patterns: Uniform distribution Poisson distribution

The probability of a packet having a specific input/output queue is uniform.

The time between generated packets is either uniformally or Poisson distributed.

Page 20: The Router SC 504 Project Gardar Hauksson Allen Liu.

Distributions

Uniform probability mass function(on [a,b])

Poisson probability mass function

Source: Wikipedia

Page 21: The Router SC 504 Project Gardar Hauksson Allen Liu.

Underlying datastructures

The input/output queues are stored in an array with length q.

Each output queue is a doubly linked list. If head/tail pointers both point to null the queue is empty.

Each input queue holds an array of VOQ's. Each VOQ is a doubly linked list.

Queue size is maintained in a number that is updated every time we insert/remove from the queue.

Page 22: The Router SC 504 Project Gardar Hauksson Allen Liu.

Datastructure analysis

Queues Insert into (tail of) queue: O(1) Delete from (head of) queue: O(1) Get size of queue: O(1)

Router Search for REQUESTS: O(q2) Search for GRANTS: O(q) (average case) –

O(q2) worst case Search for ACCEPTS: O(q) (average case) –

O(q2) worst case => Routing: O(q2*lg(q)) – lg(q) is due to iterations

Page 23: The Router SC 504 Project Gardar Hauksson Allen Liu.

User interface

The next few slides will explain the user interface

Page 24: The Router SC 504 Project Gardar Hauksson Allen Liu.

# of queues (q): the number of input/output queues that the router has. For example, the figure above has 100 input/output queues.

# of packets per queue (n): the number of packets capacity of a queue. Packets will be dropped if they are being inserted into a full queue.

# of packets routed per timeslot (p): the number of packets the router can route per timeslot.

Average time between generated packets (ms): the average time between packet generations.

Length of timeslot (ms): the length of routing timeslot. For example, a value 1000 here means that each timeslot has duration of 1000ms (1 sec).

Page 25: The Router SC 504 Project Gardar Hauksson Allen Liu.

Green: low load

Yellow: medium load

Red: high load

Page 26: The Router SC 504 Project Gardar Hauksson Allen Liu.

Dropped output packets: the total number of packets that have been dropped while being moved from input queues to output queues during the entire routing process. Due to the structure of the program (it does not try to insert packets into full output queues) this value should always be 0.

Dropped input packets: the total number of packets that have been dropped when being inserted into the router during the entire routing process.

No of routed packets: the total number of packets that have been routed from input queues to output queues during the entire routing process.

Average routing time (ms): the average routing time it has taken for a packet to journey through a router, i.e. the time elapsed since it entered the router until it exited the router.

No of packets created: the total number of packets that have been created so far by the packet generation machine.

Page 27: The Router SC 504 Project Gardar Hauksson Allen Liu.

Packets/sec: the average number of input packets per second.

Average packets routed: the efficiency of how packets are being routed from the input queues through the router. Our goal is to get this number as close to 100% as possible. For example, a 90% indicates that 90% of the routing capacity is being utilized.

Average packets sent: the efficiency of how packets are being sent out by the output queues.

Packets routed in last turn: the number of packets that were routed during the execution of the routing.

Packets sent in last turn: the number of packets consumed at the output queues last time we routed. To achieve full throughput this number should be equal to the number of queues.

Page 28: The Router SC 504 Project Gardar Hauksson Allen Liu.

Runner

PacketGeneratorLoggerGUIRouter

Basic Project Structure

Page 29: The Router SC 504 Project Gardar Hauksson Allen Liu.

Simulation Result

The following parameters are used during the simulation: number of queues (q): 100 number of packets per queue (n): 50 number of packets routed per timeslot (p): 100 Timeslot: 1000 Simulation time: 3600 Distribution type: Poisson

Interval rate (ms) (#packets created per second)

7 (142) 8 (125) 9 (111) 10 (100) 11 (90) 12 (83)

# packet generated 446073 407736 357660 334523 299632 277012

dropped packets from I.Q 92326 54008 9302 210 0 0

packet/sec 123.908 113.251 99.349 92.922 83.228 76.947

average routing time 1302 1236 1125 1016 1000 1000

avg packet routed 97.31% 97.24% 96.01% 92.58% 83.41% 77.17%

avg packet sent 97.28% 97.22% 95.98% 92.56% 83.38% 77.15%

Page 30: The Router SC 504 Project Gardar Hauksson Allen Liu.

70.00%

75.00%

80.00%

85.00%

90.00%

95.00%

100.00%

80 90 100 110 120 130 140 150

Packet Generation Rate (per sec)

Thro

ughp

ut

Page 31: The Router SC 504 Project Gardar Hauksson Allen Liu.

What we did

We created a GUI We implemented an algorithm that is much

better than FIFO (100% for iSLIP against 58.6% for FIFO)

Our program does write to output log as well

The program can be run with parameters, and without GUI which is more suitable for simulations

Code and project details will be on course webpage today

Page 32: The Router SC 504 Project Gardar Hauksson Allen Liu.

Features we didn't write in this version but will write into the next one so our clients will be forced to upgrade and pay more

QoS (priority queueing). Can be implemented by creating k priority queues inside each VOQ (raises the total number of queues to q2*k).

Use real-world ip addresses instead of simple numbers.

Implement routing tables from real life routers.

Make the GUI more elaborate.

Page 33: The Router SC 504 Project Gardar Hauksson Allen Liu.

References

McKeown, Nick (1999). "iSLIP: A Scheduling Algorithm for Input-Queued Switches".

IEEE Transactions on Networking, Vol 7, No.2, April 1999 (http://tiny-tera.stanford.edu/~nickm/papers/ToN_April_99.pdf)

Gospodinov, Mitko and Gospodinoa, Evgeniya (2004). “Analysis of iSLIP scheduling algorithm for input-queuing switches”.

(http://ecet.ecs.ru.acad.bg/cst04/Docs/sIIIB/316.pdf)

Sun Microsystems. Java 2 Platform Standard Edition 5.0 API Specification

(http://java.sun.com/j2se/1.5.0/docs/api/overview-summary.html)

Wikipedia contributors. "Poisson distribution". Wikipedia, The Free Encyclopedia, 26 November 2006, 12:42 UTC

(http://en.wikipedia.org/w/index.php?title=Poisson_distribution&oldid=90210203) [accessed 29 November 2006]

Page 34: The Router SC 504 Project Gardar Hauksson Allen Liu.

Questions?

Page 35: The Router SC 504 Project Gardar Hauksson Allen Liu.

Thank you!


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