The status of amplifier circuit for HPD

Student, Tokyo Metropolitan Univ. M1, Takayuki Seki

Advisor, KEK, Hirokazu Ikeda

/designing of amplifier for HPD using IC

/shot noise power (main noise) Tm∝

/peaking time of ready-made goods are too long (Tm=1~2 [μs])

/ to reduce the noise ,we must design circuit with shorter peaking time

/ we have gotten Tm = 150 [ns] using T-Spice simulator

・ purpose and point

・detail

/ dynamic Range : 2000~20000 [e]

/ threshold : 600 [e]

/ channel : 18 [channel/chip]

/ readout method : Serial Digital output

/ noise : 250 [e]

/ S/N : 8 (at 2000[e])

/ gain : 50 [mV/photon]

/ peaking time : 150 [ns]

・ characteristic

/ possible to change the gain (1~16 times)

/ using shift register, a signal is maintained (longest time 4 [μs])

/ a threshold can be adjusted (highest value 3.3 [V])

/ the variation between channels is suppressed by the offset circuit

/ and etc….

Fig.1

Fig.2

Fig.3

Fig.4

a schedule

• 2002/09/02 meeting with DIGIAN Technology

• 2002/11/05 a deadline of IC design (include layout)

• 2003/02/07 delivery of IC chip

• 2003/02/07~ test of IC

/size : 4.93×4.93 [m㎡ ]

/pin : 111

/package : QFP144

/voltage : 3.3 [V]

/layer : PolySi×2, metal×3

・ chip /produced by ROHM co.