B. TECH PROJECT REPORT on AC-DC HIGH POWER FACTOR BOOST CONVERTER SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE AWARD OF DEGREE OF BACHELOR OF TECHNOLOGY IN ELECTRICAL AND ELECTRONICS ENGINEERING Submitted By RATHIJEET BHAVE(BT07EEE023) DEBASHISH GHADAI(BT07EEE026) KUNAL DESHMUKH(BT07EEE027) S.GANESH(BT07EEE030) UNDER THE GUIDANCE OF Dr.Mrs.M.A.CHOUDHARI Professor,Department of Electrical Engineering,VNIT, Nagpur VISVESVARAYA NATIONAL INSTITUTE OF TECHNOLOGY, NAGPUR 1
Transcript
B. TECH PROJECT REPORT on
AC-DC HIGH POWER FACTOR BOOST CONVERTER
SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE AWARD OFDEGREE OF
BACHELOR OF TECHNOLOGY IN ELECTRICAL ANDELECTRONICS ENGINEERING
Submitted By
RATHIJEET BHAVE(BT07EEE023)
DEBASHISH GHADAI(BT07EEE026)
KUNAL DESHMUKH(BT07EEE027)
S.GANESH(BT07EEE030)
UNDER THE GUIDANCE OF
Dr.Mrs.M.A.CHOUDHARI
Professor,Department of Electrical Engineering,VNIT, Nagpur
VISVESVARAYA NATIONAL INSTITUTE OF TECHNOLOGY, NAGPUR
2010– 2011
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CERTIFICATE
This is to certify that the project work entitled “AC-DC HIGH POWER FACTOR BOOST CONVERTER USING DSP”, is a bonafide work done by Mr. RATHIJEET BHAVE, Mr.DEBASHISH GHADAI,Mr. KUNAL DESHMUKH, Mr.S.GANESH
in the Department of Electrical Engineering, Visvesvaraya National Institute ofTechnology, Nagpur, in partial fulfillment of the requirements for the award of
Bachelor Of Technology in “Electrical and Electronics Engineering”.
Dr. Mrs.M.A.CHOUDHARI Dr.SURYAVANSHI,Mentor and Coordinator, Head of Department,
Department of Electrical Engg, Department of Electrical Engg,VNIT Nagpur VNIT Nagpur
Department of Electrical and Electronics EngineeringVisvesvaraya National Institute of Technology
2010-11
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DECLARATION
This is to declare that the project entitled “AC-DC HIGH POWER FACTOR BOOST CONVERTER” is a bonafide work performed by us, the below
mentioned students.The project is being submitted and forwarded in partial fulfillment for the degree
of BACHELOR OF TECHNOLOGY in ELECTRICAL and ELECTRONICSENGINEERING from the esteemed VISVESVARAYA INSTITUTE OF
TECHNOLOGY, NAGPUR.To the best of our knowledge this project report has not been submitted to any other
Someone has rightly said,” there is no I in the word team”. Hence completing atask is never one man’s effort; rather it is always a result of invaluable contributions of a number of individuals in a direct or indirect manner.
We take this opportunity to acknowledge with deep sense of gratitude and unfathomable obligation to our project guide Dr. M.A.CHOUDHARI, professor, department of electrical and electronics engineering, VNIT Nagpur for his invaluable guidance, constant motivation, profound advice and persistence encouragement that has led to completion of this project.
It is beyond words to express our gratitude for his able guidance and spontaneous solutions of the problems that cropped up during the course of work. We are thankful to him for providing each and every facility, which are required for the successful completion of the project.
We also take this opportunity to pay our sincere thanks to Dr. SURYAVANSHI,HOD, department of electrical and electronics engineering for providing requisitefacilities of the department as needed to complete the project. We would also like to thank all the teaching and non teaching staff for supporting us.
RATHIJEET BHAVE(BT07EEE023)
DEBASHISH GHADAI(BT07EEE026)
KUNAL DESHMUKH(BT07EEE027)
S.GANESH(BT07EEE030)
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Introduction
The technology associated with efficient control, conditioning and conversion of electrical power
or electrical energy by static devices from the available electrical input power to desired output
electrical power to achieve high efficiency, low losses and better stability and reliability is called
as power electronic converters.
Power converters are the need of the day, may it be process control automation,
telecommunication, energy conservation or utility related applications. All kinds of power
converters incorporate control unit, which delivers the firing pulse judiciously to the power
semiconductor devices and regulates or conditions the load voltage to meet the desired
requirements. There are varieties of options available in the market to design the control unit. In
present era where electronic market is very competitive, it becomes a challenging task for
designer to design the control unit because the designer has to select the design or components of
the circuitry, which delivers the best performance.
Conventionally, power converter is controlled by monolithic IC which included the functions of
oscillator, error amplifier and a pulse width modulator (PWM).To stabilize the control loop a
compensation network should be connected to the error amplifier. This compensation network
affects the stability of the converter. The performance of the converter is highly dependent on the
network which consists of resistors and capacitors. However, these components are often
influenced by external environmental factors such as ageing and temperature etc. Till date,
Micro-controllers were popular choice for such needs. The advantages of such digital controllers
are
i) They are less dependent on accuracy and stability of active and passive components
ii) They can be configured by software.
iii) It offers the possibility of implementing sophisticated control laws, taking care of
nonlinearities, parameter variations or construction tolerances by means of self-analysis
and auto-tuning strategies, which are otherwise very difficult or impossible to implement
analogically.
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Mainly microcontrollers and microprocessors were used for such application. However, now
DSP controllers are becoming more popular compared to microcontrollers.DSP based digital
control allows for the implementation of more functional control schemes, standard control
hardware design for multiple platforms and flexibility of quick design modifications to meet
specific customer needs. Digital controllers are less susceptible to aging and environmental
variations and have better noise immunity.
Modern 32-bit DSP controllers with processor speed up to 150MHz and enhanced peripherals
such as, 12-bit A/D converter with conversion speed up to 80nSec, 32x32-bit multiplier, 32-bit
timers and real-time code debugging capability gives the power supply designers all the benefits
of digital control and allows implementation of high bandwidth, high frequency power supplies
without sacrificing performance. The extra computing power of such processors also allows
implementation of sophisticated nonlinear control algorithms, integrate multiple converter
control into the same processor and optimize the total system cost.
The advent of programmable digital signal processors (DSPs) in recent years is creating thriving
opportunities in power electronics. The special architecture and high performance of DSPs make
it possible to implement a wide variety of control and measurement algorithms at a high
sampling rate and reasonable cost. Power electronics systems are typically a complex
combination of linear, nonlinear and switching elements. High-frequency converters add another
dimension of complexity because of their fast dynamics. Real-time power electronics systems,
therefore, demand the use of high-speed data-acquisition and control. High performance DSPs
meet the processing requirements imposed by such systems.
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Power circuit
The block diagram of the power circuit is
Figure 2.1
Rectifier and boost filter
In most power electronics application we use 50 Hz ac sine wave as input and we need dc output
at the other end. Rectifiers with diode are used to obtain uncontrolled dc voltage. The power flow
can be from only ac side to dc side. The dc output should be as ripple free as possible. Hence a
capacitor is connected on the dc side as a filter. Here we use a single phase full wave rectifier for
our project.
There are two types of single-phase full-wave rectifier
i) Full-wave rectifiers with center-tapped transformer
ii) Bridge Rectifiers.
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A full-wave rectifier with a center-tapped transformer has two diodes, with each diode, together
with the associated half of the transformer, acts as a half-wave rectifier. The outputs of the two
half-wave rectifiers are combined to produce full-wave rectification in the load
Figure 2.2
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Figure 2.3
As far as the transformer is concerned, the dc currents of the two half-wave rectifiers are equal
and opposite, such that there is no dc current for creating a transformer core saturation problem.
Employing four diodes (D1, D2, D3 &D4) instead of two, a bridge rectifier can provide full-
wave rectification without using a center-tapped transformer.
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Figure 2.4
Figure 2.5Working of bridge rectifier
During the positive half-cycle of the transformer secondary voltage, the current flows to the load through diodes D1 and D2. During the negative half cycle, D3 and D4 conduct. During positive cycle, D1 and D2 are in conduction mode and D3 and D4 are in rejection mode and vice versa during the negative cycle. A large filter capacitor can be connected on the dc side for reducing the ripple content.According to the necessities of the project and the advantages we chose Bridge rectifier for
rectification of the input signal.
Buck converter
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Figure 2.7The step-down dc-dc converter, commonly known as a buck converter, is shown in the above
figure. It consists of dc input voltage source Vs, controlled switch S, diode D, filter inductor L,
filter capacitor C, and load resistance R. Typical waveforms in the converter are shown below,
under the assumption that the inductor current is always positive. The state of the converter in
which the inductor current is never zero for any period of time is called the continuous
conduction mode (CCM). It can be seen from the circuit that when the switch S is commanded to
the on state, the diode D is reverse-biased. When the switch S is off, the diode conducts to
support an uninterrupted current in the inductor.
The dc-dc converters can operate in two distinct modes with respect to the inductor current Il.
Figure depicts the CCM in which the inductor current is always greater than zero. When the
average value of the output current is low (high R) and/or the switching frequency f is low, the
converter may enter the discontinuous conduction mode (DCM). In the DCM, the inductor
current is zero during a portion of the switching period. The CCM is preferred for high efficiency
and good utilization of semiconductor switches and passive components. The DCM may be used
in applications with special control requirements because the dynamic order of the converter is
reduced (the energy stored in the inductor is zero at the beginning and at the end of each
switching period). It is uncommon to mix these two operating modes because of different control
algorithms
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Figure 2.8
Boost converter
It is also called as a step up converter. Its main application is in regulated dc power supply and
the regenerative braking of dc motors. Here in our project we use it for regulated dc supply to the
resonant converter. The output voltage will be greater than that of the input voltage. The circuit
diagram of a boost converter is shown below.
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Figure 2.9
Figure 2.10
When the switch is on, the diode is reverse biased, thus isolating the output stage. The input
supplies energy to the inductor. When the switch is off, the output stage receives energy from the
inductor as well as the input. There are two modes of conduction in a boost converter namely
continuous and discontinuous. The current supplied to the output RC circuit is discontinuous.
Thus a large filter capacitor is required to limit the output voltage ripple. The filter capacitor
provides output dc current to the load when the diode D is off.
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Resonant converter
Advances in power electronics in the last few decades have led not only to improvements in
power devices, but also to new concepts in converter topologies and control. In the 1970s,
conventional pulse width modulation (PWM) power converters were operated in switched mode.
Power switches have to cut off the load current within the turn-on and turn-off times under the
hard switching conditions. Hard switching refers to the stressful switching behavior of the power
electronic devices. These devices also have high power losses that increase linearly with the
switching frequency of the PWM. Another major drawback of the switch mode is the EMI
produced due to large di/dt and dv/dt caused by switched mode operation.
The minimization of the switching loss is possible by reducing the time interval when both
voltage and current are not close to zero. Different gate-driver techniques account for a
controlled slope of voltage and current transitions. There are however limits to this minimization.
The transition of current cannot be too steep as it would produce large voltage spikes in all the
circuit parasitic inductances. The voltage slope is generally limited within the semiconductor
device technology and the resulting parasitic capacitances have finite values.
The resonant converters are a combination of converter topologies and switching strategies that
result in zero voltage and or zero current switching.
Prior to the availability of fully controllable power switches, thyristors was the major power
devices used in power electronic circuits. Each thyristor requires a commutation circuit, which
usually consists of an LC resonant circuit, for forcing the current to zero in the turn-off process.
This mechanism is in fact a type of zero-current turn-off process. With recent advancements in
semiconductor technology, the voltage and current handling capability and the switching speed
of fully controllable switches have improved significantly. A circuit element as simple as a light
switch reminds us that the extreme requirements in power electronics are not especially novel.
Ideally, when a switch is on, it has zero voltage drop and will carry any current imposed on it.
When a switch is off, it blocks the flow of current regardless of the voltage across it. Device
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power, the product of the switch voltage and current, is identically zero at all times. The switch
controls energy flow with no loss. In addition, reliability is also high.
Household light switches perform over decades of use and perhaps 100,000 operations. Of
course, a mechanical light switch does not meet all practical needs. A switch in a power supply
often must function 100,000 times each second. Since even the best mechanical switch will not
last beyond a few million cycles, semiconductor switches (without this limitation) are the devices
of choice in power converters.
A circuit built from ideal switches will be lossless. As a result, switches are the main components
of power converters, and many people equate power electronics with the study of switching
power converters. Magnetic transformers and lossless storage elements such as capacitors and
inductors are also valid candidates for use in power converters. The complete concept illustrates
a power electronic system. Such a system consists of an energy source, an electrical load, a
power electronic circuit, and control functions. The power electronic circuit contains switches,
lossless energy storage elements, and magnetic transformers. The controls take information from
the source, load, and designer and then determine how the switches operate to achieve the
desired conversion. The controls are usually built up with conventional low-power analog and
digital electronics.
In many high-power applications, controllable switches such as GTOs and IGBTs have replaced
thyristors. However, the use of a resonant circuit for achieving zero current-switching (ZCS)
and/or zero-voltage-switching (ZVS) has also emerged as a new technology for power converters
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Figure 2.11
ZC Resonant Switch
In a ZC resonant switch, an inductor Lr is connected in series with a power switch S in order to
achieve zero-current-switching (ZCS). If the switch S is a unidirectional switch, the switch
current is allowed to resonate in the positive half-cycle only.
Figure 2.12The resonant switch is said to operate in half-wave mode. If a diode is connected in anti-parallel
with the unidirectional switch, the switch current can flow in both directions. In this case, the
resonant switch can operate in full-wave mode. At turn-on, the switch current will rise slowly
from zero. It will then oscillate because of the resonance between Lr and Cr. Finally, the switch
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can be commutated at the next zero current duration. The objective of this type of switch is to
shape the switch current waveform during conduction time in order to create a zero-current
condition for the switch to turn off.
ZV Resonant Switch
In a ZV resonant switch, a capacitor Cr is connected in parallel with the switch S for achieving
zero-voltage-switching (ZVS).If the switch S is a unidirectional switch, the voltage across the
capacitor Cr can oscillate freely in both positive and negative half-cycle. Thus, the resonant
switch can operate in full-wave mode.
Figure 2.13If a diode is connected in anti-parallel with the unidirectional switch, the resonant capacitor
voltage is clamped by the diode to zero during the negative half-cycle. The resonant switch will
then operate in half-wave mode. The objective of a
ZV switch is to use the resonant circuit to shape the switch voltage waveform during off time in
order to create a zero voltage condition for the switch to turn on
Quasi-Resonant ConvertersQuasi-resonant converters (QRCs) can be considered a hybrid of resonant and PWM converters.
The underlying principle is to replace the power switch in PWM converters with the resonant
switch. A large family of conventional converter
circuits can be transformed into their resonant converter counterparts. The switch current and/or
voltage waveforms are forced to oscillate in a quasi-sinusoidal manner, so that ZCS and/or ZVS
can be achieved. Both ZCS-QRCs and ZVS-QRCs have half-wave and full-wave modes of
operation.
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ZCS-QRCsA ZCS-QRC designed for half-wave operation is illustrated with a buck-type resonant converter.
It is formed by replacing the power switch in a conventional PWM buck converter with the ZC
resonant switch. The output filter inductor Lf is sufficiently large so that its current is
approximately constant. Prior to turning the switch on, the output current Io freewheels through
the output diode Df. The resonant capacitor voltage VCr equals zero. At t0, the switch is turned on
with ZCS. A quasi-sinusoidal current IS flows through Lr and Cr, the output filter, and the load.
Then S is softly commutated at t1 with ZCS again. During and after the gate pulse, the resonant
capacitor voltage VCr rises and then decays at a rate depending on the output current. Output
voltage regulation is achieved by controlling the switching frequency.
ZVS-QRCIn these converters, the resonant capacitor provides a zero voltage condition for the switch to
turn on and off. When the switch S is turned on, it carries output current
Io. The supply voltage Vi reverse-biases the diode Df . When the switch is zero-voltage (ZV)
turned off, the output current starts to flow through the resonant capacitor Cr. When the resonant
capacitor voltage VCr is equal to Vi, Df turns on. This starts the resonant stage. When VCr equals
zero, the anti-parallel diode turns on. The resonant capacitor is shorted and the source voltage is
applied to the resonant inductor Lr. The resonant inductor current I, Lr increase linearly until it
reaches Io. Then Df turns off. In order to achieve ZVS, S should be triggered during the time
when the anti-parallel diode conducts.
PWM v/s Resonant converters
In PWM output is controlled by regulated interruption of power flow from generator to
the load, whereas resonant technique processes power in sinusoidal form.
PWM is used for lower and moderate power applications whereas resonant can be used in
lower, moderate as well as higher power applications.
The chief advantage of resonant converters is reduced switching loss.
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Turn-on or turn-off transitions of semiconductor devices can occur at zero crossings of
tank voltage or current waveforms, thereby reducing or eliminating some of the switching
loss mechanisms.
Hence resonant converters can operate at higher switching frequencies than
comparable PWM converters.
Because the inverter switching can only occur at zero voltage duration, integral pulse
density modulation (IPDM) has to be adopted in the switching strategy.
Analysis of the resonant dc link converter can be simplified by considering that the inverter
system is highly inductive.
The link current Ix may vary with the changing load condition, but can be considered constant
during the short resonant cycle. If switch S is turned on when the inductor current is Il0, the
resonant dc link voltage can be expressed as Behavior because it dissipates some energy. In
practice, (Il ÿ Ix) has to be monitored when S is conducting. In addition, S can be turned on when
(Il ,ÿ Ix) is equal to a desired value
Although voltage clamp can be used to reduce the peak dc link voltage, the peak voltage value is
still higher than normal and the additional clamping circuit makes the control more complicated.
Integral pulse-density modulation has to be used
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The objective is to ensure that the dc link voltage can be resonated to zero voltage level in the
next cycle.
The pulsating dc link inverter has the following advantages:
Reduction of switching loss;
snubberless operation;
high switching frequency (>18 kHz)
operation becomes possible, leading to the reduction of acoustic noise in inverter
equipment;
reduction of heat sink requirements
Improvement of power density.
This approach has the following limitations:
The peak dc pulsating link voltage is higher than the nominal dc voltage value of a conventional
inverter. This implies that power devices and circuit components of higher voltage ratings must
be used.
This could be a serious drawback because power components of higher voltage ratings are not
only more expensive, but usually have inferior switching performance than their low-voltage
counterparts. Many well-established PWM techniques cannot be employed.
MOSFETS
We have used Mosfets in our project. MOSFET – is an acronym for Metal Oxide
Semiconductor Field Effect Transistor and it is the key component in high frequency, high
efficiency switching applications across the electronics industry. It might be surprising,
but FET technology was invented in 1930, some 20 years before the bipolar transistor. The first
signal level FET transistors were built in the late 1950’s while power MOSFETs have been
available from the mid 70’s. Today, millions of MOSFET transistors are integrated in modern
electronic components, from microprocessors, through “discrete” power transistors.
It is actually a transistor used for amplifying or switching electronic signals. The basic
principle of this kind of transistor was first proposed by Julius Edgar Lilienfeld in 1925.
In MOSFETs, a voltage on the oxide-insulated gate electrode can induce a conducting
channel between the two other contacts called source and drain. The channel can be of n-
type or p-type and is accordingly called an n MOSFET or a p MOSFET (also commonly nMOS,
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pMOS). It is by far the most common transistor in both digital and analog circuits, though
the bipolar junction transistor was at one time much more common.
The 'metal' in the name is now often a misnomer because the previously metal gate material is
now often a layer of polysilicon (polycrystalline silicon).Aluminium had been the gate material
until the mid 1970s, when polysilicon became dominant, due to its capability to form self-
aligned gates. Metallic gates are regaining popularity, since it is difficult to increase the speed of
operation of transistors without metal gates.
MOSFET TECHNOLOGY
The bipolar and the MOSFET transistors exploit the same operating principle. Fundamentally,
both type of transistors are charge controlled devices which means that their output current is
proportional to the charge established in the semiconductor by the control electrode. When these
devices are used switches, both must be driven from a low impedance source capable of sourcing
and sinking sufficient current to provide for fast insertion and extraction of the controlling
charge. From this point of view, the MOSFETs have to be driven just as “hard” during turn-on
and turn-off as a bipolar transistor to achieve comparable switching speeds. Theoretically, the
switching speeds of the bipolar and MOSFET devices are close to identical, determined by the
time required for the charge carriers to travel across the semiconductor region. Typical values in
power devices are approximately 20 to 200 seconds depending on the size of the device. The
popularity and proliferation of MOSFET technology for digital and power applications is driven
by two of their major advantages over the bipolar junction transistors. One of these benefits is
the ease of use of the MOSFET devices in high frequency switching applications. The MOSFET
transistors are simpler to drive because their control electrode is isolated from the current
conducting silicon, therefore a continuous ON current is not required. Once the MOSFET
transistors are turned-on, their drive current is practically zero. Also, the controlling charge and
accordingly the storage time in the MOSFET transistors is greatly reduced. This basically
2eliminates the design trade-off between on state voltage drop – which is inversely proportional
to excess control charge – and turn-off time. As a result, MOSFET technology promises to use
much simpler and more efficient drive circuits with significant economic benefits compared to
bipolar devices. Furthermore, it is important to highlight especially for power applications, that
MOSFETs have a resistive nature. The voltage drop across the drain source terminals of a
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MOSFET is a linear function of the current flowing in the semiconductor. This linear
relationship is characterized by the RDS(on) of the MOSFET and known as the on-resistance.
On-resistance is constant for a given gate-to-source voltage and temperature of the device. As
opposed to the -2.2mV/°C temperature coefficient of a p-n junction, the MOSFETs exhibit a
positive temperature coefficient of approximately 0.7%/°C to 1%/°C. This positive temperature
coefficient of the MOSFET makes it an ideal candidate for parallel operation in higher power
applications where using a single device would not be practical or possible. Due to the positive
TC of the channel resistance, parallel connected MOSFETs tend to share the current evenly
among themselves. This current sharing works automatically in MOSFETs since the positive TC
acts as a slow negative feedback system. The device carrying a higher current will heat up more
– don’t forget that the drain to source voltages are equal – and the higher temperature will
increase its RDS (on) value. The increasing resistance will cause the current to decrease,
therefore the temperature to drop. Eventually, equilibrium is reached where the parallel
connected devices carry similar current levels. Initial tolerance in RDS (on) values and different
junction to ambient thermal resistances can cause significant – up to 30% – error in current
distribution.
Advantages of Mosfets
1 .A big advantage of MOSFETs for digital switching is that the oxide layer between the gate
and the channel prevents DC current from flowing through the gate, further reducing power
consumption and giving very large input impedance.
2. The insulating oxide between the gate and channel effectively isolates a MOSFET in one logic
stage from earlier and later stages, which allows a single MOSFET output to drive a considerable
In a Resonant converter application, it is desired to obtain a constant output voltage in spite of
disturbances in input voltage and load current.
Generally, there are several implementation approaches for digital controllers today, which
include Microprocessor/DSP’s (Digital Signal Processors), FPGA (Field Programmed Gates
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Array) and Custom IC Design. The features of these approaches are compared in the following
list.
DSP
DSP chips can be reprogrammed;
The speed is generally slower than ICs
Implementation is exceedingly complex for the intended application;
DSP is costly over custom IC design;
High frequency power converters have to use high performance DSPs;
FPGA For FPGA design there is no physical manufacturing step, which results in very short
design time;
The processing is faster than a general purpose DSP;
FPGA can be programmed on site;
Custom made IC
Due to physical design consideration the typically better performance than FPGA
However it results in much longer design time than FPGA since there is a layout step
Custom IC design has lower price than FPGA and DSP.
In this thesis, the features that make DSPs effective computational engines for high frequency
switching power converters are presented. The design, implementation and testing of a DSP-
based system are illustrated, and the techniques and challenges in system design based on DSPs
are also addressed. DSP designs are optimized to handle real-time applications with high
bandwidth requirements
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Digital controllers offer a number of advantages in resonant power converters, and various
analysis, design and implementation aspects of this emerging area are receiving increasing
attention. A digital controller system is one or more silicon chips that combine ADC conversion
with control law processing, PWM and communication elements operating entirely (or mostly)
in digital mode.
From what has been demonstrated so far, it is clear that benefits will be derived from digital
control. With digital controller, compensator and protection features can be programmable,
reducing or eliminating the need for passive components for tuning. Digital controllers have
inherently lower sensitivity to process and parameter variations. Furthermore, digital controllers
allow the system to have communications and data management, such as storing data for
operational purposes. Also, it is possible to implement control schemes that are considered
impractical for analog realizations. For example, a what-if process can be made easily available
for a digital controller versus an analog controller. In transformer-isolated resonant converters,
digital signal transmission through isolation can be used to address limited bandwidth and/or
large gain variations associated with standard analog approaches. In general, more sophisticated
control methods can be applied to achieve improved dynamic responses.
Digital Signal Processing is carried out by mathematical operations. In comparison, word
processing and similar programs merely rearrange stored data. This means that computers
designed for business and other general applications are not optimized for algorithms such as
digital filtering and Fourier analysis. Digital Signal Processors are microprocessors specifically
designed to handle Digital Signal Processing tasks. These devices have seen tremendous growth
in the last decade, finding use in everything from cellular telephones to advanced scientific
instruments. In fact, hardware engineers use "DSP" to mean Digital Signal Processing, just as
algorithm developers use "DSP" to mean Digital Signal Processing.
In the 1960s it was predicted that artificial intelligence would revolutionize the way humans
interact with computers and other machines. It was believed that by the end of the century we
would have robots cleaning our houses, computers driving our cars, and voice interfaces
controlling the storage and retrieval of information. This hasn't happened; these abstract tasks are
far more complicated than expected, and very difficult to carry out with the step-by-step logic
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provided by digital computers.
However, the last forty years have shown that computers are extremely capable in two broad
areas,
(1) Data manipulation, such as word processing and database management
(2) Mathematical calculation, used in science, engineering
All microprocessors can perform both tasks; however, it is difficult (expensive) to make a device
that is optimized for both. There are technical tradeoffs in the hardware design, such as the size
of the instruction set and how interrupts are handled.
The execution speed of most DSP algorithms is limited almost completely by the number of
multiplications and additions required. Using the standard notation, the input signal is referred to
by x[ ] , while the output signal is denoted by y[ ] . Our task is to calculate the sample at location
n in the output signal, i.e., y[n]. For example, digital filters which are often used in signal
processing and control applications, are implemented using recursive difference equations of the
form:
. In equation form, y[n] is found by:
The equation states that any output can be computed as a weighted sum of the input at the
present time, past inputs and past outputs. Each step in this computation involves a multiplication
and addition. The multiply and accumulate (MAC) instruction in DSPs performs this in a single
instruction cycle. In contrast, in a typical fixed-point microprocessor, a “multiply” and “add”
typically executes in 15 to 20 machine cycles. MAC is the one instruction that most distinguishes
DSPs from other micros.
DSPs also significantly increase execution speed by performing multiple operations in parallel.
For instance, in the same instruction cycle that a MAC operation is being performed, a parallel
data move can be carried out. Thus, the special DSP instructions supplement the computational
speed of DSPs and make them ideal for high-performance real-time applications.
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Architecture of the Digital Signal Processor
One of the biggest bottlenecks in executing DSP algorithms is transferring information to and
from memory. This includes data, such as samples from the input signal and the filter
coefficients, as well as program instructions, the binary codes that go into the program
sequencer. For example, suppose we need to multiply two numbers that reside somewhere in
memory. To do this, we must fetch three binary values from memory, the numbers to be
multiplied, plus the program instruction describing what to do.
A Von Neumann architecture contains a single memory and a single bus for transferring data
into and out of the central processing unit (CPU). Multiplying two numbers requires at least three
clock cycles, one to transfer each of the three numbers over the bus from the memory to the
CPU. We don't count the time to transfer the result back to memory, because we assume that it
remains in the CPU for additional manipulation (such as the sum of products in an FIR filter).
The Von Neumann design is quite satisfactory when you are content to execute all of the
required tasks in serial. In fact, most computers today are of the Von Neumann design
.
Figure 3.1
Harvard architecture
This is named for the work done at Harvard University in the 1940s under the leadership of
Howard Aiken (1900-1973).Aiken insisted on separate memories for data and program
27
instructions, with separate buses for each. Since the buses operate independently, program
instructions and data can be fetched at the same time, improving the speed over the single bus
design. Most present day DSPs use this dual bus architecture
Figure 3.2
SUPER HARVARD ARCHITECTURE
However, DSP algorithms generally spend most of their execution time in loops, such as
instructions. This means that the same set of program instructions will continually pass from
program memory to the CPU.
The Super Harvard architecture takes advantage of this situation by including an instruction
cache in the CPU. This is a small memory that contains about 32 of the most recent program
instructions. The first time through a loop, the program instructions must be passed over the
program memory bus. This results in slower operation because of the conflict with the
coefficients that must also be fetched along this path. However, on additional executions of the
loop, the program instructions can be pulled from the instruction cache. This means that all of the
memory to CPU information transfers can be accomplished in a single cycle: the sample from
the input signal comes over the data memory bus, the coefficient comes over the program
memory bus, and the program instruction comes from the instruction cache. In the jargon of the
field, this efficient transfer of data is called a high memory access bandwidth.
28
Figure 3.3
Figure above presents a more detailed view of the SHARC architecture, showing the I/O
controller connected to data memory. This is how the signals enter and exit the system. For
instance, the SHARC DSPs provides both serial and parallel communications ports. These are
extremely high speed connections. For example, at a 40 MHz clock speed, there are two serial
ports that operate at 40 Mbits/second each, while six parallel ports each provide a 40
Mbytes/second data transfer. When all six parallel ports are used together, the data transfer rate
is an incredible 240Mbytes/second.
Design of digital controller
For the digital controller design, generally there are two design methods: Digital redesign
approach and direct digital design approach. Digital redesign assumes the sampling frequency is
much greater than the system crossover frequency, so the design equivalent approach is accurate.
This approach first models the discrete components as analog components approximately, and
then designs the analog controller with standard analog control technique. Finally, it maps the
analog compensator into digital with some equivalent mapping methods
In comparison, most DSPs are used in applications where the processing is continuous, not
having a defined start or end. For instance, consider an engineer designing a DSP system for an
audio signal, such as a hearing aid. If the digital signal is being received at 20,000 samples per
29
second, the DSP must be able to maintain a sustained throughput of 20,000 samples per second.
However, there are important reasons not to make it any faster than necessary. As the speed
increases, so does the cost, the power consumption, the design difficulty, and so on. This makes
an accurate knowledge of the execution time critical for selecting the proper device, as well as
the algorithms that can be applied.
Due to its architecture, which is specially optimized for C/C++, these devices offer good code
efficiency, and give customers the ability to develop their algorithms entirely in high-level
languages. Further, these devices uniquely enable customers to develop their code in virtual
floating point via the IQ math capability.
Digital Signal Processors are designed to quickly carry out FIR filters and similar techniques. To
understand the hardware, we must first understand the algorithms. In this section we will make a
detailed list of the steps needed to implement an FIR filter. In the next section we will see how
DSPs are designed to perform these steps as efficiently as possible
To start, we need to distinguish between off-line processing and real-time processing. In off-line
processing, the entire input signal resides in the computer at the same time. For example, a
geophysicist might use a seismometer to record the ground movement during an earthquake.
After the shaking is over, the information may be read into a computer and analyzed in some
way. Another example of off-line processing is medical imaging, such as computed tomography
and MRI. The data set is acquired while the patient is inside the machine, but the image
reconstruction may be delayed until a later time. The key point is that all of the information is
simultaneously available to the processing program. This is common in scientific research and
engineering, but not in consumer products. Off-line processing is the realm of personal
computers and mainframes
In real-time processing, the output signal is produced at the same time that the input signal is
being acquired. For example, this is needed in telephone communication, hearing aids, and radar.
These applications must have the information immediately available, although it can be delayed
by a short amount. For instance, a 10 millisecond delay in a telephone call cannot be detected by
the speaker or listener. Likewise, it makes no difference if a radar signal is delayed by a few
seconds before being displayed to the operator. Real-time applications input a sample, perform
30
the algorithm, and output a sample, over-and-over. Alternatively, they may input a group
performing the algorithm and group of samples.
The DSP supports multiple bus architecture, whose memory bus architecture contains a program
read bus, and data read bus and data write bus. The 32-bit-wide data busses enable single cycle
32-bit operations. The F281x and C281x implement the standard IEEE 1149.1 JTAG interface.
Additionally, the DSP supports the real-time JTAG mode of operation including the contents of
memory, peripheral and register locations; that is to say, the real time analysis is allowed. It
contains 128K x 16 of embedded Flash memory and 128K x 16 of ROM, and two blocks of
single access memory, each 1K x 16 in size. The DSP supports the 32-bits CPU timers and
several serial communication peripherals including CAN, McBSP, SPI and SCI. Further, it
supports the event managers and ADC as peripherals, which are used for embedded control and
communication.
The SOC is started by the Timer A, and once the conversion is finished, the EOC (end of
conversion) interrupt is triggered, and then the ADC interrupt routine is called in the program. In
ADC interrupt routine, DSP first reads the sample result from the ADC result registers and then
processes the data, such as filtering or averaging the data. After that, DSP calculates the
compensator and gets the result, which is supposed to be the new value of the duty cycle. Finally,
the PWM modulated value is calculated in terms of the new duty cycle, and then the registers are
updated before the next trigger of the ADC conversion.
The ADC of TMS320F2812 provides 12-bit core with built-in dual sample-and-hold (S/H),
simultaneous sampling or sequential sampling modes, very fast conversion time (running at 25
MHz), ADC clock, or 12.5 MSPS, and 16-channel, multiplexed inputs and 16 result registers to
store conversion values. The sequencer of ADC can be operated as two independent 8-state
sequencers or as one large 16-state sequencer. The ADC interrupts can be triggered by multiple
sources for the start-of-conversion (SOC) sequence, such as S/W — software immediate start,
event manager A/B or the external pins
The resolution of ADC in DSP chip is 12 bits, which means the minimum value ADC can
distinguish is around
31
0.24% of the input, which is small enough over the power system’s precision requirement of 1%.
As mentioned in the early chapters, the sampling frequency should be greater than the bandwidth
of the system by 10 to 20 times in order to reduce the sampling delay.
The PWM modules of DSP can set up the period register TxPR and configure register TxCON to
initialize the frequency and configuration of PWM. To generate the gate driver signals for the
resonant converter, the PWM frequency is designed to be equal to the switching frequency.
Generating Waveforms To generate the proper signals, engineers require a high-frequency PWM, the flexibility to
change frequency in real-time and dead band to secure safe operation of the power converter.
DSP controllers have made it more practical for designers to apply space-vector PWM waveform
generation. This has allowed high-speed processing to meet high-frequency requirements and
programmable frequency changes either from application to application, or in real-time in a
given application. High-frequency PWM signals are desirable for better control of the motor
phase currents and smoother performance of the motor and load. An additional benefit is
optimizing the dead band and eliminating its undesired impacts on the motor phase currents
Popular PWM Techniques Three commonly used PWM techniques include sinusoidal, hysteresis (bang-bang), and space-
vector (symmetrical or asymmetrical) implementations. Widely used in industrial applications,
sinusoidal PWM (SPWM) is the generation of PWM outputs with sine waves as the modulating
signals. The on and off instances of the PWM signal can be determined by comparing a sine
wave (the modulating wave) with a high-frequency triangular wave (the carrier wave). In
SPWM, the frequency of the modulating wave determines the frequency of the output voltage.
The peak amplitude of the modulating wave determines the modulation index, and in turn
controls the rms value of output voltage. Changing the modulation index can vary the rms value
of the output voltage and significantly improves the distortion factors, as compared to other
multiphase modulation techniques.
To implement SPWM using analog circuits, the following building blocks must be
32
used:
a high-frequency triangular wave generator;
a sine wave generator;
a comparator; and
an inverter circuit with dead-band generators to produce complimentary driving signals
with required dead bands.
The power stage we are using for the digital control investigation is the resonant converter with a
current doubler. For the symmetrical case, the gate signals of primary side have the same duty
cycle ratio but with 180-degree phase shift. Further, we should generate the complementary
signals with controlled dead time for the secondary side signals. The DSP can provide the
minimum increment of PWM signal or the minimum dead time as one clock cycle, which is
supposed to be sufficient for the resonant converters requirement.
Symmetrical PWM generationFigure 3.4
The figure above show how to generate the primary and secondary PWM signals with PWM
generator of DSP. To get the accurate dead time and phase shift of the signals, we generate the
signals based on the same timer, which is set up in Event Manager A. The symmetrical ramp
signals are achieved by using Event Manager A timer in a PWM module. Using given duty cycle
values from the compensator calculation, the four compare values are calculated to get
responding values, and then the compare registers are set up respectively.
33
PWM modules are designed to update the duty cycle every switching cycle, meaning that
before the next switching cycle begins, the compare values are stored in the buffer and then are
updated once the new switching cycle comes.
Sinusoidal PWM (SPWM)
Sinusoidal PWM (SPWM) is the generation of PWM outputs with sine waves as the modulating
signals. The on and off instances of the PWM signal can be determined by comparing a sine
wave with a high-frequency triangular wave
In SPWM, the frequency of the modulating wave determines the frequency of the output voltage.
The peak amplitude of the modulating wave determines the modulation index, and in turn
controls the rms value of output voltage. Changing the modulation index can vary the rms value
of the output voltage and significantly improves the distortion factors, as compared to other
multiphase modulation techniques
Figure 3.5The energy that a switching power converter delivers to a motor is controlled by PWM signals
that are applied to the gates or the bases of the power transistors. PWM signals are described as
pulse trains with variable pulse width, fixed frequency and magnitude--with one pulse of fixed
magnitude in every PWM period. However, the width of the pulses changes from pulse to pulse
according to a modulating signal.When a PWM signal is applied to the gate/base of a power transistor, it causes the turn-on and
turn-off intervals of the transistor to change from one PWM period to another PWM period
34
according to the same modulating signal. The frequency of a PWM signal must be much higher
than the modulating signal, the fundamental frequency, such that the energy delivered to the
motor and its load depends mostly on the modulating signal
The pulses of a symmetric PWM signal are always symmetric with respect to the center of each
PWM period. The pulses of an asymmetric PWM signal always have the same side aligned with
one end of each PWM period. Asymmetric PWM can be used for stepper motors and other
variable-reluctance motors.
Symmetric PWM methods are often used for three-phase ac induction and brushless dc motors,
due to the lower harmonic distortion that is generated on phase currents in comparison to
asymmetric PWM methods.Generally, there are two main considerations in the design of the software, namely accuracy and
speed. DSP supports the 32-bits fixed-point format, and, based on this, the IQ math library will
provide sufficient accuracy for the arithmetic operations. The IQ math library allows the
customer to code the algorithms in such a way that it seems like they are coding with the ease of
floating point, even though this DSP is a cost effective fixed-point machine. Numeric precision
and dynamic range requirement will vary considerably from one application to another, and
higher precision results in a lower dynamic range
Quantization
In a practical implementation, the digital controller is implemented with the hardware, so the
values of signal variables and filter coefficients are restricted to a finite set of discrete magnitude
values, which is called quantization or finite word effect. Fixed-point numbers could cause
round-off or truncation errors for the coefficients of the calculation, which can be modelled as
the worst case bound or random noise input. Those round-off effects also can be reduced by
choosing a suitable filter structure, since different filter structures have different sensitivity for
the given coefficients. Furthermore, coefficient round off can perform differentiation to derive
sensitivity equations for poles and zeros to coefficients variation
Overflow has been shown to impose disastrous consequences on the digital filter so the overflow
oscillations must be avoided. By scaling the input to the filter so that only small signal levels
35
exist in the filter, the overflow can be avoided. Or a digital filter structure, which is free of
overflow oscillation, can be used.
In a digital controller, a DPWM acts as a DA conversion, which is used to generate pulse width
for a switch. Obviously, the minimal time increment of duty ratio depends on N, which is the
resolution of DPWM. Because the discrete change of duty ratio causes the discrete change of
output voltage, if the smallest change of caused by the discrete change of duty cycle is greater
than the smallest difference of, AD can be distinguished.
POWER CIRCUIT DIAGRAM
36
DESIGN OF BOOST SWITCHING CONVERTER
The boost converter is a high efficiency step-up DC/DC switching converter.
The converter uses a MOSFET, to pulse width modulate the voltage into an inductor.
Rectangular pulses of voltage into an inductor result in a triangular current waveform.
For this design we assume that the converter is in the continuous mode, meaning that
the inductor's current never goes to zero.
Peak inductor current =ipk
Min inductor current =io
Ripple Current = ipk– io
Input voltage=Vin
Output voltage=Vout
Operating frequency=f
37
Duty ratio=Dr
Output current=Io
Value of inductor=L
l=V ¿× Dr
f × ∆i
Value of capacitor=C
c=I o × Dr
f × ∆ V c
ΔVc=peak to peak output ripple
RESONANT CONVERTER WITH ISOLATION OF LOAD
The circuit consists of an L-C series resonance link circuit which is executed from a high
frequency square wave voltage generated by a bridge inverter.
The output voltage is taken from the resonating capacitor through a transformer to
transform the voltage.
The secondary voltage of the transformer is rectified by a diode bridge and filtered by a
capacitor filter.
The dc voltage can be varied and closely regulated by controlling the link frequency.
This is suitable for general purpose regulated dc-to-dc power supplies which is suitable to
work under widely varying load and supply voltage fluctuation.
Vo=output dc voltage
38
Vin=input dc voltage
Vo’=output dc voltage with transformer turns ratio 1:1
N=turn ratio
RL’=load resistance referred to primary
Value of inductor L
L= Rl 'f r ×Q
Value of capacitor C
c= Qf r × Rl '
Where
Q=operating point
fr=resonating frequency
f=operating frequency
DRIVER CIRCUIT NEED FOR DRIVER CIRCUIT
39
Output of DSP is low of the order of 3.3V. It needs to be amplified to 20V for MOSFET IRF
450.So the output of DSP needs to be given to a driver circuit. Driver also isolates low power
circuit from high power circuit. It merely supplies the high current requirements of power circuit.
MOSFET gate driver ICs are the simplest, smallest and lowest cost solution to drive
MOSFETs up to 1200V in applications up to 12kW, and can save over 30% in part count
in a 50% smaller PCB area compared to a discrete opto-coupler or transformer based
solution. With the addition of few external components, IR gate driver ICs provide full
driver capability with extremely fast switching speeds, designed-in ruggedness and low-
power dissipation.
Gate driver IC's generate the current and voltage necessary to turn MOSFETs or IGBTs
on and off from the logic output of a DSP, micro-controller or other logic device. The
input is typically a 3.3 volt logic-level signal. All IR gate driver ICs are CMOS
compatible, and most are TTL compatible. Output currents are up to 2A.
The Driver Advantage
Dead-time as low as 500ns allows frequency up to 100khz
Increases speed range and torque control of motor drives
Enable rugged gate drive design
Low power dissipation
Compared with opto-coupler based solutions:
30% fewer parts and 50% smaller PCB
Doesn't need auxiliary power supply
10X faster delay matching (±50ns)
No degradation of performance over time
Shorter time to signal over-current 1.5µs versus 6µs)
Reduced EMI and voltage spikes
FEATURES AT A GLANCE
600V and 1200V gate driver in a single IC for MOSFET and IGBTs
Multiple Configurations
Single high side
40
Half-bridge
3 phase inverter driver
Up to +2.0/-2.0A output source/sink current enables fast switching
Integrated protection and feedback functions
Optional deadtime control
Tolerant to negative voltage transient
Up to 50V/ns dV/dt immunity
Optional soft turn-on
Uses low cost bootstrap power supply
CMOS and LSTTL input compatible
APPLICATIONS
Motor Drive
Lighting Ballast
Switched Mode Power Supplies
Automotive
Plasma Display Panels
Gate Driver ICs Simplify Design
Driving a MOSFET or IGBT in the high side position of a half-bridge topology or 3
phase inverter leg offers the additional challenge that the gate voltage is referenced to
the source rather than to ground. The source voltage is a floating point at up to the
maximum bus voltage, or voltage rating of the MOSFET or IGBT, 600V and up for
motor drive, lighting or SMPS applications. IR gate driver uses a patented level
shifter technology for high voltage application and offers the only 1200V rating in the
industry.
These ICs simplify circuit designs by integrating extensive functionality. They use a
low cost bootstrap supply, while opto-coupler-based circuits typically require an
auxiliary power supply. IR Gate Driver ICs offer optional single input or dual input
programmable deadtime control for low side and high side drivers as well as for 3
41
phase drivers to provide design flexibility and allows to minimize cross-conduction.
Unique 3-phase drivers allow driving a 3 phase inverter using a single IC.
Gate Driver ICs enable rugged driver designs
Gate Driver ICs are specifically designed with motor drive applications in mind. The
newest soft-turn-on limits voltage and current spike and reduce EMI. In addition, they
have up to 50V/ns dV/dt immunity and are tolerant to negative voltage transient. The
under-voltage lock-out available for most drivers prevents shoot-through currents and
device failures during power-up and power-down without any additional circuitry.
The output drivers feature a high pulse current buffer stage designed for minimum
driver cross-conduction.
Noise immunity is important for the high-side position which has a floating voltage
and is susceptible to high noise levels, particularly in motor drive applications. Noise
immunity ensures that the MOSFET or IGBT doesn't turn on accidentally. Noise
immunity is obtained by using Schmitt-triggered input with pull-down. Additional
noise immunity is obtained with separate logic and ground pins in some ICs, such as
the 600V ICs in 14-pin packages.
Gate Driver ICs enable fast switching speeds
Gate Drive ICs have ten times better delay matching performance than opto-coupler-
based solutions. Delay matching between the low-side and high-side driver is
typically within ± 50ns (and as low as ± 10ns for some specialty products), allowing
complete dead-time control for better speed range and torque control in motor drive
applications. Fast switching also reduces switching power losses and allows
leveraging the full benefits of the fastest IGBTs available on the market today for
better torque control over a wider speed range.
Circuit Diagram of Driver circuit
42
Various features of the IC’s used in the circuit
IC 7407
This device contains six independent gates each of which
performs a buffer function. The open-collector outputs require external pull-up resistors
for proper logical operation
It is a Hex-buffer with open collector high voltage outputs.
The 7407 IC package contains six independent positive logic non-inverting buffers.
Pins 14 and 7 provide power for all six logic gates.
Non-Inverting buffers perform no logic manipulation.
If the input is HIGH then the output is HIGH and if the input is LOW then the output
is LOW.
Although no logical change occurs, the 7407 can change a normal TTL signal into a
high-voltage (30 VOLT) at 30mA signal.
This allows a TTL device to interface with HIGH-LEVEL devices.
43
Truth table for IC DM7407
Pull up resistors
Connection diagram
44
6N137 The 6N137 optocoupler consist of a LED, optically coupled to a very high speed
integrated photo-detector with a strobable output.
It is designed to use in high speed digital interfacing application that require high voltage
isolation between input and output like receivers, microprocessors, motors and other
control systems.
The output is taken from an open collector.
It is characterized for its operation over the range of 0-70 deg.cel.
The 6N137, dual-channel optocouplers consist of a 850 nm AlGaAS LED, optically
coupled to a very high speed integrated photo-detector logic gate with a strobable output.
This output features an open collector, thereby permitting wired OR outputs. The coupled
parameters are guaranteed over the temperature range of -40°C to +85°C
45
Salient features
Gallium arsenide phosphide LED optically coupled to photo detector.
Compatible with TTL inputs.
Low input current required to turn on output (5mA).
46
High speed switching (75ns max.)
Superior CMR of 10kV/us.
Works for a wide range of temperatures.
Absolute Maximum Ratings
Supply Voltage 7V
Input Voltage 5.5V
Output Voltage 30V
Operating Free Air Temperature Range 0to 70 degree Celsius
Storage Temperature Range 65 to 150 degree Celsius
UC 3708
The UC1708 family of power drivers is made with a high-speed, high-voltage, Schottky process
to interface control functions and high-power switching devices – particularly power MOSFETs.
Operating over a 5 to 35 volt supply range, these devices contain two independent channels. The
A and B inputs are compatible with TTL and CMOS logic families, but can withstand input
voltages as high as VIN. Each output can source or sink up to 3A as long as power dissipation
limits are not exceeded.
Although each output can be activated independently with its own inputs, they can be forced low
in common through the action of either a digital high signal at the Shutdown terminal or by
forcing the Enable terminal low. The Shutdown terminal will only force the outputs low, it will
not affect the behavior of the rest of the device. The Enable terminal effectively places the device
in under-voltage lockout, reducing power consumption by as much as 90%. During under-
voltage and disable (Enable terminal forced low) conditions, the outputs are held in a self-
biasing, low-voltage, state.
The UC3708 and UC2708 are available in plastic 8-pin MINI DIP and 16-pin “bat-wing” DIP
packages for commercial operation. UC1708 is available in hermetically sealed 8-pin MINI
CDIP, 16 pin CDIP and 20 pin CLCC packages. Surface mount devices are also available
47
UC3708N Features
3.0A Peak Current Totem Pole Output
5 to 35V Operation
25ns Rise and Fall Times
25ns Propagation Delays
Thermal Shutdown and Under-Voltage Protection
High-Speed, Power MOSFET Compatible
Efficient High Frequency Operation
Low Cross-Conduction Current Spike
Enable and Shutdown Functions
Wide Input Voltage Range
ESD Protection to 2kV
48
Simulation resultsSimulation results form an integral part in any power circuit design. The simulation results for our power circuit are as follows.
This is the simulation for Boost output and input current.
For the given input of 230v AC , after the first boost and full bridge rectifier we get the output as 480v .The input current is also plotted which is sinusoidal.
49
The next simulation result is of resonant inverter stage
If we zoom the waveform , the results obtained are as follows
The waveform obtained is very much sinusoidal and are thus satisfactory.
50
The final output obtained is as follows
The waveform obtained is almost DC. So the result is as expected.
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