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This presentation covers bus differential relaying in general, leading into high-impedance

bus differential relaying. Comparisons between high-impedance and low-impedance

relaying are made to point out the differences and advantages of each method. Two

simple examples are discussed to demonstrate settings ideas and methods. A quick

discussion of arc flash is included. A reduction in arc-flash time duration can be made

using bus differential relaying, reducing energy during an arc-flash event.

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Any bus differential scheme compares the current entering and leaving a bus. This is an

application of Kirchoff’s Current Law, which states that the sum of the currents entering a

node must be zero. Bus differential relays do not have to contend with some of the

complications associated with transformer differential protection, such as phase angle

compensation and inrush. However, the task of a bus differential relay is not simple. The

relay must be able to account for CT saturation, which can be significant, especially in the

case of external faults when one CT sees the sum of all other source currents.

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Regardless of the type of bus protection provided, CTs are required on all circuits

connected to the bus to measure the current entering and leaving the bus. Under normal

load conditions or external fault conditions, the vectoral sum of all primary currents

entering and leaving the bus adds up to zero. The net secondary current measured by the

bus differential relays is also zero, provided that all CTs perform equally under all

conditions.

• Bus protection zone defined by CTs around bus perimeter

• All primary circuit currents add up to zero under normal load or external fault

conditions

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External faults pose the greatest challenge to the security of a bus protection scheme. All

primary currents add up to zero under external fault conditions, but CT secondary currents

measured by the bus protection relay may not add up to zero if the CTs do not all have the

same ratio or perform in a linear manner. CT saturation may cause one CT to provide a

nonlinear output, resulting in a net difference current measured by the bus differential

relay. Bus differential relays must be able to accommodate unequal CT performance to

prevent misoperation for external faults.

• External faults typically stress one CT more than others

• Primary circuit currents add to zero under external fault, but CT secondary currents

may not

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Ideally, bus protection provides fast operation (~1 cycle) for any faults that occur within

the protection zone. This same bus protection must remain secure from misoperation for

any external faults. These two criteria are the main concerns of protection engineers,

although meeting them can sometimes be difficult, given the many variables that define

the substation/switchgear operating environment and its protection needs. CT saturation

must be taken into account for any bus protection application. As we will see in the

following slides, this is definitely a concern for external faults and can be an issue with

internal faults as well.

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Other considerations when selecting the most appropriate bus protection scheme include:

• Scalability for future growth: Can the protection scheme accommodate additional

CT inputs when one or more circuit breakers are added to the bus?

• Different CT ratios and shared CTs: Different circuit loads or breaker sizes may

require CT ratios that do not match others on the bus. Also, some installations may

have minimal CTs, requiring that the bus differential CTs be shared with other

protective relays for line or apparatus (transformer, capacitor, reactor, etc.)

protection.

• Bus switching and reconfiguration: Complex bus arrangements sometimes include

disconnect switches to redistribute circuit loading on a bus. The bus differential

scheme must be able to adapt to the modified circuit arrangement.

• Protection status monitoring: Ideally, the bus differential protection scheme should

monitor the health of the relay, CTs, and the CT connections under normal

conditions. This is intended to prevent a misoperation or failure to operate under

fault conditions if the relay is out of service, a CT is shorted, or a CT is open-

circuited.

• Breaker maintenance and other operating practices: Some breaker maintenance

conditions, such as isolating and grounding breakers, may adversely impact the

sensitivity of the bus differential scheme. Other operating practices may increase the

risk of tripping for external faults.

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There are two general relay types used for bus differential protection: high-impedance and

low-impedance bus differential relays. This presentation concentrates on one method of

providing sensitive, secure bus protection—the high-impedance differential relay scheme.

Both high-impedance and low-impedance bus differential schemes have advantages and

disadvantages that are key to understanding and applying the right protection scheme.

Other protection methods, such as directional and nondirectional zone interlocking (fast

bus tripping) schemes, are not extensively discussed in this presentation.

High-impedance differential relays, as the name implies, present a high impedance to the

flow of difference current from paralleled CTs. With a known internal impedance, the

relay can be set to operate at a particular voltage setting.

Low-impedance differential relays present a very low impedance to each CT current. The

relay operates based on a comparison of calculated difference current (the magnitude of

the vector sum of all CT currents) compared with a restraint current (the sum of the

magnitudes of all CT currents.)

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Consider a differential scheme using paralleled CTs where individual line CTs are

connected in parallel, and leads from the individual phase tie-point connections are

brought to the relay.

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Saturation has the effect of lowering a CT’s exciting impedance, reducing its ability to

produce an output. For the case of complete saturation, the CT exciting branch acts like a

short circuit, preventing the CT from producing an output.

As CT B saturates, the difference in current from CT A and CT B causes the secondary

current to split between the low impedance of the relay and saturated CT lead and internal

resistance. If the current through the relay exceeds its pickup threshold, the relay will trip,

resulting in a misoperation. This would be the case if a simple, low-impedance,

instantaneous overcurrent relay element was used for bus differential protection with

paralleled CTs.

It is interesting to note that this type of scheme is not uncommon, except that the relay

uses either a definite-time delay or inverse-time current characteristic to ride through the

CT saturation period.

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This graph shows current from CT A and CT B and the differential current that flows for

a system consisting of four breakers with 2000/5 C400 CTs. The per-CT burden is

1.5 ohms, and the fault current is 16,410 amperes.

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This graph shows differential current and the magnitude of its fundamental component.

Filtering is the key ingredient in SEL relays that makes their application different from

other manufacturers’ relays. In the SEL-587Z High-Impedance Differential Relay, the

combination of a low-pass hardware filter and a half-cosine digital filter removes any dc

and odd harmonics above the fundamental component from the input signal. Therefore,

with SEL relays, the only real concern is with the fundamental component of the input.

Without filtering, the relay response to the harmonics present in the distorted differential

current waveform would still be a concern.

As shown, if an instantaneous overcurrent relay were used, it would misoperate under

these conditions. To prevent misoperation, either the relay must have a time delay

sufficient to ride through the CT saturation period or a resistor in series with the relay

must be added to create a high-impedance differential scheme.

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To calculate the resistor value, we need to know the maximum fault current in secondary

amperes, total CT burden, and the relay pickup setting. Using Ohm’s law, the voltage

developed across the saturated CT is divided by the relay pickup to determine the required

resistance.

The example is for a four-breaker bus with 2000/5 C400 CTs and a maximum fault

current of 16,410 primary amperes. In this case, the maximum fault current is twice the

current where the CT theoretically saturates.

The total CT burden is 1.5 ohms. This value includes the resistance of the CT secondary

and the leads connecting the CTs to the relay. With a 1.5-ampere pickup selected as the

relay setting, the required value of the stabilizing resistor is 41 ohms.

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With a properly sized resistor, current from CT A is ―forced‖ through CT B (now

essentially a short circuit) instead of flowing through the relay. The resistor does not

prevent current from flowing through the relay but restricts it to a value that is less than

the pickup setting.

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With a 41-ohm stabilizing resistor added, the differential current is greatly reduced. As

shown, the fundamental component of the differential current is well below the

1.5-ampere relay pickup. This demonstrates that the scheme is secure for external faults.

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For internal faults, the resistor and relay are subjected to the total secondary fault current;

however, saturation limits the maximum current seen by the relay. Even with limitations

caused by saturation, the fundamental component of the current is well above the relay

pickup setting. This results in reliable operation for internal faults.

In the past, the use of a voltage-limiting device has been advocated. The instantaneous

voltage developed across the resistor can become large. In this application, the maximum

instantaneous voltage developed is approximately 1,400 volts. However, for this case, a

voltage limiter is not required, since the voltage is only present for a fraction of a cycle.

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Expanding on the stabilizing resistor concept, we can use a very large stabilizing resistor

(e.g., 2,000 ohms), which makes the relay current I1 negligible compared to I2. This is

now a true high-impedance relay. Voltage across the relay can easily be calculated from

external fault current in secondary amperes times CT and lead resistance. The relay can be

calibrated in volts, because the voltage across the relay and stabilizing resistor is directly

proportional to the current through the relay. Setting the relay pickup above the voltage

for an external fault with some margin makes the relay secure against tripping for an

external fault with complete CT saturation. The fixed resistor size simplifies the

application, making it suitable for a wide range of applications with parallel CTs.

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This diagram shows the SEL-587Z. The individual line CTs are connected in parallel,

which is key to operating a high-impedance relay. In practice, leads from the CT to the

junction point should be as short as possible to reduce the lead resistance. They should

also be as equal in length as possible to keep voltage drops from the tie-point connection

to CTs as equal as possible. Unequal lead resistances are seen as voltage at the tie-point

connection during normal operation.

In addition to a high-impedance differential, the SEL-587Z offers overcurrent detection.

This diagram shows two features of high-impedance protection that are important for

additional security and reliability. One feature is the use of an external 86 device (lockout

relay) to bypass the relay’s 87Z element during a fault. The internal metal oxide varistor

(MOV) prevents excessive, damaging voltage across the internal resistor and series relay

element. The MOV has limited energy absorption and therefore should be exposed to a

maximum 5 cycles of fault current at any given operation to minimize degradation. The

86 device contact shorts the CT secondary current, ensuring minimal exposure of the

MOV to the high current by shunting the fault current once the relay issues a TRIP

command.

The second feature involves instantaneous and time-delayed overcurrent elements in the

SEL-587Z. Three of these elements are available, one for each monitored phase. These

elements can be used to sense a breaker failure condition (current still flowing after a

TRIP command is issued) or MOV degradation (high-current flow around the 2,000-ohm

resistors due to MOV degradation) or to back up the differential protection in case of a

total MOV failure (time-delayed trip on overcurrent). The current through this connection

appears in the relay event report for easy review and documentation.

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High-impedance bus differential relays require specific rules that must be followed with

regard to CTs, as shown on this slide. As in any application where CTs are paralleled, the

ratios must match. The highest tap connection is required to obtain optimum CT

performance and prevent possible damaging voltages across the open CT turns when an

internal fault occurs. Ideally, all of the CTs should have the same accuracy class to

provide similar, if not identical, performance from all CTs, regardless of the fault

location. CT lead lengths should be kept as short as possible to minimize the lead

resistance and should be similar in length to promote similar CT performance under all

conditions. With paralleled CTs, the prolonged current flow after the bus breakers are

tripped indicates the failure of a breaker to interrupt current; however, there is no way to

identify which breaker failed.

Dedicated CTs are required for high-impedance bus relays because of the extremely

nonsinusoidal current waveform that results for an internal bus fault. One could argue that

backup protection for external bus faults could share the same CTs used by the high-

impedance bus differential relay. This is discouraged, however, because of the transient

nature of the CT currents under internal fault conditions.

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An open CT connection causes an unbalance in the CT secondary currents. The difference

current attempts to flow through the 2,000-ohm internal resistance in the high-impedance

bus differential relay. Assuming a 200-volt trip threshold setting on the relay, it only takes

0.1 amperes of difference current to reach the 200-volt trip threshold. For a 1200/5 CT

ratio, this translates to about 24 amperes of primary load current. Any more than this

causes the relay to trip for the open CT. Since an open CT condition is hazardous, tripping

might not be considered objectionable.

Shorted CTs disable the high-impedance differential relay. Worse yet, there is no way to

detect this condition since the voltage across the high-impedance bus differential relay is

normally zero. One test technique that is used to detect shorted CTs is to apply a relatively

low ac voltage, 10 to 20 volts, across the relay terminals and measure the current. The

high-magnetizing branch impedance of the CTs and the high internal impedance of the

bus differential relay under normal operation should prevent any appreciable current from

flowing unless there is a short across one of the CTs.

Grounding jumpers or chains are usually connected to the isolated terminals on both sides

of a breaker when breaker maintenance is performed. If the breaker contacts are closed,

the breaker grounds provide a primary short circuit on the CTs internal to the dead-tank

breaker. Generally, there is enough resistance in the ground path that when reflected to

the secondary side through the CT ratio, the ―short circuit‖ is more of a resistive bypass

that can reduce the sensitivity of the high-impedance bus differential relay.

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The high-impedance protection method can be summarized as follows:

• Complex switching operations are not easily supported. Better choices are available

if this functionality is needed.

• Mismatched CTs and nondedicated CTs that feed other devices in the substation,

such as meters, may cause problems with high-impedance protection because of its

sensitivity to sensed current and line impedance.

• Total cost is low if installed on a simple bus. The cost is essentially that of the

SEL-587Z and installation. Installation costs increase if the SEL-587Z is installed

in more complex bus applications where additional time is needed to calculate

settings due to mismatched CTs or where additional labor is needed to install

external make-before-break bypass relays for switching operations.

• Future expansion may also be an issue with this scheme if a feeder with a different

CT ratio is used or if switching operations are added.

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The SEL-487B Bus Differential and Breaker Failure Relay is a low-impedance bus

differential relay.

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This drawing shows a constant current source for CT A, which is the sum of all source

currents entering the bus for an external bus fault. The constant current source labeled

CT B represents the current flowing through a single CT on the faulted circuit. During an

external fault, if the CTs do not saturate and all CTs have the same ratio, the current from

CT A will be equal to the current from CT B. As a result, the current will circulate among

the CTs, and no current will flow through the relay (Device 87), regardless of the internal

impedance of the relay.

CT A is the parallel combination of the CTs that are providing current to the bus. CT B is

the CT that is on the faulted circuit. Because CT A is a parallel combination, the exciting

branch reactance and series resistance is divided by n – 1, where n is the total number of

CTs in the scheme. This assumes that all CTs have the same or very similar magnetizing

branch impedances, internal resistance, and CT lead resistance.

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During normal bus operation, the current flow through various CTs on the bus is

balanced. That is, the current flowing into the bus equals the current flowing out of the

bus. Because the CTs are connected in parallel, they act as current-summing devices. The

sum of the total monitored current is zero; therefore, the voltage seen by the high-

impedance element is near zero. In typical applications, differences in CT performance,

CT internal resistance, and lead resistance result in a net voltage measured by the relay.

To prevent any significant voltage across the relay under normal operation, all CTs should

have the same or very similar characteristics, and the CT lead resistances should be

balanced, unlike the connection shown in the drawing on this slide.

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When an external fault occurs, a majority of the current passes through the faulted feeder

CT. If one CT core becomes saturated, the magnetizing impedance goes to zero (acting as

a short circuit), and the CT secondary consists of only winding and lead resistances. The

saturated CT thus shunts most of the paralleled CT circuit current away from the

87Z element.

A voltage appears, and we must set the minimum pickup level of the 87Z element above

this maximum through-fault-generated voltage.

Vr = (RCT + P • RLEAD) • IF/N

where:

Vr is the voltage across the high-impedance element.

RCT is the CT secondary wiring and lead resistance up to the CT terminals.

P is 1 for three-phase and 2 for phase-to-ground faults.

RLEAD is the one-way resistance of lead from the junction point to the most distant

CT.

IF is the maximum external fault current.

N is the CT ratio.

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To set the relay, voltage (VS) is determined by multiplying the voltage seen across the

high-impedance element of the relay during an external fault by a safety factor (K). K is

normally set to a value of 1.5 or higher. To be even more conservative, the maximum

breaker interrupting duty may be used to calculate Vr, thereby taking into account future

increases in available fault current.

VS is the voltage setting for high-impedance element

K is the safety factor, often 1.5

Vr is the voltage across high-impedance element for maximum external fault

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When a bus fault occurs, current in the paralleled CT circuit is no longer balanced. For

example, if the fault is on the bus, large currents flow toward the bus from all external

sources connected to the bus. The large CT secondary currents are forced into the direction

of the 87Z circuit. This results in a voltage that exceeds the pickup level of the element.

The relay operates an auxiliary lockout relay to trip all breakers connected to the bus.

Use the following equation to calculate the minimum primary current required to operate

the relay for an internal fault:

Imin = (n • Ie • Ir • Im ) • N

where:

n is the number of CTs in parallel with the relay, per single phase.

Ie is the CT exciting current at the relay setting voltage (Vr).

Ir is the current through the relay at Vr .

Im is the current through the MOV at Vr.

N is the CT ratio.

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For an internal bus fault, all CT secondary currents attempt to sum and drive their current

through the internal impedance of the high-impedance relay. This creates a high voltage

across the relay, driving the CTs into ac saturation and causing the MOV to conduct,

which prevents the damage of voltage transients. The resulting voltage waveform across

the relay is extremely nonsinusoidal. The relay element needs to be designed to operate

properly with this nonsinusoidal waveform.

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This graph shows the waveform measured across a high-impedance relay for a 60 kA

primary fault current with 1200/5, C200-class CTs. The MOV effect to limit the voltage

can be seen in the flattened peaks on each half cycle of the waveform. A higher class CT

produces wider pulses, because it is slower to saturate; whereas a lower class CT

produces narrower pulses, because it saturates faster on each half cycle.

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This graph shows the one-half cycle, cosine-filtered voltage waveform (thin blue line), the

magnitude of the voltage waveform (thick blue line), and the relay 200-volt trip threshold

(peak of setting shown with red line) of the high-impedance differential relay. It is

significant that the maximum voltage developed from the filtered waveform is a fraction

of the peak voltage developed across the relay. For the best reliability, the high-

impedance relay voltage setting should not be set above the C rating of the CTs used in

the differential scheme.

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This graph shows the one-half cycle, cosine-filtered voltage waveform using C400 CTs.

Note that the MOV limits the voltage to 1,500 volts. Pulse width is again limited as the

CT saturates, but the pulse width is greater than that seen using C200 CTs.

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This graph shows the one-half cycle, cosine-filtered voltage waveform using C100 CTs.

Again, the MOV limits the voltage to 1,500 volts. Pulse width is limited as the CT

saturates, and it is too narrow to be reliably sampled. Nevertheless, C200 CTs should be

used in a high-impedance bus differential scheme for reliable operation.

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An application note was released in 2008 to address using the SEL-587Z in switchgear

applications. For more information, please refer to the SEL Application Note, ―Applying

the SEL­587Z in Switchgear,‖ by David Costello and Joe Mooney, which is available

online at http://www.selinc.com.

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Out of an SEL installed base of approximately 5,000 SEL-587Z Relays, there have been

four reported cases of the relay operating for external faults (as of early 2009). To better

understand the nuances and offer application guidelines, high-current testing was

conducted at KEMA-Powertest, Inc., in Chalfont, Pennsylvania in April 2008. The

primary current tests were conducted examining relay operation during internal faults and

verifying the relay’s minimum sensitivity.

For more information, see ―Application Guidelines for Microprocessor-Based, High-

Impedance Bus Differential Relays,‖ by Stanley E. Zocholl and David Costello. This

paper can be found on the SEL website at http://www.selinc.com.

If the relay voltage setting falls below the knee point of the CT excitation curve, the

excitation current can be read directly from the CT excitation curve. If the relay voltage

setting is above the knee point of the CT excitation curve, a more accurate estimate of

excitation current is twice the excitation current read at one half of the voltage setting.

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Testing shows that voltage settings above the knee point up to the CT C rating yield

dependable relay performance and adequate sensitivity.

Testing proves that the high-impedance relay can achieve good sensitivity

(e.g., 100 ampere with 200-volt settings and four C200, 1200/5 CTs).

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Tests indicate that microprocessor-based, high-impedance relays can be twice as fast as

electromechanical counterparts.

Traditional voltage setting calculations can generate voltage settings that are too low for

adequate security in switchgear applications.

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Experience shows that a low-voltage setting on a high-impedance bus differential relay

(100 volts or less) exposes the relay to misoperation on capacitor bank and other

switching transients. Bus differential installations in switchgear often have very short CT

lead lengths, so the calculated relay voltage for an external fault with complete CT

saturation is sometimes only a few tens of volts. Another common problem with

switchgear is the use of very low-accuracy CTs. In general, C200 is the minimum CT

accuracy class that should be used with high-impedance bus differential relays. Using

CTs with lower accuracy classes may result in improper or no relay operation for internal

bus faults.

On the other hand, very high-voltage settings reduce relay sensitivity. In most cases, a

200-volt trip threshold setting provides an adequate margin for external faults and

adequate sensitivity for internal faults, provided the CT accuracy class is C200 or above.

If additional sensitivity is required on impedance-grounded systems, a second level of

threshold settings can be applied with lower voltage settings, provided a short time delay

of 2 to 3 cycles is applied to ride through transient voltage conditions.

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Tests indicate that voltage measured by the relay for internal faults is limited by the

internal MOV. Higher CT ratios do not appreciably alter the measured voltage. Although

further investigation is being done to determine the effect of higher accuracy class CTs on

the measured voltage, it is suggested that the maximum voltage setting be limited to

400 volts with only C400 or higher CT ratings.

As stated in the notes of the previous slide, C200 CT accuracy class is the minimum that

should be used with high-impedance differential relays. A tripping threshold voltage with

C200 class CTs should be limited to 200 volts to provide a defined minimum current

sensitivity.

In general, use CTs with a minimum accuracy class of C200 with fully distributed

secondary windings. The CTs should be of the same full ratio, which should be the ratio

used. Keep CT lead lengths as short and as equal in length as possible.

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The voltage is from the following equation:

Vr = (RCT + P • RLEAD) • IF/N

where:

Vr is the voltage across high Z element.

RCT is the CT secondary wiring and lead resistance up to CT terminals.

P is 2 for Phase G, SLG (single-phase-to-ground) faults and 1 for balanced,

three-phase faults.

RLEAD is the one-way lead resistance from the yard junction box to the most

distant CT.

IF is the maximum external fault current.

N is the CT ratio.

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The development of the constants for this case is illustrated as follows:

IA + IB + IC = IN IN=0

VCT = IA • (RL + ZR) + IN • RL

Since: IN = 0

VCT = IA • (RL + ZR)

VCT is the voltage developed to drive the ratio current through the burden impedance loop.

For a balanced fault, the neutral current is zero; therefore, the voltage is simply the phase

current times the one-way lead resistance plus the relay impedance.

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This is the case for wye CTs and an SLG fault.

IA + IB + IC = IN IB = IC = 0 IA = IN

VCT = IA • (RL + ZR) + IN • RL

Substituting: IA = IN

VCT = IA • (2 • RL + ZR)

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Use the SEL-587Z Instruction Manual equation to calculate minimum internal fault

operating current.

Imin = (n • Ie + Ir + Im) • N

where:

Imin is the minimum current.

n is the number of CTs in parallel with the relay.

Ie is the CT exciting current at the voltage setting.

Ir is the relay current at the voltage setting.

Im is the MOV current at the voltage setting.

N is the CT ratio.

This slide presents the equation used to calculate the minimum primary differential

current required to operate the high-impedance differential relay. Essentially, the current

must be sufficiently high to drive the voltage across the relay above the trip threshold. As

the voltage climbs, the excitation current drawn by the CTs increases, diverting current

away from the relay. This calculation, therefore, takes into account the current drawn by

the CTs at the trip threshold voltage. The equation also includes the current drawn by the

MOV in parallel with the relay resistor, but this is zero when the trip threshold voltage is

below the conduction voltage for the MOV.

The CT exciting current is determined from published CT excitation curves or by testing,

whichever is easiest to obtain. Values obtained by testing are generally more accurate.

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Consider a simple substation arrangement with four breakers. In this example, Breaker 4

feeds a load and provides no fault current to an internal fault.

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The numbers presented in this slide are contrived for the sake of example.

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Voltage calculations follow the equations given in the instruction manual. Cable

resistance tends to be a small factor in Vr. The biggest factor is fault current for the two

fault types. Any nonsource included in the scheme tends to yield the highest Vr, since it

provides no fault current to the other faulted phases. Select the highest calculated Vr for

setting the differential voltage elements.

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Pick the highest calculated Vr for setting the differential voltage pickup. A 1.5 safety

factor is used here. We may want to round up Vs to the nearest integer voltage to help

those testing relays. The factor is somewhat arbitrary; some engineers select a factor of 2.

This setting is at the C200 rating of the CTs used in this example, thus the setting is

acceptable. If the required Vr is greater than the C rating of the CTs, the SEL-587Z should

not be used in this application. Choose CTs with a high ratio, choose a higher class of

CTs, or use an SEL-487B.

The minimum sensitivity is calculated to be 216 primary amperes. The relay will not

operate for faults below this fault current magnitude.

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Consider an industrial switchgear arrangement with two source breakers and multiple load

breakers. Assume that only one source is closed at a time, excluding transfers.

An advantage of using high-impedance differential relaying is that the scheme can accept

more breakers in the scheme than can be accepted by a low-impedance differential relay.

The practical limit to this is the total CT excitation current at the differential voltage

setting. The minimum pickup current increases as more breakers are added to the scheme.

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The numbers presented in this slide are contrived for the sake of example.

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Voltage calculations follow the equations given in the instruction manual. In switchgear

applications, cable resistance tends to be a very small factor in Vr. The biggest factor is

the fault current for the two fault types. In all switchgear applications, SEL recommends a

minimum differential voltage setting of 200. This setting limits the application to those

using CTs with a C200 or greater rating. In this example, CTs with a C200 rating class

were assumed, thus this application is acceptable.

The minimum sensitivity is calculated to be 504 primary amperes. The relay will not

operate for faults below this fault current magnitude.

For impedance-grounded systems that limit phase-to-ground faults, a 200-volt setting will

not initiate a trip for phase-to-ground faults. For these applications, set one of the

provided differential elements to the lowest calculated Vr , and use a minimum 1-cycle

time delay. See the SEL Application Note AN2008-01 for additional information.

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This is a summary of scheme advantages and disadvantages to reduce arc-flash hazards.

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