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TL032, TL032A ENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS SLOS033D – JULY 1988 – REVISED AUGUST 1994 Copyright 1994, Texas Instruments Incorporated 2–1 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 Maximum Offset Voltage . . . 800 μV High Slew Rate . . . 2.9 V/μs Typ Low Input Bias Current . . . 2 pA Typ Very Low Power Consumption 13 mW Typ Output Short-Circuit Protection description The TL032 and TL032A dual operational amplifiers incorporate well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. These devices offer the significant advantages of Texas Instruments new enhanced-JFET process. This process affords not only low initial offset voltage due to the on-chip zener trim capability but also stable offset voltage over time and temperature. In comparison, traditional JFET processes are plagued by significant offset voltage drift. This new enhanced process still maintains the traditional JFET advantages of fast slew rates and low input bias and offset currents. These advantages coupled with low power consumption make the TL032 well suited for new state-of-the- art designs as well as existing design upgrades. The TL032 has been designed to be functionally compatible and pin compatible with the TL062. Two offset voltage grades are available: TL032 (1.5 mV max) and TL032A (800 μV max). A variety of available packaging options includes small-outline and chip-carrier versions for high- density system applications. AVAILABLE OPTIONS T V PACKAGE T A V IO max AT 25°C SMALL OUTLINE (D) CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) 0°C to 0.8 mV TL032ACD TL032ACP to 70°C 1.5 mV TL032CD TL032CP – 40°C to 0.8 mV TL032AID TL032AIP to 85°C 1.5 mV TL032ID TL032IP – 55°C to 0.8 mV TL032AMD TL032AMFK TL032AMJG TL032AMP to 125°C 1.5 mV TL032MD TL032MFK TL032MJG TL032MP The D packages are available taped and reeled. Add R suffix to device type (e.g., TL032CDR). PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 8 7 6 5 1OUT 1IN – 1IN + V CC – V CC + 2OUT 2IN – 2IN+ D, JG, OR P PACKAGE (TOP VIEW) 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 NC 2OUT NC 2IN – NC NC 1IN – NC 1IN+ NC FK PACKAGE (TOP VIEW) NC 1OUT NC NC NC NC 2IN+ NC CC – V NC – No internal connection CC + V – 900 0 Percentage of Amplifiers – % V IO – Input Offset Voltage – μV 900 15 – 600 – 300 0 300 600 3 6 9 12 DISTRIBUTION OF TL032A INPUT OFFSET VOLTAGE P Package T A = 25°C V CC± = ±15 V 1321 Amplifiers Tested From 1 Wafer Lot
Transcript
Page 1: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032A ENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERS SLOS033D – JULY 1988 – REVISED AUGUST 1994

Copyright 1994, Texas Instruments Incorporated

2–1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

• Maximum Offset Voltage . . . 800 µV

• High Slew Rat e . . . 2.9 V/µs Typ

• Low Input Bias Curren t . . . 2 pA Typ

• Very Low Power Consumption13 mW Typ

• Output Short-Circuit Protection

description

The TL032 and TL032A dual operationalamplifiers incorporate well-matched, high-voltageJFET and bipolar transistors in a monolithicintegrated circuit. These devices offer thesignificant advantages of Texas Instruments newenhanced-JFET process. This process affords notonly low initial offset voltage due to the on-chipzener trim capability but also stable offset voltageover time and temperature. In comparison,traditional JFET processes are plagued bysignificant offset voltage drift.

This new enhanced process still maintains thetraditional JFET advantages of fast slew rates andlow input bias and offset currents. Theseadvantages coupled with low power consumptionmake the TL032 well suited for new state-of-the-art designs as well as existing design upgrades.

The TL032 has been designed to be functionallycompatible and pin compatible with the TL062.Two offset voltage grades are available: TL032(1.5 mV max) and TL032A (800 µV max).

A variety of available packaging options includessmall-outline and chip-carrier versions for high-density system applications.

AVAILABLE OPTIONS

TV

PACKAGE

TAVIOmaxAT 25°C

SMALLOUTLINE

(D)

CHIPCARRIER

(FK)

CERAMICDIP(JG)

PLASTICDIP(P)

0°Cto

0.8 mV TL032ACD TL032ACPto

70°C

0.8 mV1.5 mV

TL032ACDTL032CD — —

TL032ACPTL032CP

– 40°Cto

0.8 mV TL032AID TL032AIPto

85°C

0.8 mV1.5 mV

TL032AIDTL032ID — —

TL032AIPTL032IP

– 55°Cto

0.8 mV TL032AMD TL032AMFK TL032AMJG TL032AMPto

125°C

0.8 mV1.5 mV

TL032AMDTL032MD

TL032AMFKTL032MFK

TL032AMJGTL032MJG

TL032AMPTL032MP

The D packages are available taped and reeled. Add R suffix to devicetype (e.g., TL032CDR).

PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.

1

2

3

4

8

7

6

5

1OUT1IN–1IN+

VCC –

VCC +2OUT2IN –2IN+

D, JG, OR P PACKAGE(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

NC2OUTNC2IN –NC

NC1IN –

NC1IN+

NC

FK PACKAGE(TOP VIEW)

NC

1OU

TN

C

NC

NC

NC

2IN

+N

C

CC

–V

NC – No internal connection

CC

+V

–9000

Per

cent

age

of A

mpl

ifier

s –

%

VIO – Input Offset Voltage – µV

900

15

–600 – 300 0 300 600

3

6

9

12

DISTRIBUTION OF TL032AINPUT OFFSET VOLTAGE

ÎÎÎÎÎÎÎÎÎÎP PackageÎÎÎÎÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎÎÎÎÎ

VCC± = ±15 V

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

1321 Amplifiers Tested From 1 Wafer Lot

Page 2: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

description (continued)

The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterizedfor operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full militarytemperature range of – 55°C to 125°C.

equivalent schematic (each amplifier)

Q15

R2

IN–

IN+

Q2

Q3

Q5

VCC+

Q14

Q6R4

Q8 Q10 R7

Q11

R6

Q12

R3

C1

Q9

Q7

Q4

R5R1

Q1

JF1 JF2

Q13

Q16R8

JF3 JF4

Q17

OUT

D1

VCC–

symbol (each amplifier)

+

–OUT

IN –

IN +

Page 3: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †

Supply voltage, VCC+ (see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage, VCC– (see Note 1) –18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differential input voltage (see Note 2) ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage, VI (any input) (see Notes 1 and 3) ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input current, II (each input) ±1 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current, IO (each output) ±40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current into VCC+ 160 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current out of VCC– 160 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Duration of short-circuit current at (or below) 25°C (see Note 4) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1 /16 inch) from case for 10 seconds: D or P package 260°C. . . . . . . . . . . . . . Lead temperature 1,6 mm (1 /16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+, and VCC–.2. Differential voltages are at IN+ with respect to IN–.3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded.

DISSIPATION RATING TABLE

PACKAGETA ≤ 25°C

POWER RATINGDERATING FACTORABOVE TA = 25°C

TA = 70°CPOWER RATING

TA = 85°CPOWER RATING

TA = 125°CPOWER RATING

D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW

FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW

JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW

P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW

recommended operating conditions

C SUFFIX I SUFFIX M SUFFIXUNIT

MIN MAX MIN MAX MIN MAXUNIT

Supply voltage, VCC ±5 ±15 ±5 ±15 ±5 ±15 V

Common mode input voltage VICVCC± = ±5 V –1.5 4 –1.5 4 –1.5 4

VCommon-mode input voltage, VICVCC± = ±15 V –11.5 14 –11.5 14 –11.5 14

V

Operating free-air temperature, TA 0 70 –40 85 –55 125 °C

Page 4: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

electrical characteristics at specified free-air temperature

PARAMETER TEST CONDITIONS †

TL032C, TL032AC

UNITPARAMETER TEST CONDITIONS TA† VCC± = ± 5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

V I ff l

V 0

TL032C25°C 0.69 3.5 0.57 1.5

VVIO Input offset voltage

V 0

TL032CFull range 4.5 2.5

mVVIO Input offset voltage

V 0

TL032AC25°C 0.53 2.8 0.39 0.8

mV

VO = 0

TL032ACFull range 3.8 1.8

αVIO

Temperature coefficient ofinput offset voltage

VO = 0,VIC = 0,RS = 50 Ω

TL032C 25°C to70°C

11.5 10.8

µV/°CαVIO input offset voltage(see Note 5)

RS 50 Ω

TL032AC 25°C to70°C

11.5 10.8 25

µV/°C

Input offset voltage long-term drift (see Note 6)

25°C 0.04 0.04 µV/mo

IIO Input offset currentVO = 0, VIC = 0, 25°C 1 100 1 100

pAIIO Input offset currentVO 0, VIC 0,See Figure 5 70°C 9 200 12 200

pA

IIB Input bias currentVO = 0, VIC = 0, 25°C 2 200 2 200

pAIIB Input bias currentVO 0, VIC 0,See Figure 5 70°C 50 400 80 400

pA

VICRCommon-mode input

25°C–1.5

to4

–3.4to

5.4

–11.5to14

–13.4to

15.4VVICR

Common mode inputvoltage range

Full range–1.5

to4

–11.5to14

V

VMaximum positive peak

R 10 kΩ

25°C 3 4.3 13 14

VVOM+Maximum positive peakoutput voltage swing

RL = 10 kΩ 0°C 3 4.2 13 14 VOM+ output voltage swing L70°C 3 4.3 13 14

VMaximum negative peak

R 10 kΩ

25°C –3 –4.2 –12.5 –13.9

VVOM–Maximum negative peakoutput voltage swing

RL = 10 kΩ 0°C –3 –4.1 –12.5 –13.9 VOM output voltage swing L70°C –3 –4.2 –12.5 –14

ALarge signal differential R 10 kΩ

25°C 4 12 5 14.3

V/ VAVDLarge-signal differentialvoltage amplification

RL = 10 kΩ,See Note 7

0°C 3 11.1 4 13.5 V/mVVD voltage amplification See Note 770°C 4 13.3 5 15.2

ri Input resistance 25°C 1012 1012 Ω

ci Input capacitance 25°C 5 14 pF

CMRRCommon mode V V min

25°C 70 87 75 94

dBCMRRCommon-moderejection ratio

VIC = VICRmin,VO = 0, R S = 50 Ω 0°C 70 87 75 94 dB

rejection ratio VO = 0, RS = 50 Ω70°C 70 87 75 94

kSupply voltage rejection V ±5 V to ±15 V

25°C 75 96 75 96

dBkSVRSupply-voltage rejectionratio (∆VCC± /∆VIO)

VCC± = ±5 V to ±15 V,VO = 0, R S = 50 Ω 0°C 75 96 75 96 dBSVR ratio (∆VCC± /∆VIO) VO = 0, RS = 50 Ω

70°C 75 96 75 96† Full range is 0°C to 70°C.NOTES: 5. This parameter is tested on a sample basis for the TL032A. For other test requirements, please contact the factory. This statement

has no bearing on testing or nontesting of other parameters.6. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated

to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.7. At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V.

Page 5: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

electrical characteristics at specified free-air temperature (continued)

PARAMETER TEST CONDITIONS

TL032C, TL032AC

UNITPARAMETER TEST CONDITIONS TA VCC± = ± 5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

PTotal power dissipation

V 0 N l d

25°C 3.8 5 13 17

WPDTotal power dissipation(two amplifiers)

VO = 0, No load 0°C 3.7 5 12.7 17 mWD (two amplifiers) O70°C 3.8 5 12.6 17

ICCSupply current

VO = 0 No load0°C 368 500 422 560

mAICCSupply current(two amplifiers)

VO = 0, No load70°C 378 500 420 560

mA

VO1/VO2 Crosstalk attenuation AVD = 100 dB 25°C 120 120 dB

operating characteristics at specified free-air temperature

PARAMETER TEST CONDITIONS T

TL032C, TL032AC

UNITPARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT

MIN TYP MAX MIN TYP MAX

SRPositive slew rate at unity

R 10 kΩ C 100 F

25°C 12 1.5 2.9

V/SR+Positive slew rate at unitygain

R 10 kΩ C 100 F

0°C 1.8 1 2.6 V/µsgain

RL = 10 kΩ, CL = 100 pF, 70°C 2.2 1.5 3.2

µ

SRNegative slew rate

RL 10 kΩ, CL 100 pF,See Figure 1 and Note 8 25°C 3.9 1.5 5.1

V/SR–Negative slew rateat unity gain

0°C 3.7 1.5 5 V/µsat unity gain

70°C 4 1.5 5

µ

Ri i

V 10 V

25°C 138 132

tr Rise time

V 10 V

0°C 134 127 nsr

V 10 V

70°C 150 142

F ll iVI(PP) = ±10 V, 25°C 138 132

tf Fall timeVI(PP) = ±10 V,RL = 10 kΩ, CL = 100 pF, 0°C 134 127 nsf L , L p ,See Figures 1 and 2 70°C 150 142

O h f

25°C 11% 5%

Overshoot factor 0°C 10% 4%

70°C 12% 6%

VE i l t i t TL032C

R 20 Ω

f = 10 Hz25°C

49 49

√Vn

Equivalent inputnoise voltage

TL032CRS = 20 Ω, f = 1 kHz

25°C41 41

nV/√HzVn noise voltage(see Note 9) TL032AC

RS 20 Ω,See Figure 3 f = 10 Hz

25°C49 49

nV/√Hz(see Note 9) TL032AC

f = 1 kHz25°C

41 41 60

InEquivalent input noise current

f = 1 kHz 25°C 0.003 0.003 pA/√Hz

B U i i b d id hV 10 mV R 10 kΩ

25°C 1 1.1

MHB1 Unity-gain bandwidthVI = 10 mV, RL = 10 kΩ,CL = 25 pF See Figure 4

0°C 1 1.1 MHz1 y gCL = 25 pF, See Figure 4

70°C 1 1

Ph i i iV 10 mV R 10 kΩ

25°C 61° 65°

φm Phase margin at unity gainVI = 10 mV, RL = 10 kΩ,CL = 25 pF See Figure 4

0°C 61° 65°φm g y gCL = 25 pF, See Figure 4

70°C 60° 64°NOTES: 8. For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.

9. This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearingon testing or nontesting of other parameters.

Page 6: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

electrical characteristics at specified free-air temperature

PARAMETER TEST CONDITIONS †

TL032I, TL032AI

UNITPARAMETER TEST CONDITIONS TA† VCC± = ±5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

V I ff l

V 0

TL032I25°C 0.69 3.5 0.57 1.5

VIO Input offset voltage

V 0

TL032IFull range 5.3 3.3

mVVIO Input offset voltage

V 0

TL032AI25°C 0.53 2.8 0.39 0.8

mV

VO = 0

TL032AIFull range 4.6 2.6

αVIO

Temperature coefficient ofinput offset voltage

VO = 0,VIC = 0,RS = 50 Ω

TL032I25°C to85°C 11.4 10.8

µV/°CαVIO input offset voltage(see Note 5)

RS 50 Ω

TL032AI25°C to85°C 11.4 10.8 25

µV/°C

Input offset voltage long-term drift (see Note 6)

25°C 0.04 0.04 µV/mo

IIO Input offset currentVO = 0, VIC = 0, 25°C 1 100 1 100 pA

IIO Input offset currentVO 0, VIC 0,See Figure 5 85°C 0.02 0.45 0.02 0.45 nA

IIB Input bias currentVO = 0, VIC = 0, 25°C 2 200 2 200 pA

IIB Input bias currentVO 0, VIC 0,See Figure 5 85°C 0.2 0.9 0.3 0.9 nA

VICRCommon-mode input

25°C–1.5

to4

–3.4to

5.4

–11.5to14

–13.4to

15.4VVICR

Common mode inputvoltage range

Full range–1.5

to4

–11.5to14

V

VMaximum positive peak

R 10 kΩ

25°C 3 4.3 13 14

VVOM+Maximum positive peakoutput voltage swing

RL = 10 kΩ –40°C 3 4.2 13 14 VOM+ output voltage swing L85°C 3 4.4 13 14

VMaximum negative peak

R 10 kΩ

25°C –3 –4.2 –12.5 –13.9

VVOM–Maximum negative peakoutput voltage swing

RL = 10 kΩ –40°C –3 –4.1 –12.5 –13.8 VOM output voltage swing L85°C –3 –4.2 –12.5 –14

AVD voltage amplificationRL = 10 kΩ, –40°C 3 8.4 4 11.6

V/mVAVD voltage amplificationRL 10 kΩ,See Note 7 85°C 4 13.5 5 15.3

V/mV

ri Input resistance 25°C 1012 1012 Ω

ci Input capacitance 25°C 5 4 pF

CMRRCommon mode V V min

25°C 70 87 75 94

dBCMRRCommon-moderejection ratio

VIC = VICRmin,VO = 0 RS = 50 Ω

–40°C 70 87 75 94 dBrejection ratio VO = 0, RS = 50 Ω

85°C 70 87 75 94

kSupply voltage rejection V ±5 V to ±15 V

25°C 75 96 75 96

dBkSVRSupply-voltage rejectionratio (∆VCC± /∆VIO)

VCC± = ±5 V to ±15 V,VO = 0 RS = 50 Ω

–40°C 75 96 75 96 dBSVR ratio (∆VCC± /∆VIO) VO = 0, RS = 50 Ω85°C 75 96 75 96

† Full range is –40°C to 85°C.NOTES: 5. This parameter is tested on a sample basis for the TL032A. For other test requirements, please contact the factory. This statement

has no bearing on testing or nontesting of other parameters.6. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated

to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.7. At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V.

Page 7: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

electrical characteristics at specified free-air temperature (continued)

PARAMETER TEST CONDITIONS

TL032I, TL032AI

UNITPARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

PTotal power dissipation

V 0 N l d

25°C 3.8 5 13 17

WPDTotal power dissipation(two amplifiers)

VO = 0, No load –40°C 2.9 5 10.9 17 mWD (two amplifiers) O85°C 3.7 5 12.4 17

ISupply current

V 0 N l d

25°C 384 500 434 560

AICCSupply current (two amplifiers)

VO = 0, No load –40°C 288 500 362 560 µACC (two amplifiers) O85°C 372 500 414 560

µ

VO1/VO2 Crosstalk attenuation AVD = 100 dB 25°C 120 120 dB

operating characteristics at specified free-air temperature

PARAMETER TEST CONDITIONS T

TL032I, TL032AI

UNITPARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

SRPositive slew rate at

R 10 kΩ C 100 F

25°C 2 1.5 2.9

V/SR+Positive slew rate atunity gain

R 10 kΩ C 100 F

–40°C 1.6 1 2.1 V/µsunity gain

RL = 10 kΩ, CL = 100 pF, 85°C 2.3 1.5 3.3

µ

SRNegative slew rate at

RL 10 kΩ, CL 100 pF,See Figure 1 and Note 8 25°C 3.9 1.5 5.1

V/SR–Negative slew rate atunity gain

–40°C 3.3 1.5 4.8 V/µsunity gain

85°C 4.1 1.5 4.9

µ

Ri i

V 10 V

25°C 138 132

tr Rise time

V 10 V

–40°C 132 123 nsr

V 10 V

85°C 154 146

F ll iVI(PP) = ±10 V, 25°C 138 132

tf Fall timeVI(PP) = ±10 V,RL = 10 kΩ, CL = 100 pF,S Fi 1 d 2

–40°C 132 123 nsf L LSee Figures 1 and 2 85°C 154 146

O h f

25°C 11% 5%

Overshoot factor –40°C 12% 5%

85°C 13% 7%

VE i l t i t TL032I

R 20 Ω

f = 10 Hz25°C

49 49

Vn

Equivalent inputnoise voltage

TL032IRS = 20 Ω, f = 1 kHz

25°C41 41

nV/√HzVn noise voltage(see Note 9) TL032AI

RS 20 Ω,See Figure 3 f = 10 Hz

25°C49 49

nV/√Hz(see Note 9) TL032AI

f = 1 kHz25°C

41 41 60

In Equivalent input noise current f = 1 kHz 25°C 0.003 0.003 pA/√Hz

B U i i b d id hV 10 mV R 10 kΩ

25°C 1 1.1

MHB1 Unity-gain bandwidthVI = 10 mV, RL = 10 kΩ,CL = 25 pF See Figure 4

–40°C 1 1.1 MHz1 y gCL = 25 pF, See Figure 4

85°C 0.9 1

Ph i i iV 10 mV R 10 kΩ

25°C 61° 65°

φm Phase margin at unity gainVI = 10 mV, RL = 10 kΩ,CL = 25 pF See Figure 4

–40°C 61° 65°φm g y gCL = 25 pF, See Figure 4

85°C 60° 64°NOTES: 8. For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.

9. This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearingon testing or nontesting of other parameters.

Page 8: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

electrical characteristics at specified free-air temperature

PARAMETER TEST CONDITIONS †

TL032M, TL032AM

UNITPARAMETER TEST CONDITIONS TA† VCC± = ±5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

V I ff l

V 0

TL032M25°C 0.69 3.5 0.57 1.5

VIO Input offset voltage

V 0

TL032MFull range 6.5 4.5

mVVIO Input offset voltage

V 0

TL032AM25°C 0.53 2.8 0.39 0.8

mV

VO = 0

TL032AMFull range 5.8 3.8

αVIOTemperature coefficient of

VO = 0,VIC = 0,RS = 50 Ω

TL032M25°C to125°C 9.7 9.7

µV/°CαVIOTemperature coefficient ofinput offset voltage

RS 50 Ω

TL032AM25°C to125°C 9.7 9.7

µV/°C

Input offset voltage long-term drift (see Note 6)

25°C 0.04 0.04 µV/mo

IIO Input offset currentVO = 0, VIC = 0, 25°C 1 100 1 100 pA

IIO Input offset currentVO 0, VIC 0,See Figure 5 125°C 0.2 10 0.2 10 nA

IIB Input bias currentVO = 0, VIC = 0, 25°C 2 200 2 200 pA

IIB Input bias currentVO 0, VIC 0,See Figure 5 125°C 7 20 8 20 nA

VICRCommon-mode input

25°C–1.5

to4

–3.4to

5.4

–11.5to14

–13.4to

15.4VVICR

Common mode inputvoltage range

Full range–1.5

to4

–11.5to14

V

VMaximum positive peak

R 10 kΩ

25°C 3 4.3 13 14

VVOM+Maximum positive peakoutput voltage swing

RL = 10 kΩ –55°C 3 4.1 13 14 VOM+ output voltage swing L125°C 3 4.4 13 14

VMaximum negative peak

R 10 kΩ

25°C –3 –4.2 –12.5 –13.9

VVOM–Maximum negative peakoutput voltage swing

RL = 10 kΩ –55°C –3 –4 –12.5 –13.8 VOM output voltage swing L125°C –3 –4.3 –12.5 –14

ALarge signal differential R 10 kΩ

25°C 4 12 5 14.3

V/ VAVDLarge-signal differentialvoltage amplification

RL = 10 kΩ,See Note 7

–55°C 3 7.1 4 10.4 V/mVVD voltage amplification See Note 7125°C 3 12.9 4 15

ri Input resistance 25°C 1012 1012 Ω

ci Input capacitance 25°C 5 4 pF

CMRRCommon mode V V min

25°C 70 87 75 94

dBCMRRCommon-moderejection ratio

VIC = VICRmin,VO = 0 RS = 50 Ω

–55°C 70 87 70 94 dBrejection ratio VO = 0, RS = 50 Ω

125°C 70 87 70 94

kSupply voltage rejection V ±5 V to ±15 V

25°C 75 96 75 96

dBkSVRSupply-voltage rejectionratio (∆VCC± /∆VIO)

VCC± = ±5 V to ±15 V,VO = 0 RS = 50 Ω

–55°C 75 95 75 95 dBSVR ratio (∆VCC± /∆VIO) VO = 0, RS = 50 Ω125°C 75 96 75 96

† Full range is –55°C to 125°C.NOTES: 6. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated

to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.7. At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V.

Page 9: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

electrical characteristics at specified free-air temperature (continued)

PARAMETER TEST CONDITIONS

TL032M, TL032AM

UNITPARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

PTotal power dissipation

V 0 N l d

25°C 3.8 5 13 17

WPDTotal power dissipation(two amplifiers)

VO = 0, No load –55°C 2.3 5 9.4 17 mWD (two amplifiers) O125°C 3.6 5 11.8 17

ISupply current

V 0 N l d

25°C 384 500 434 560

AICCSupply current (two amplifiers)

VO = 0, No load –55°C 228 500 312 560 µACC (two amplifiers) O125°C 356 500 394 560

µ

VO1/VO2 Crosstalk attenuation AVD = 100 dB 25°C 120 120 dB

operating characteristics at specified free-air temperature

PARAMETER TEST CONDITIONS T

TL032M, TL032AM

UNITPARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

SRPositive slew rate

R 10 kΩ

25°C 2 1.5 2.9

V/SR+Positive slew rateat unity gain R 10 kΩ

–55°C 1.4 1 1.9 V/µsat unity gain RL = 10 kΩ,

CL = 100 pF125°C 2.4 1 3.5

µ

SRNegative slew rate

CL = 100 pF,See Note 8 and Figure 1 25°C 3.9 1.5 5.1

V/SR–Negative slew rateat unity gain

See Note 8 and Figure 1–55°C 3.2 1 4.6 V/µs

at unity gain125°C 4.1 1 4.7

µ

Ri i

V 10 V

25°C 138 132

tr Rise time

V 10 V

–55°C 142 123 nsr

V 10 V125°C 166 58

F ll i

VI(PP) = ±10 V,R 10 kΩ

25°C 138 132

tf Fall time

( )RL = 10 kΩ,CL = 100 pF,

–55°C 142 123 nsf CL = 100 pF,See Figures 1 and 2 125°C 166 158

O h f

See Figures 1 and 225°C 11% 5%

Overshoot factor –55°C 16% 6%

125°C 14% 8%

VE i l i

TL032MR 20 Ω

f = 10 Hz25°C

49 49

√VnEquivalent input

TL032MRS = 20 Ω, f = 1 kHz

25°C41 41

nV/√HzVnEquivalent inputnoise voltage

TL032AM

RS 20 Ω,See Figure 3 f = 10 Hz

25°C49 49

nV/√Hz

TL032AMf = 1 kHz

25°C41 41

InEquivalent input noisecurrent

f = 1 kHz 25°C 0.003 0.003 pA/√Hz

B1 U i i b d id hV 10 mV R 10 kΩ

25°C 1 1.1

MHB1 Unity-gain bandwidthVI = 10 mV, RL = 10 kΩ,CL = 25 pF See Figure 4

–55°C 1 1.1 MHzy gCL = 25 pF, See Figure 4

125°C 0.9 0.9

Ph i i iV 10 mV R 10 kΩ

25°C 61° 65°

φm Phase margin at unity gainVI = 10 mV, RL = 10 kΩ,CL = 25 pF See Figure 4

–55°C 57° 64°φm g y gCL = 25 pF, See Figure 4

125°C 59° 62°NOTE: 8. For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.

Page 10: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

PARAMETER MEASUREMENT INFORMATION

VI

+

VCC+

VCC–

VO

CL(see Note A)

Overshoot

10%

90%

tr

RL

NOTE A: CL includes fixture capacitance.

Figure 1. Slew Rate, Rise/Fall Time,and Overshoot Test Circuit

Figure 2. Rise TIme and OvershootWaveform

(see Note A)

VCC–

VCC+

+

VO

CL

VO

VCC–

VCC+

+

RS RS

10 kΩ

RL

VI

10 kΩ

100 Ω

NOTE A: CL includes fixture capacitance.Figure 3. Noise-Voltage Test Circuit

Figure 4. Unity-Gain Bandwidth and Phase-Margin Test Circuit

+

VCC+

VCC–

Picoammeters

Ground Shield

Figure 5. Input-Bias and Offset-Current Test Circuit

Page 11: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–11POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

typical values

Typical values as presented in this data sheet represent the median (50% point) of device parametricperformance.

input bias and offset current

At the picoamp bias-current level typical of the TL032 and TL032A, accurate measurement of the bias currentbecomes difficult. Not only does this measurement require a picoammeter, but test socket leakages can easilyexceed the actual device bias currents. To accurately measure these small currents, Texas Instruments usesa two step process. The socket leakage is measured using picoammeters with bias voltages applied but withno device in the socket. The device is then inserted into the socket and a second test that measures both thesocket leakage and the device input bias current is performed. The two measurements are then subtractedalgebraically to determine the bias current of the device.

noise

Because of the increasing emphasis on low noise levels in many of today’s applications, the input noise voltagedensity is sample tested at f = 1 kHz. Texas Instruments also has additional noise testing capability to meetspecific application requirements. Please contact the factory for details.

Page 12: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

VIO Input offset voltage Distribution 6

αVIO Input offset voltage temperature coefficient Distribution 7

IIO Input offset current vs Free-air temperature 8

IIB Input bias currentvs Free-air temperaturevs Common-mode input voltage

89

VIC Common-mode input voltage rangevs Supply voltagevs Free-air temperature

1011

VO Output voltage vs Differential input voltage 12, 13

VOM Maximum peak output voltagevs Supply voltagevs Output currentvs Free-air temperature

1416, 1718, 19

VO(PP) Maximum peak-to-peak output voltage vs Frequency 15

AVD Large-signal differential voltage amplificationvs Load resistancevs Frequencyvs Free-air temperature

202122

zo Output impedance vs Frequency 23

CMRR Common-mode rejection ratiovs Frequencyvs Free-air temperature

24, 2526

kSVR Supply-voltage rejection ratio vs Free-air temperature 27

IOS Short-circuit output currentvs Supply voltagevs Timevs Free-air temperature

282930

Vn Equivalent input noise voltage vs Frequency 31

ICC Supply currentvs Supply voltagevs Free-air temperature

3233

SR Slew ratevs Load resistancevs Free-air temperature

34, 3536, 37

Overshoot factor vs Load capacitance 38

THD Total harmonic distortion vs Frequency 39

B1 Unity-gain bandwidthvs Supply voltagevs Free-air temperature

4041

φm Phase marginvs Supply voltagevs Load capacitancevs Free-air temperature

424344

Pulse responseSmall signal Large signal

4546, 47

Phase shift vs Frequency 21

Page 13: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–13POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

–1.20

Per

cent

age

of A

mpl

ifica

tion

– %

VIO – Input Offset Voltage – mV

12

–0.6 0 0.6 1.2

3

6

9

–400

Per

cent

age

of A

mpl

ifier

s –

%αVIO – Temperature Coefficient – µV/°C

40

30

5

10

15

20

25

–30 –20 –10 0 10 20 30

DISTRIBUTION OF TL032INPUT OFFSET VOLTAGE

DISTRIBUTION OF TL032INPUT OFFSET VOLTAGE

TEMPERATURE COEFFICIENT

TA = 25°CÎÎÎÎÎÎÎÎÎÎ

P Package

ÎÎÎÎÎÎÎÎÎÎ

VCC± = ±15 VÎÎÎÎÎÎÎÎÎÎÎÎÎ1681 Amplifiers Tested From 1 Wafer Lot

P Package

VCC± = ±15 VÎÎÎÎÎÎÎÎÎÎÎÎ160 Amplifiers Tested From 2 Wafer Lots

ÎÎÎÎÎÎÎÎÎÎÎÎ

TA = 25°C to 125°C

Figure 6 Figure 7

0.001

ÎÎÎÎ

IIO

25TA – Free-Air Temperature – °C

0.01

0.1

1

10

45 65 85 105 125–10

–15

IIB –

Inpu

t Bia

s C

urre

nt –

nA

VIC – Common-Mode Input Voltage – V

–5

0

5

10

–10 –5 0 5 10 15

TA = 25°CVCC± = ±15 V

INPUT BIAS CURRENT ANDINPUT OFFSET CURRENT

vsFREE-AIR TEMPERATURE

INPUT BIAS CURRENTvs

COMMON-MODE INPUT VOLTAGE

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 VVO = 0VIC = 0

IBI

ÎÎIIB

IIB a

nd II

O –

Inpu

t Bia

s an

d In

put O

ffset

Cur

rent

s –

nAIBI

I IO

Figure 8 Figure 9

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 14: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

–160

VIC

– C

omm

on-M

ode

Inpu

t Vol

tage

– V

|VCC± | – Supply Voltage – V

–12

–8

–4

0

4

8

12

16

2 4 6 8 10 12 14 16 1251007550250–25–50

20

15

10

5

0

–5

–10

–15

TA – Free-Air Temperature – °C–75

–20

TA = 25°C

ÎÎÎÎÎÎÎÎÎÎ

Positive Limit

ÎÎÎÎÎÎÎÎÎÎ

Negative Limit

VCC± = ±15 V

ÎÎÎÎÎÎÎÎÎÎ

Positive Limit

ÎÎÎÎÎÎÎÎÎÎ

Negative Limit

COMMON-MODEINPUT VOLTAGE RANGE LIMITS

vsSUPPLY VOLTAGE

COMMON-MODEINPUT VOLTAGE RANGE LIMITS

vsFREE-AIR TEMPERATURE

ÁÁÁÁV

IC

VIC

– C

omm

on-M

ode

Inpu

t Vol

tage

– V

ÁÁÁÁV

IC

Figure 10 Figure 11

–1.5–5

–1

0

0.5

1

1.5

–4 –3 –2 –1 0 1 2 3 4 5–1.5

–15

–1

–0.5

0

0.5

1

–10 –5 0 5 10

1.5

OUTPUT VOLTAGEvs

DIFFERENTIAL INPUT VOLTAGE

OUTPUT VOLTAGEvs

DIFFERENTIAL INPUT VOLTAGE

–0.5

15ÈÈÈÈRL = 5 kΩÈÈÈÈÈÈÈÈ

RL = 10 kΩ

ÈÈÈÈÈÈÈÈ

RL = 20 kΩÈÈÈÈRL = 50 kΩ

ÈÈÈÈÈÈÈÈ

RL = 5 kΩ

ÈÈÈÈRL = 10 kΩ

ÈÈÈÈRL = 20 kΩÈÈÈÈÈÈÈÈ

RL = 50 kΩ

ÎÎÎÎÎÎÎÎ

RL = 1 kΩÎÎÎÎÎÎÎÎ

RL = 2 kΩ

ÎÎÎÎRL = 5 kΩ

ÎÎÎÎRL = 10 kΩÎÎÎÎÎÎÎÎ

RL = 20 kΩ

VCC± = ± 5 VTA = 25°C

TA = 25°CVCC± = ±15 V

ÎÎÎÎÎÎ

RL = 1 kΩ

ÎÎÎÎÎÎ

RL = 2 kΩÎÎÎÎRL = 5 kΩ

ÎÎÎÎÎÎÎÎ

RL = 20 kΩ

ÎÎÎÎÎRL = 10 kΩ

– O

utpu

t Vol

tage

– V

VO

VID – Differential Input Voltage – VVID – Differential Input Voltage – V

– O

utpu

t Vol

tage

– V

VO

Figure 12 Figure 13

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 15: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–15POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

–160

VO

M –

Max

imum

Pea

k O

utpu

t Vol

tage

– V

|VCC± | – Supply Voltage – V

–8

–4

0

4

8

12

16

2 4 6 8 10 12 14 1601 k

VO

PP

– M

axim

um P

eak-

to-P

eak

Out

put V

olta

ge –

V

f – Frequency – Hz

5

10

15

20

25

30

10 k 100 k 1 M

TA = 25°CRL = 10 kΩ

ÎÎÎVOM–

VOM+

RL = 10 kΩ

TA = 125 °C

VCC± = ±15 V

TA = –55 °C

VCC± = ±5 V

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGEvs

FREQUENCY

MAXIMUM PEAK OUTPUT VOLTAGEvs

SUPPLY VOLTAGE

ÁÁÁÁV

OM

–12ÁÁÁÁÁÁÁÁÁ

V O(P

P)

F i gu re 14 F igure 15

|VO

M|

– M

ax

imu

m P

ea

k O

utp

ut

Vo

lta

ge

– V

00

00

| IO | – Outpu t Cur ren t – mA

1

2

3

4

5

5 10 15 20 5 10 15 20 25 30

2

4

6

8

10

12

14

16

VOM+

VOM–

VCC± = ±5 VTA = 25°C

ÎÎÎÎÎÎ

VOM+

VCC± = ±15 VTA = 25°C

MAXIMUM PEAK OUTPUT VOLTAGEvs

OUTPUT CURRENT

MAXIMUM PEAK OUTPUT VOLTAGEvs

OUTPUT CURRENT

ÁÁÁÁÁÁ

V OM

|VO

M| –

Max

imum

Pea

k O

utpu

t Vol

tage

– V

ÁÁÁÁÁÁÁÁÁ

V OM

| IO | – Output Current – mA

ÎÎÎÎVOM–

Figure 16 Figure 17

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 16: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

–5–75

VO

M –

Max

imum

Pea

k O

utpu

t Vol

tage

– V

TA – Free-Air Temperature – °C

–16

TA – Free-Air Temperature – °C

–4

–3

–2

–1

0

1

2

3

4

5

–50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125

–8

–4

0

4

8

12

16

VOM+

VOM–

VOM +

VOM–

MAXIMUM PEAK OUTPUT VOLTAGEvs

FREE-AIR TEMPERATURE

MAXIMUM PEAK OUTPUT VOLTAGEvs

FREE-AIR TEMPERATURE

ÁÁÁÁ

V OM

VO

M –

Max

imum

Pea

k O

utpu

t Vol

tage

– V

ÁÁÁÁ

V OM

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±5 VRL = 10 kΩ

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 VRL = 10 kΩ

–12

Figure 18 Figure 19

0.110

f – Frequency – Hz

0

RL – Load Resistance – Ω

105

104

103

102

10

15

10

15

20

25

30

35

40

10 k 100 k 1 M 100 1 k 10 k 100 k 1 M 10 M

30°

60°

90°

120°

150°

180°

Pha

se S

hift

VCC± = ±15 V

VCC± = ±5 V

ÎÎÎÎAVD

Phase Shift

VCC± = ±15 V

RL = 10 kΩCL = 25 pF

TA = 25°C

LARGE-SIGNAL DIFFERENTIALVOLTAGE AMPLIFICATION

vsLOAD RESISTANCE

LARGE-SIGNAL DIFFERENTIAL VOLTAGEAMPLIFICATION AND PHASE SHIFT

vsFREQUENCY

ÁÁÁÁÁÁÁÁ

TA = 25°CVO = ±1 V

AV

D –

Lar

ge-S

igna

l Diff

eren

tial

ÁÁÁÁÁÁ

AV

D Volta

ge A

mpl

ifica

tion

– V

/mV

AV

D –

Lar

ge-S

igna

l Diff

eren

tial

ÁÁÁÁÁÁ

AV

D Volta

ge A

mpl

ifica

tion

– V

/mV

Figure 20 Figure 21

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 17: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–17POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

–751

TA – Free-Air Temperature – °C125

50

– 50 – 25 0 25 50 75 100 1 k10

zo –

Out

put I

mpe

denc

e –

f – Frequency – Hz100 k

200

10

10 k

20

40

60

80

100

AVD = 100

AVD = 10

AVD = 1

VCC± = ±15 Vro (open loop) ≈ 250 Ω

VCC± = ±15 V

ÎÎÎÎÎÎÎÎÎÎRL = 10 kΩ

VCC± = ±5 V

LARGE-SIGNAL DIFFERENTIALVOLTAGE AMPLIFICATION

vsFREE-AIR TEMPERATURE

OUTPUT IMPEDANCEvs

FREQUENCY

ÁÁ

ΩÎÎÎÎ

TA = 25°C

ÁÁÁÁ

z o

AV

D –

Lar

ge-S

igna

l Diff

eren

tial

ÁÁÁÁÁÁ

AV

DVo

ltage

Am

plifi

catio

n –

V/m

V

Figure 22 Figure 23

100

CM

RR

– C

omm

on-M

ode

Rej

ectio

n R

atio

– d

B

f – Frequency – Hz10 M

100

100 1 k 10 k 100 k 1 M

10

20

30

40

50

60

70

80

90

100

f – Frequency – Hz10 M

100

100 1 k 10 k 100 k 1 M

10

20

30

40

50

60

70

80

90

VCC± = ±5 V

ÎÎÎÎTA = 25°C ÎÎÎÎÎTA = 25°CVCC± = ±15 V

COMMON-MODE REJECTION RATIOvs

FREQUENCY

COMMON-MODE REJECTION RATIOvs

FREQUENCY

CM

RR

– C

omm

on-M

ode

Rej

ectio

n R

atio

– d

B

Figure 24 Figure 25

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 18: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

–7575

CM

RR

– C

omm

on-M

ode

Rej

ectio

n R

atio

– d

B

TA – Free-Air Temperature – °C125

95

–50 –25 0 25 50 75 100

80

85

90

–7590

kSV

R –

Sup

ply-

Vol

tage

Rej

ectio

n R

atio

– d

B

TA – Free-Air Temperature – °C125

100

–50 –25 0 25 50 75 100

92

94

96

98

VCC± = ±15 V

VCC± = ±5 V

VCC± = ±5 V to ±15 V

COMMON-MODE REJECTION RATIOvs

FREE-AIR TEMPERATURE

SUPPLY-VOLTAGE REJECTION RATIOvs

FREE-AIR TEMPERATURE

SV

Rk

ÁÁÁÁÁÁÁÁÁÁÁÁ

VIC = VICR min

Figure 26 Figure 27

0–30

IOS

– S

hort

-Circ

uit O

utpu

t Cur

rent

– m

A

|VCC± | – Supply Voltage – V16

30

2 4 6 8 10 12 14

–20

–10

0

10

20

0–20

t – Time – s30

30

5 10 15 20 25

–10

0

10

20

VO = 0TA = 25°C

VID = 100 mV

VID = –100 mV

VID = –100 mV

VID = 100 mV

SHORT-CIRCUIT OUTPUT CURRENTvs

SUPPLY VOLAGE

SHORT-CIRCUIT OUTPUT CURRENTvs

TIME

ÁÁÁÁÁÁ

OS

I IOS

– S

hort

-Circ

uit O

utpu

t Cur

rent

– m

A

ÁÁÁÁÁÁ

OS

I ÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 VTA = 25°C

Figure 28 Figure 29

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 19: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–19POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

VO = 0

–75–25

IOS

– S

hort

-Circ

uit O

utpu

t Cur

rent

– m

A

TA – Free-Air Temperature – °C125

25

–50 –25 0 25 50 75 100

–20

–15

–10

–5

0

5

10

15

20

1030

Vn

– E

quiv

alen

t Inp

ut N

oise

Vol

tage

– n

VH

zf – Frequency – Hz

100 k

60VCC± = ±15 V

VCC± = ±5 V

VCC± = ±5 V

VCC± = ±15 V

50

40

100 1 k 10 k

SHORT-CIRCUIT OUTPUT CURRENTvs

FREE-AIR TEMPERATURE

EQUIVALENT INPUT NOISE VOLTAGEvs

FREQUENCY

ÁÁÁÁÁÁ

OS

I

Vn

ÁÁÁÁÁÁÁÁ

nV/

Hz ÁÁÁÁÁ

ÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 VRS = 20ΩTA = 25°CSee Figure 3

Figure 30 Figure 31

00

ICC

– S

uppl

y C

urre

nt –

A

|VCC± | – Supply Voltage – V16

500

2 4 6 8 10 12 14

100

200

300

400

–750

TA – Free-Air Temperature – °C125

500

–50 –25 0 25 50 75 100

100

200

300

400

TA = 25°C

TA = 125°C

TA = –55°C

VCC± = ±15 V

VCC± = ±5 V

SUPPLY CURRENTvs

SUPPLY VOLTAGE

SUPPLY CURRENTvs

FREE-AIR TEMPERATURE

ÁÁÁÁ

CC

IA

µ

ICC

– S

uppl

y C

urre

nt –

A

ÁÁÁÁ

CC

IA

µ

ÁÁÁÁÁÁÁÁÁÁÁÁ

VO = 0No Load

ÁÁÁÁÁÁÁÁÁÁÁÁ

VO = 0No Load

Figure 32 Figure 33

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 20: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

10

RL – Load Resistance – k Ω100

6

1

2

3

4

5

10 10

5

4

3

2

1

6

100RL – Load Resistance – k Ω

01

SR+

SR–

SR–

SR+

SLEW RATEvs

LOAD RESISTANCE

SLEW RATEvs

LOAD RESISTANCE

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±5 VCL = 100 pFTA = 25°CSee Figure 1

SR

– S

lew

Rat

e –

V/s

SR

– S

lew

Rat

e –

V/s

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁSee Figure 1

TA = 25°CCL = 100 pF

VCC± = ±15 V

Figure 34 Figure 35

–750

TA – Free-Air Temperature – °C125

6

–50 –25 0 25 50 75 100

1

2

3

4

5

–750

TA – Free-Air Temperature – °C125

6

–50 –25 0 25 50 75 100

1

2

3

4

5

SR–

SR+

SR–

SR+

SLEW RATEvs

FREE-AIR TEMPERATURE

SLEW RATEvs

FREE-AIR TEMPERATURE

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

See Figure 1

RL = 10 kΩCL = 100 pF

VCC± = ±5 V

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 V

CL = 100 pFRL = 10 kΩ

See Figure 1

SR

– S

lew

Rat

e –

V/s

SR

– S

lew

Rat

e –

V/s

Figure 36 Figure 37

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 21: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–21POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

00

Ove

rsho

ot F

acto

r –

%

CL – Load Capacitance – pF250

60

50 100 150 200

10

20

30

40

50

1000.1

TH

D –

Tot

al H

arm

onic

Dis

tort

ion

– %

f – Frequency – Hz100 k

0.5

0.2

0.3

0.4

VI(PP) = ±10 mVRL = 10 kΩTA = 25°CSee Figure 1

VCC± = ±5 V

VCC± = ±15 V

1 k 10 k

VCC± = ±15 VAVD = 1VO(rms) = 6 VTA = 25°C

OVERSHOOT FACTORvs

LOAD CAPACITANCE

TOTAL HARMONIC DISTORTIONvs

FREQUENCY

Figure 38 Figure 39

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

00.9

B1

– U

nity

-Gai

n B

andw

idth

– M

Hz

|VCC± | – Supply Voltage – V16

1.1

2 4 6 8 10 12 14

0.95

1

1.05

–750.8

TA – Free-Air Temperature – °C125

1.3

–50 –25 0 25 50 75 100

0.9

1

1.1

1.2

VCC± = ±15 V

VCC± = ±5 V

VI = 10 mVRL = 10 kΩCL = 25 pFSee Figure 4

UNITY-GAIN BANDWIDTHvs

SUPPLY VOLTAGE

UNITY-GAIN BANDWIDTHvs

FREE-AIR TEMPERATURE

VI = 10 mVRL = 10 kΩCL = 25 pFTA = 25°CSee Figure 4

B1

B1

– U

nity

-Gai

n B

andw

idth

– M

Hz

B1

Figure 40 Figure 41

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 22: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS †

057°

m –

Pha

se M

argi

n

| VCC± | – Supply Voltage – V

16

65°

2 4 6 8 10 12 14

59°

61°

63°

050°

CL – Load Capacitance – pF

100

70°

10 20 30 40 50 60 70 80 90

52°

54°

56°

58°

60°

62°

64°

66°

68°

PHASE MARGINvs

SUPPLY VOLTAGE

PHASE MARGINvs

LOAD CAPACITANCE

ÁÁÁÁ

φ m m –

Pha

se M

argi

n

ÁÁÁÁ

φ m

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VI = 10 mVRL = 10 kΩCL = 25 pF

See Figure 4

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VI = 10 mVRL = 10 kΩTA = 25°CSee Figure 4

m –

Pha

se M

argi

n

ÁÁÁÁ

φ m

TA = 25°C

ÎÎÎÎÎÎÎÎÎÎ

VCC± = ±5 V

NOTE A: Values of phase margin below a load capacitance of 25 pFwere estimated.

Figure 42

Figure 43

ÎÎÎÎÎÎÎÎ

and Note A

ÎÎÎÎÎÎÎÎÎÎVCC± = ±15 V

–16

VO

– O

utpu

t Vol

tage

– m

V

t – Time – µs1.4

16

0 0.2 0.4 0.6 0.8 1.0 1.2

–12

–8

–4

0

4

8

12

–7555°

TA – Free-Air Temperature – °C125

67°

–50 –25 0 25 50 75 100

57°

59°

61°

63°

65°

VCC± = ±5 V

VCC± = ±15 V

PHASE MARGINvs

FREE-AIR TEMPERATURE

VOLTAGE-FOLLOWERSMALL-SIGNAL

PULSE RESPONSE

m –

Pha

se M

argi

n

ÁÁÁÁ

ÁÁÁÁ

VOÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁSee Figure 4

CL = 25 pFRL = 10 kΩVI = 10 mV

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 VRL = 10 kΩCL = 100 pF

See Figure 1TA = 25°C

Figure 44 Figure 45

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

Page 23: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–23POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

TYPICAL CHARACTERISTICS

0

–6

–2

2

4

6

–2

VO

– O

utpu

t Vol

tage

– V

t – Time – µs8

2

0 1 2 3 4 5 6 7

0

1

0

–4

8

–8161412108642 18

t – Time – µs

VOLTAGE-FOLLOWERLARGE-SIGNAL

PULSE RESPONSE

VOLTAGE-FOLLOWERLARGE-SIGNAL

PULSE RESPONSE

ÁÁÁÁ

VO

VO

– O

utpu

t Vol

tage

– V

ÁÁÁÁ

VO

VCC± = ±5 VRL = 10 kΩCL = 100 pFTA = 25 °CSee Figure 1 See Figure 1

TA = 25 °CCL = 100 pFRL = 10 kΩVCC± = ±15 V

–1

Figure 46 Figure 47

APPLICATION INFORMATION

input characteristics

The TL032 and TL032A are specified with a minimum and a maximum input voltage that, if exceeded at eitherinput, could cause the device to malfunction. Because of the extremely high input impedance and resulting lowbias current requirements, the TL032 and TL032A are well suited for low-level signal processing; however,leakage currents on printed circuit boards and sockets can easily exceed bias current requirements and causedegradation in system performance. It is a good practice to include guard rings around inputs (see Figure 48).These guards should be driven from a low-impedance source at the same voltage level as the common-modeinput.

Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.

(c) UNITY-GAIN AMPLIFIER(b) INVERTING AMPLIFIER(a) NONINVERTING AMPLIFIER

VOVI

+

VIVO

VOVI

+

+

Figure 48. Use of Guard Rings

Page 24: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

APPLICATION INFORMATION

output characteristics

All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance.The TL032 and TL032A will drive higher capacitive loads; however, as the load capacitance increases, theresulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. Thevalue of the load capacitance at which oscillation occurs varies with production lots. If an application appearsto be sensitive to oscillation due to load capacitance, adding a small resistance in series with the load shouldalleviate the problem (see Figure 50). Capacitive loads of 1000 pF and larger may be driven if enough resistanceis added in series with the output (see Figure 49).

(a) CL = 100 pF, R = 0 (b) CL = 300 pF, R = 0 (c) CL = 350 pF, R = 0

(d) CL = 1000 pF, R = 0 (e) CL = 1000 pF, R = 50 Ω (f) CL = 1000 pF, R = 2 kΩ

Figure 49. Effect of Capacitive Loads

RVO

10 kΩ(see Note A)

CL

– 15 V

15 V

–5 V

5 V

+

NOTE A: CL includes fixture capacitance.

Figure 50. Test Circuit for Output Characteristics

Page 25: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–25POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

APPLICATION INFORMATION

high-Q notch filter

In general, Texas Instruments enhanced JFET operational amplifiers serve as excellent filters. This circuitprovides a narrow notch at a specific frequency. Notch filters are designed to eliminate frequencies that areinterfering with the operation of an application. For this filter, the center frequency can be calculated as:

fO 12R1C1

With the resistors and capacitors shown in Figure 51, the center frequency is 1 kHz. C1 = C3 = C2 + 2 and R1 = R3 = 2 x R2. The center frequency can be modified by varying these values. When adjusting the centerfrequency, be sure that the operational amplifier still has sufficient gain at the frequency required.

0.2– 8

Gai

n –

dB

f – Frequency – kHz2

2

0.4 0.6 0.8 1 0.2 0.4 0.6 0.8

– 7

– 6

– 5

– 4

– 3

– 2

– 1

0

1

+R1 R3

1.5 MΩ

C2220 pF

R2750 kΩ

C1 C3

110 pF 110 pF

1.5 MΩ

+15 V

–15 V

TL032

VOVI

Figure 51. High-Q Notch Filter

2-wire 4-mA to 20-mA current loop

Often information from an analog sensor must be sent over a distance to the receiving circuitry. For manyapplications, the most feasible method involves converting voltage information to a current before transmission.The following circuit benefits from the high input impedance of the TL032A since many inexpensive sensors donot have low output impedance.

Assuming that the voltage at the TL032A’s noninverting input is zero, the following equation determines theoutput current:

IO VI R3R1 x RS

5 V R3R2 x RS

0.16 x VI 4 mA

The current presently provides 4-mA to 20-mA output for an input voltage of 0 to 100 mV. By modifying R1, R2,and R3, the input voltage range or the output current range can be adjusted.

Page 26: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSETDUAL OPERATIONAL AMPLIFIERS

SLOS033D – JULY 1988 – REVISED AUGUST 1994

2–26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

APPLICATION INFORMATION

2-wire 4-mA to 20-mA current loop (continued)

Including the offset voltage of the operational amplifier in the following equation clearly illustrates why the lowoffset TL032A was chosen:

IO VI R3R1 x RS

5 V R3R2 x RS

– VIO R3R1 x RS

R3R2 x RS

R1RS

0.16 x VI 4 mA –0.17 x VIO

For example, an offset voltage of 1 mV decreases the output current by 0.17 mA.

Because of the low-power consumption of the TL032A, this circuit has at least 2 mA available to drive the actualsensor from the 5-V reference node.

10 µF

lO

TL032A–

+

IN

OUT

GND

LT1019-5

VCC+ = 10 V

LTC1044

R52N3904

1N4148

RS

100 Ω

RL 50 Ω

R45 kΩ

R380 kΩ

R1

5 kΩ

1 MΩR2 10 µF

2

34

8

5

3.3 kΩ

5 V Ref

VI

SignalCommon

Figure 52. 2-Wire 4-mA to 20-mA Current Loop

Page 27: TL032, TL032A ENHANCED-JFET LOW-POWER …docs-asia.electrocomponents.com/webdocs/0026/0900766b80026a24.pdfENHANCED-JFET LOW-POWER LOW-OFFSET DUAL OPERATIONAL AMPLIFIERS ... Texas Instruments

TL032, TL032AENHANCED-JFET LOW-POWER LOW-OFFSET

DUAL OPERATIONAL AMPLIFIERSSLOS033D – JULY 1988 – REVISED AUGUST 1994

2–27POST OFFICE BOX 655303 • DALLAS, TEXAS 75265POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

APPLICATION INFORMATION

low-level light detector preamplifier

Applications that need to detect small currents require high input-impedance operational amplifiers; otherwise,the bias currents of the operational amplifier camouflage the current being monitored. Phototransistors providea current that is proportional to the light reaching the transistor. The TL032 allows even the small currentsresulting from low-level light to be detected.

In Figure 53, if there is no light, the phototransistor is off and the output is high. As light is detected, theoperational amplifier output begins pulling low. Adjusting R4 both compensates for offset voltage of the amplifierand adjusts the point of light detection by the amplifier.

TL032

+

R6

10 kΩ

C1100 pF

R7

R3R1

TIL601

R2 5 kΩ

R5

R4

10 kΩ

10 kΩ

10 kΩ10 kΩ

10 kΩ

15 V

VO

–15 V

Figure 53. Low-Level Light Detector Preamplifier

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