DEVICE DESCRIPTION

The TRAC020 is the first universal Field

Programmable Analog Device (FPAD) and

provides a macro based solution to analog

design problems using a unique

mathematically based instruction set. Eight

mathematical functions can be configured in

up to 20 interconnected cells to facilitate the

design and configuration of any analog circuit

on-chip.

Configuration takes place digitally via the

integral CMOS shift register while the signal

remains within the analog domain at all times

avoiding sampling errors and processing

delay found in equivalent DSP solutions.

Performance is therefore equivalent to

traditional solutions utilising conventional

analog devices.

Configuration is readily achieved through

integration of the TRAC hardware and

software. Designs are produced graphically

using a simple, proprietary WindowsTM

‘drag

and drop’ user interface whilst simulation is

carried out directly and instantaneously

without leaving the design environment.

Configuration of the hardware is achieved

through a single mouse click to produce an

instant analog circuit on-chip.

APPLICATIONS

Any analog circuit can be produced using

TRAC. Typical examples include:

• Filters

• Multipliers

• VCOs

• PLLs

• Precision Voltage References

• Automatic Gain Control

• Frequency to Voltage conversion etc.

Features

• User programmable

• From design to silicon within the hour

• A low risk and fast route from concept to

silicon

• For maximum flexibility each cell I/O can

be connected externally

• The function of each cell can be digitally

programmed for LOG, ALOG, AUX, NON

INVERTING PASS, NEGATE, ADD,

RECTIFY and OFF

• The device can be programmed with a

standard EEPROM for non-microprocessor

applications.

• Device is offered in two package styles :-

Small 36 pin SSOP package

- production build

40 pin PDIP package

- prototype build

• The TRAC software and hardware fully

integrates design, simulation and

programming functions

• For complex circuits the chips can be

cascaded

• The device is fully reconfigurable

• High performance solution with signal

path in analog domain

• No sampling errors

• Real time signal processing

Ordering Information

PART

NUMBER

PACKAGE PART

MARK

TRAC020SS36 SSOP36 TRAC020

TRAC020D40 PDIP40 TRAC020

TOTALLY RECONFIGURABLE ANALOG

CIRCUIT

Issue 3 - April 1997

TRAC020

ABSOLUTE MAXIMUM RATINGS

Voltage on any pin = 7.5V (relative to VSS)

Current in any IO/A1,A2 = 10mA

Power = 925 mW (PDIP 40)

Power = 925 mW (SSOP 36)

Operating Temperature = -40 to 125°C

Storage Temperature = -55 to 125°C

GENERAL ELECTRICAL CHARACTERISTICS

Test Conditions: Temperature = 25 °C, VDD = +2.5V, VSS = -2.5V,

Operating Temperature Range = -40 to 85°C

Operating Voltage Range = ± 2.5V ± 5%

PARAMETER CONDITIONS MIN TYPICAL MAX

Bandwidth 20mV peak-peak 4.0 MHz

Dynamic Range 80 dB

Noise Voltage 38

nV/Hz0.5

Total Harmonic Distortion 100mV peak-peak

1.0 V peak-peak

0.02%

0.08%

Intermodulation Distortion < 0.1%

Supply Rejection 60dB

Cell to cell crosstalk >60dB

Input common mode range

A1,A2

VDD

-1.0V,

VSS+1.5V

Output Swing ±1V

Supply Current All cells on 17mA 25mA 33mA

TRAC020

FUNCTION PARAMETER CONDITIONS MIN TYPICAL MAX

Non

Inverting

Pass

Internal Gain (IO/IO) VIO = ±100mV 0.9987 0.9997 1.00

External Gain (A1,A2) VIO = ±100mV 0.9971 0.9991 1.00

External Gain (IO5,6,15,16) VIO = ±100mV 0.9962 0.9982 1.00

External Gain (remaining cells) VIO = ±100mV 0.9948 0.9968 0.9988

Input Resistance (A1, A2) 3.4kΩ 4.3kΩ 5.2kΩ

Input Resistance (IO) 1.6kΩ 2kΩ 2.4kΩ

External Offset VIO = 0mV -3mV 0.14mV +3mV

Negate Internal Gain (VIO /VIO) VA1 = ±100mV -1.01 -1.00 -0.99

External Gain (VIO/VIO) VA1 = ±100mV -1.0073 -0.9973 -0.9873

Input Resistance (A1,A2) 3.4kΩ 4.3kΩ 5.2kΩ

Input Resistance (IO) 1.6kΩ 2kΩ 2.4kΩ

External Offset VIO = 0mV -8mV -1.6mV +5mV

Add Internal V IO/ (VIO+VIO) VA1=VA2 =±100mV -1.01 -1.00 -0.99

External V IO/ (VIO+VIO) VA1=VA2 =±100mV -1.006 -0.996 -0.986

Input Resistance (A1, A2) 3.4kΩ 4.3kΩ 5.2kΩ

Input Resistance (IO) 1.6kΩ 2kΩ 2.4kΩ

External Offset VIO = 0mV -10mV -2.4mV +6mV

Log Output Voltage VA1 =±488mV

VA1 =±244mV

±736 mV

±718 mV

Input Resistance (A1, A2) 4.2kΩ 5.3kΩ 6.4kΩ

Input Resistance (IO) 1.7kΩ 2.1kΩ 2.5kΩ

Auxiliary Gain RF = RS =2 kΩ,

Vin = ± 100 mV

-0.9995 -0.9975 -0.9955

Open Loop

(IO1-9/11-19)

(IO10,20)

Vin = +50mV

Vin = -50mV

Vin = -50mV

-1.8v

+1V

+1.7 V

-1.55V

+1.33V

+2.1V

-1.2V

+1.6V

+2.5V

Alog Output Voltage VA1 = ±736mV

VA1 = ±718mV

±488mV

± 244mV

ELECTRICAL CHARACTERISTICS OF THE CELL Test Conditions: Temperature = 25°C, VDD=+2.5V, VSS=-2.5V

TRAC020

FUNCTION PARAMETER CONDITIONS MIN TYPICAL MAX

REC Output Voltage VA1 = −736mV,

VA1 = −718mV

+ 488mV

+ 244mV

Off Output Voltage

Attenuation (IO 10,20)

(remaining cells)

VIO = ± 100mV

VIO =± 100mV

100:1

130:1

130:1

220:1

LOG/ALOG Gain Vin= ±244 mV -0.973

LOG/REC Ratio (Vo/Vin) Vin= +244 mV 0.88

ELECTRICAL CHARACTERISTICS OF THE LOGIC FUNCTIONS for VDD-VSS=5.0V

FUNCTION COMMENT VALUE

CMOS level ViL Low level input voltage (for all logic pins) VSS +1.5V

CMOS level ViH High level input voltage (for all logic pins) VDD -1.5V

Maximum Clock Speed Standard CMOS levels 1.0 MHz

ELECTRICAL CHARACTERISTICS OF THE CELL (continued)Test Conditions: Temperature = 25°C, VDD=+2.5V, VSS=-2.5V

TRAC020

TRAC020

-40 -20 0 20 40 60 80 1000

1k

2k

3k

4k

5k

Temperature (°C)

A1, A2

I/O

ADD Input Resistance

Inp

ut

Resis

tan

ce

(Ω

)

-40 -20 0 20 40 60 80 100

Temperature (°C)

0

-1

-2

-3

-4

-5

-6

Vin= 0mV

Off

se

t V

olt

ag

e (

mV

)

ADD Offset Voltage

-40 -20 0 20 40 60 80 100

0.4

0.2

0.0

-0.2

-0.4

-0.6

-0.8

-1.0

Temperature (°C)

External

Internal

ADD Gain Error

Ga

in E

rro

r (%

)

Vin= +/-100mV

-40 -20 0 20 40 60 80 100

0

100

200

300

400

500

600

700

800

900

Temperature (°C)

Vin=-244mV

Vin=-488mV

LOG Output Voltage

Ou

tpu

t V

olt

ag

e (

mV

)

-40 -20 0 20 40 60 80 100-900

-800

-700

-600

-500

-400

-300

-200

-100

0

Temperature (°C)

Vin=+244mV

Vin=+488mV

LOG Output Voltage

Ou

tpu

t V

olt

ag

e (

mV

)

-40 -20 0 20 40 60 80 100

0

1k

2k

3k

4k

5k

6k

Temperature (°C)

A1, A2

I/O

LOG Input Resistance

Inp

ut

resis

tan

ce (

Ω)

TYPICAL CHARACTERISTICS

TRAC020

-40 -20 0 20 40 60 80 100

Temperature (°C)

0

-0.05

-0.10

-0.15

-0.20

-0.25

-0.30

-0.35

-0.40

-0.45

INT

EX2

EX1

EX3

INT= All Cells, Internal

EX1= A1,A2, External

EX2= I/O 5,6,15,16, External

EX3= Remaining Cells, External

Vin= +/-100mV

NIP Gain Error

Ga

in E

rro

r (%

)

-40 -20 0 20 40 60 80 1000

1k

2k

3k

4k

5k

6k

Temperature (°C)

A1, A2

I/O

NIP Input ResistanceIn

pu

t R

esis

tan

ce

(Ω

)

-40 -20 0 20 40 60 80 100

-1.6

-1.2

-0.8

-.04

0

0.4

Temperature (°C)

NIP Offset Voltage

Off

se

t V

olt

ag

e (

mV

)

Vin= 0mV

-40 -20 0 20 40 60 80 100

Temperature (°C)

0.4

0.2

0.0

-0.2

-0.4

-0.6

-0.8

Internal

External

Vin= +/-100mV

Ga

in E

rro

r (%

)

NEG Gain Error

-40 -20 0 20 40 60 80 100

0

1k

2k

3k

4k

5k

Temperature (°C)

I/O

A1, A2

NEG Input Resistance

Inp

ut

Re

sis

tan

ce

(Ω

)

-40 -20 0 20 40 60 80 100

-5

-4

-3

-2

-1

0

Temperature (°C)

NEG Offset Voltage

Off

se

t V

olt

ag

e (

mV

)

Vin= 0mV

TYPICAL CHARACTERISTICS

TRAC020

-40 -20 0 20 40 60 80 100

Temperature (°C)

0.0

-0.2

-0.4

-0.6

-0.8

-1.0

-1.2

-1.4

-1.6

-1.8

Ou

tpu

t V

olt

ag

e (

V)

Vin=+50mV

AUX Open Loop

-40 -20 0 20 40 60 80 100

Temperature (°C)

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

Ou

tpu

t V

olt

ag

e (

V)

AUX Open Loop

Vin=-50mV

-40 -20 0 20 40 60 80 100

Temperature (°C)

0.0

-0.1

-0.2

-0.3

-0.4

-0.5

-0.6

Ga

in E

rro

r (%

)

AUX Closed Loop

RF=RS=2k

-40 -20 0 20 40 60 80 100

Temperature (°C)

250

200

150

100

50

0

Att

en

ua

tio

n R

ati

o

OFF (voltage Attenuation)

Vin= +/-100mV

-40 -20 0 20 40 60 80 100

0

-1

-2

-3

-4

-5

-6

-7

-8

Temperature (°C)

Ga

in E

rro

r (%

)

Vin= +/- 244mV

LOG\ALOG Gain Error

-40 -20 0 20 40 60 80 100

Temperature (°C)

LOG\REC Output Ratio

0.95

0.90

0.85

0.80

0.75

0.70

0.65

0.60

0.55

0.50

Vo

/Vin

Vin= +244mV

TYPICAL CHARACTERISTICS

TRAC020TRAC020

SCHEMATIC DIAGRAM

TRAC020

DESCRIPTION OF PIN FUNCTIONS

DATA Serial programming data is input to the TRAC via this pin. All 20 TRAC cells contain

a 3-bit shift register that allows each cell to be programmed to the required individual

analog function.

RESET Active low - This pin resets all on-chip shift registers to the logic zero state, this sets

all 20 TRAC cells to the OFF function. This pin should be held high while the TRAC

device is being programmed and the analog functions are in use.

CLOCK Used to clock in the serial data to program the TRAC device. The on-chip shift registers

are positive edge triggered.

DOUT This pin is the serial data output from cell 20 on the TRAC device. This is used for

validation of programming of the TRAC device. This pin also allows two or more

TRAC devices to be connected in a serial architecture. This is done by connecting the

DOUT pin of the first TRAC device to the DATA pin of the second TRAC device.

IO1..IO20 These are the analog inputs / outputs from cells 1 to 20 respectively.

A1/A2 These are the analog inputs from cells 1 and 11 respectively.

SOR Supply On Reset. For all 20 cells on the TRAC device to be in the OFF state when

power is first applied, connect the SOR pin to the RESET pin. If required the SOR pin

can be left unconnected and the TRAC devices can be reset from an external source

on power-up.

CLCR Clock Clear. When the TRAC device is used in stand alone applications CLCR is used

as a control pin. It allows the downloading circuitry to be switched off when the

programming serial data from the EEPROM is complete.

CLCRNOT Clock Clear Not. This pin is not used.

CELL FUNCTION DETAILS

ADD (code 011)

Can be represented as an operational

amplifier with three resistors of equal value R.

The virtual earth at the inverting input gives:-

Eo = -R(Ea/R + Eb/R) = - (Ea + Eb)

The output is the inverted sum of the input

voltages.

NEGATE (code 010)

The negate function is provided by an adder,

but with only one input, therefore Eo=-Eb

NON INVERTING PASS (code 100)

Used for topological reasons. It provides a

route through the cell with no modification. i.e.

a unity gain amplifier

LOG (code 110)

Can be represented as an operational

amplifier with a pair of back to back diodes in

the negative feedback loop and an input

resistor R. The virtual earth at the inverting

input gives:-

Eo = -kT/q log (Ea/RIo + 1)

where

k = Boltzmann’s constant

T = absolute temperature

q = electron charge

Io=saturation current

TRAC020

ANTI - LOG (code 101)

Similar to the log circuit except that the diodes

and resistors are reversed. The output voltage

is therfore given as :-

Eo = -RIo (exp qEa/KT - 1)

When the signal is processed through both log

and anti-log the magnitude of the saturation

current and absolute temperature cancel.

CELL FUNCTION DETAILS (Continued)

RECTIFIER (code 111)

Similar to the anti-log function except that one

of the diodes is removed so that a positive

input gives zero output.

AUX (code 001)

As for an operational amplifier external

components are used to provide the following

functions:

Amplification

Attenuation

Differentiation

Integration

OFF (code 000)

In the off condition there is no signal path

through the cell.

TRAC020

CONNECTION DIAGRAMS

SSOP 36 Lead

TOP VIEW

(NOT TO SCALE)

PDIP 40 Lead

TOP VIEW

(NOT TO SCALE)

TRAC020

A

CB

J

DPIN No. 1

F

.13(

.005

)0

H

K

I

E

TRAC020

PACKAGING INFORMATION

SY

MB

OL

MIN MAXMM INCHES MM INCHES

ABCD

F

H

JK

PDIP 40 PIN

52.07 mm 2.050 INCHES2.54 mm 0.100 INCHES0,46 mm 0.018 INCHES1.27 mm 0.050 INCHES

D1

E1

1.91 mm 0.075 INCHES

13.72 mm 0.540 INCHES3.81mm 0.150 INCHES

0.25mm 0.010 INCHES

3.18 mm 0.125 INCHES

E 15.11 15.75

G

I 15.75 17.02

1.140.51

0.600 0.600

0.620 0.670

0.020 0.045

7° NOMINAL

SY

MB

OL SSOP 36 LEAD

MIN MAXMM INCHES MM INCHES

ABCDEFHIJK

15.20

0.297.42.44

0.2310.11

0° 8°

0.8MM .031 INCHES BSC0.85MM .033 INCHES REF

7 NOMINAL

.598

.011

.291

.096

.0091

.398

15.40

0.397.602.64

0.3210.51

.606

.015

.299

.104

.0125

.414

0

A

BC DI

F

KJ

D1E

E1

H

G

PIN 1

ALL ROUNDTOP BOTTOM

Zetex plc. Fields New Road, Chadderton, Oldham, OL9-8NP, United Kingdom. Telephone: (44)161-627 5105 (Sales), (44)161-627 4963 (General Enquiries) Facsimile: (44)161-627 5467

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