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Track Trigger Meeting 3/ 23/10

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Track Trigger Meeting 3/ 23/10. Chip Schedule: 2D wafers complete fab ~ April 30 – available for single –tier functional testing 3D wafers complete fab ~ May 28 - PowerPoint PPT Presentation
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Track Trigger Meeting 3/23/10 Chip Schedule: 2D wafers complete fab~ April 30 – available for single –tier functional testing 3D wafers complete fab ~ May 28 Diced parts and full wafers June – Sent to Ziptronix for oxide bonding of a handle wafer, then back to Tezzaron for exposure of bottom TSVs. Sensor wafers available early July • Topography and flatness checked at Ziptronix • Backside protection • Test of topside tungsten deposition and CMP Phone conference next week with Ziptronix to discuss plans Volunteers for chip testing work?
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Page 1: Track Trigger Meeting  3/ 23/10

Track Trigger Meeting 3/23/10

• Chip Schedule:– 2D wafers complete fab~ April 30 – available for single –tier

functional testing– 3D wafers complete fab ~ May 28– Diced parts and full wafers June – Sent to Ziptronix for oxide

bonding of a handle wafer, then back to Tezzaron for exposure of bottom TSVs.

– Sensor wafers available early July• Topography and flatness checked at Ziptronix• Backside protection• Test of topside tungsten deposition and CMP

• Phone conference next week with Ziptronix to discuss plans• Volunteers for chip testing work?

Page 2: Track Trigger Meeting  3/ 23/10

Short Strip TierLong Strip Tier

VICTR Chip

Can be used to estimate areas needed on final chip

Page 3: Track Trigger Meeting  3/ 23/10

Pad Structure

Page 4: Track Trigger Meeting  3/ 23/10

Kapton-based Interposer

• A preliminary project description has been written and sent to one vendor

• The goals include:– Develop a low-mass layup which is

sufficiently planar (<100 microns bow) to allow bump bonding on both sides over the full area.

– Minimum mass, either using low mass materials or by removing unneeded material.

– Contains embedded capacitance.– Provides a flex circuit “tail” for connection

to optical drivers about 5 cm away. – Provides through vias to measure load

capacitance and crosstalk.

Approach Endicott, Compunetics Cyrexx

Page 5: Track Trigger Meeting  3/ 23/10

Interposer Strategy

1. Development of a full-size technology demonstration board which would be used for mounting dummy chips and developing bump-bonding techniques. This board would provide a platform to demonstrate a low-mass interposer with the appropriate interconnectivity.– We probably need to develop a full candidate layout

of either a full or VICTR 2 interposer including bussing for vendors

– Guess at pinout and numbers of bus lines 2. Production of a direct interconnection interposer for

the VIP-1 chip. 3. Production of a direct interconnection interposer for

the VIP-2 chip.4. Final product – full sized fully functional

Page 6: Track Trigger Meeting  3/ 23/10

Proposed On-chip Logic Diagram

Page 7: Track Trigger Meeting  3/ 23/10

Proposal for VICTR II

Page 8: Track Trigger Meeting  3/ 23/10

2nd Submission Plan

Dec 2010 ?

Page 9: Track Trigger Meeting  3/ 23/10

Meetings• Upgrade Week (April 26-30) Presentations

– Simulation– Mass Budget– Module Design– Interposer?– Trigger Architecture– Mechanics and cooling

• US CMS (May 6-8)• Workshop in Elba (May 24-28) – detailed discussions of

CMS upgrade plans in light of revised machine plans.• Address issues and objections:

– Detector mass– Yield and chip size– Functionality

• Increase breadth of the collaboration


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