34
TRADE-OFFS IN ANALOG CIRCUIT DESIGN The Designer’s Companion
TRADE-OFFS IN ANALOG CIRCUIT DESIGNThe Designer’s Companion
Trade-Offs in AnalogCircuit Design
The Designer’s Companion
Edited by
Chris ToumazouImperial College, UK
George MoschytzETH-Zentrum, Switzerland
and
Barrie GilbertAnalog Devices, USA
Editing AssistanceGanesh Kathiresan
KLUWER ACADEMIC PUBLISHERSNEW YORK, BOSTON, DORDRECHT, LONDON, MOSCOW
eBook ISBN: 0-306-47673-8Print ISBN: 1-4020-7037-3
©2002 Kluwer Academic PublishersNew York, Boston, Dordrecht, London, Moscow
Print ©2002 Kluwer Academic Publishers
All rights reserved
No part of this eBook may be reproduced or transmitted in any form or by any means, electronic,mechanical, recording, or otherwise, without written consent from the Publisher
Created in the United States of America
Visit Kluwer Online at: http://kluweronline.comand Kluwer's eBookstore at: http://ebooks.kluweronline.com
Dordrecht
Contents
ForewordList of Contributors
xxiiixxix
Design Methodology
Intuitive Analog Circuit DesignChris Toumazou
Mass-Production of Microdevices2.1.1 Present ObjectivesUnique Challenges of Analog Design2.2.1 Analog is NewtonianDesigning with Manufacture in Mind2.3.1 Conflicts and Compromises2.3.2 Coping with Sensitivities: DAPs, TAPs and STMsRobustness, Optimization and Trade-Offs2.4.1 Choice of Architecture2.4.2 Choice of Technology and Topology2.4.3 Remedies for Non-Robust Practices2.4.4 Turning the Tables on a Non-Robust Circuit: A Case StudyHolistic optimization of the LNAA further example of biasing synergy2.4.5 Robustness in Voltage References2.4.6 The Cost of RobustnessToward Design Mastery2.5.1 First, the Finale2.5.2 Consider All Deliverables2.5.3 Design Compression2.5.4 Fundamentals before Finesse2.5.5 Re-Utilization of Proven Cells2.5.6 Try to Break Your Circuits2.5.7 Use Corner Modeling Judiciously2.5.8 Use Large-Signal Time-Domain Methods2.5.9 Use Back-Annotation of Parasitics2.5.10 Make Your Intentions Clear2.5.11 Dubious Value of Check Lists2.5.12 Use the “Ten Things That Will Fail” TestConclusion
1
126
7
79
Design for ManufactureBarrie Gilbert
1
1.11.2
IntroductionThe Analog Dilemma
References
2
2.1
2.2
2.3
2.4
2.5
2.6
11131415162225273234394450545556575861626364686869707273
v
vi Contents
General Performance
3Trade-Offs in CMOS VLSI CircuitsAndrey V. Mezhiba and Eby G. Friedman
75
3.13.2
3.3
3.4
3.53.6
3.7
AreaSpeedPowerDesign ProductivityTestabilityReliabilityNoise TolerancePackagingGeneral Considerations
Power dissipation in CMOS VLSI circuitsTechnology scalingVLSI design methodologiesStructural Level3.3.1 Parallel Architecture3.3.2 PipeliningCircuit Level3.4.1 Static versus Dynamic3.4.2 Transistor Sizing3.4.3 Tapered BuffersPhysical LevelProcess Level3.6.1 Scaling3.6.2 Threshold Voltage3.6.3 Power Supply3.6.4 Improved Interconnect and Dielectric MaterialsFuture Trends
75787879798081818283838485868687888990919599
102103103103104104107108
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115115116116117117118118119
GlossaryReferences
4Floating-gate Circuits and SystemsTor Sverre Lande
4.14.2
4.3UV-conductanceFowler–Nordheim TunnelingHot Carrier Injection
IntroductionDesign Criteria3.2.13.2.23.2.33.2.43.2.53.2.63.2.73.2.83.2.9
IntroductionDevice Physics4.2.14.2.24.2.3Programming4.3.14.3.24.3.3
Contents vii
4.4
4.5
4.64.7
Circuit Elements4.4.1 Programming CircuitsInter-poly tunnelingExample: Floating-gate on-chip knobsInter-poly UV-programmingMOS-transistor UV-conductanceExample: MOS transistor threshold tuningCombined programming techniquesExample: Single transistor synapseHigh-voltage driversFGMOS Circuits and Systems4.5.1 Autozero Floating-Gate Amplifier4.5.2 Low-power/Low-voltage Rail-to-Rail Circuits Using FGUVMOSDigital FGUVMOS circuitsLow-voltage rail-to-rail FGUVMOS amplifier4.5.3 Adaptive Retina4.5.4 Other CircuitsRetentionConcluding Remarks
References
5
119120120121121122123124126127128128130130130132134134134135
139
139140140141142143144146147148150151152153155155156157157159163164
Bandgap Reference DesignArie van Staveren, Michiel H. L. Kouwenhoven, Wouter A. Serdijn and ChrisJ. M. Verhoeven
5.15.25.35.45.5
5.65.75.8
5.9
5.10
5.11
IntroductionThe Basic FunctionTemperature Behavior ofGeneral Temperature CompensationA Linear Combination of Base–Emitter Voltages5.5.1 First-Order Compensation5.5.2 Second-Order CompensationThe Key ParametersTemperature-Dependent ResistorsNoise5.8.1 Noise of the Idealized Bandgap Reference5.8.2 Noise of a First-Order Compensated Reference5.8.3 Noise of a Second-Order Compensated Reference5.8.4 Power-Supply RejectionSimplified Structures5.9.1 First-Order Compensated Reference5.9.2 Second-Order Compensated ReferenceDesign Example5.10.1 First-Order Compensated Bandgap Reference5.10.2 Second-Order Compensated Bandgap ReferenceConclusions
References
viii Contents
6Generalized Feedback Circuit AnalysisScott K. Burgess and John Choma, Jr.
6.16.2
6.3
IntroductionFundamental Properties of Feedback Loops6.2.1 Open Loop System Architecture and Parameters6.2.2 Closed Loop System Parameters6.2.3 Phase Margin6.2.4 Settling TimeCircuit Partitioning6.3.1 Generalized Circuit Transfer Function6.3.2 Generalized Driving Point I/O Impedances6.3.3 Special Controlling/Controlled Port CasesControlling feedback variable is the circuit output variableGlobal feedbackControlling feedback variable is the branch variable of the controlled port
References
169
169171171173176179182183189191192193195204
7Analog Amplifiers Architectures: Gain Bandwidth Trade-OffsAlison J. Burdett and Chris Toumazou
7.17.2
7.3
7.4
7.57.6
IntroductionEarly Concepts in Amplifier Theory7.2.1 The Ideal Amplifier7.2.2 Reciprocity and Adjoint Networks7.2.3 The Ideal Amplifier SetPractical Amplifier Implementations7.3.1 Voltage Op-Amps7.3.2 Breaking the Gain–Bandwidth ConflictCurrent-feedback op-ampsFollower-based amplifiersCurrent-conveyor amplifiers7.3.3 Producing a Controlled Output CurrentClosed-Loop Amplifier Performance7.4.1 Ideal Amplifiers7.4.2 Real AmplifiersSource and Load IsolationConclusions
References
207
207208208209210211211213213214214215217217218222224225
8Noise, Gain and Bandwidth in Analog DesignRobert G. Meyer
8.1
8.2
8.3
Gain–Bandwidth Concepts8.1.1 Gain–Bandwidth Shrinkage8.1.2 Gain–Bandwidth Trade-Offs Using InductorsDevice Noise Representation8.2.1 Effect of Inductors on Noise PerformanceTrade-Offs in Noise and Gain–Bandwidth
227
227230232234238240
Contents ix
8.3.1
8.3.2
8.3.3
Methods of Trading Gain for Bandwidth and the Associated NoisePerformance Implications [8]The Use of Single-Stage Feedback for the Noise-Gain–BandwidthTrade-OffUse of Multi-Stage Feedback to Trade-Off Gain, Bandwidth andNoise Performance
240
243
248255
257
257258260260261263265268270272275277277278281281
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283284284286288292295297299299300301301302303303306
References
9Frequency CompensationArie van Staveren, Michiel H. L. Kouwenhoven, Wouter A. Serdijn and Chris J. M.Verhoeven
9.19.29.39.4
9.5
9.69.79.8
IntroductionDesign ObjectiveThe Asymptotic-Gain ModelThe Maximum Attainable Bandwidth9.4.1 The LP Product9.4.2 The Group of Dominant PolesPole Placement9.5.1 Resistive Broadbanding9.5.2 Pole–Zero Cancelation9.5.3 Pole Splitting9.5.4 Phantom Zeros9.5.5 Order of PreferenceAdding Second-Order EffectsExample DesignConclusion
References
10Frequency-Dynamic Range-PowerEric A. Vittoz and Yannis P. Tsividis
10.110.2
10.3
10.4
IntroductionFundamental Limits of Trade-Off10.2.1 Absolute Lower Boundary10.2.2 Filters10.2.3 Oscillators10.2.4 Voltage-to-Current and Current-to-Voltage Conversion10.2.5 Current Amplifiers10.2.6 Voltage AmplifiersProcess-Dependent Limitations10.3.1 Parasitic Capacitors10.3.2 Additional Sources of Noise10.3.3 Mismatch of Components10.3.4 Charge Injection10.3.5 Non-Optimum Supply VoltageCompanding and Dynamic Biasing10.4.1 Syllabic Companding10.4.2 Dynamic Biasing
x Contents
10.4.3 Performance in the Presence of blockers10.4.4 Instantaneous CompandingConclusion10.5
308309310311References
Filters
11Trade-Offs in Sensitivity, Component Spread and Component Tolerance inActive Filter DesignGeorge Moschytz
11.111.211.311.411.511.611.711.8
IntroductionBasics of Sensitivity TheoryThe Component Sensitivity of Active FiltersFilter Selectivity, Pole Q and SensitivityMaximizing the Selectivity of RC NetworksSome Design ExamplesSensitivity and NoiseSummary and Conclusions
References
315
315316319325328332337339339
341
341
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12Continuous-Time FiltersRobert Fox
12.112.2
12.3
12.4
12.512.612.712.812.9
12.10
IntroductionFilter-Design Trade-Offs: Selectivity, Filter Order, Pole Q andTransient ResponseCircuit Trade-Offs12.3.1 Linearity vs Tuneability12.3.2 Passive Components12.3.3 Tuneable Resistance Using MOSFETs: The MOSFET-C ApproachThe Transconductance-C (Gm-C) Approach12.4.1 Triode-Region Transconductors12.4.2 Saturation-Region Transconductors12.4.3 MOSFETs Used for Degeneration12.4.4 BJT-Based Transconductors12.4.5 Offset Differential PairsDynamic RangeDifferential OperationLog-Domain FilteringTransconductor Frequency-Response Trade-OffsTuning Trade-OffsNo tuningOff-chip tuningOne-time post-fabrication tuningAutomatic tuningSimulation Issues
References
Contents xi
13Insights in Log-Domain FilteringEmmanuel M. Drakakis and Alison J. Burdett
13.113.213.3
13.4
13.513.613.713.8
GeneralSynthesis and Design of Log-Domain FiltersImpact of BJT Non-Idealities upon Log-Domain Transfer Functions:The Lowpass Biquad ExampleFloating Capacitor-Based Realization of Finite Transmission Zeros inLog-Domain: The Impact upon LinearityEffect of Modulation Index upon Internal Log-Domain Current BandwidthDistortion Properties of Log-Domain Circuits: The Lossy Integrator CaseNoise Properties of Log-Domain Circuits: The Lossy Integrator CaseSummary
References
Switched Circuits
14
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407408409412417421423423425426429432433435436
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443445446447447448
Trade-offs in the Design of CMOS ComparatorsA. Rodríguez-Vázquez, M. Delgado-Restituto, R. Domínguez-Castro, F. Medeiro andJ.M. de la Rosa
14.114.2
14.3
14.414.5
14.6
IntroductionOverview of Basic CMOS Voltage Comparator Architectures14.2.1 Single-Step Voltage Comparators14.2.2 Multistep Comparators14.2.3 Regenerative Positive-Feedback Comparators14.2.4 Pre-Amplified Regenerative ComparatorsArchitectural Speed vs Resolution Trade-Offs14.3.1 Single-Step Comparators14.3.2 Multistep Comparators14.3.3 Regenerative ComparatorsOn the impact of the offsetOffset-Compensated Comparators14.5.1 Offset-Compensation Through Dynamic Biasing14.5.2 Offset Compensation in Multistep Comparators14.5.3 Residual Offset and Gain Degradation in Self-Biased Comparators14.5.4 Transient Behavior and Dynamic Resolution in Self-Biased
ComparatorsAppendix. Simplified MOST Model
References
15Switched-Capacitor CircuitsAndrea Baschirotto
15.115.2
IntroductionTrade-Off due to Scaled CMOS Technology15.2.1 Reduction of the MOS Output Impedance15.2.2 Increase of the Flicker Noise15.2.3 Increase of the MOS Leakage Current15.2.4 Reduction of the Supply Voltage
xii Contents
15.3
15.4
Trade-Off in High-Frequency SC Circuits15.3.1 Trade-Off Between an IIR and a FIR Frequency Response15.3.2 Trade-Off in SC Parallel Solutions15.3.3 Trade-Off in the Frequency ChoiceConclusions
AcknowledgmentsReferences
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16Compatibility of SC Technique with Digital VLSI TechnologyKritsapon Leelavattananon and Chris Toumazou
16.116.2
16.3
16.416.5
16.6
16.7
IntroductionMonolithic MOS Capacitors Available in Digital VLSI Processes16.2.1 Polysilicon-over-Polysilicon (or Double-Poly) Structure16.2.2 Polysilicon-over-Diffusion Structure16.2.3 Metal-over-Metal Structure16.2.4 Metal-over-Polysilicon Structure16.2.5 MOSFET Gate StructureOperational Amplifiers in Standard VLSI Processes16.3.1 Operational Amplifier TopologiesSingle-stage (telescopic) amplifierFolded cascode amplifierGain-boosting amplifierTwo-stage amplifier16.3.2 Frequency CompensationMiller compensationMiller compensation incorporating source followerCascode Miller Compensation16.3.3 Common-Mode FeedbackCharge-Domain ProcessingLinearity Enhanced Composite Capacitor Branches16.5.1 Series Compensation Capacitor Branch16.5.2 Parallel Compensation Capacitor Branch16.5.3 Balanced Compensation Capacitor BranchPractical Considerations16.6.1 Bias Voltage Mismatch16.6.2 Capacitor Mismatch16.6.3 Parasitic CapacitancesSummary
References
17Switched-Capacitors or Switched-Currents – Which Will Succeed?John Hughes and Apisak Worapishet
17.117.217.3
IntroductionTest Vehicles and Performance CriteriaClock Frequency17.3.117.3.217.3.3
Switched-Capacitor SettlingSwitched-Currents Class A SettlingSwitched-Currents Class AB Settling
Contents xiii
17.4
17.5
17.6
17.717.8
Power Consumption17.4.1 Switched-Capacitors and Switched-Currents Class A Power
Consumption17.4.2 Switched-Currents Class AB Power ConsumptionSignal-to-Noise Ratio17.5.1 Switched-Capacitors Noise17.5.2 Switched-Currents Class A Noise17.5.3 Switched-Current Class AB Noise17.5.4 Comparison of Signal-to-Noise RatiosFigure-of-Merit17.6.1 Switched-Capacitors17.6.2 Switched-Currents Class A17.6.3 Switched-Currents Class ABComparison of Figures-of-MeritConclusions
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517518519522522523525526527527530533535536537540541545546546
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551551554556
References
Oscillators
18Design of Integrated LC VCOSDonhee Ham
18.118.218.3
18.4
18.518.618.718.8
IntroductionGraphical Nonlinear ProgrammingLC VCO Design Constraints and an Objective Function18.3.1 Design Constraints18.3.2 Phase Noise as an Objective Function18.3.3 Phase Noise Approximation18.3.4 Independent Design VariablesLC VCO Optimization via GNP18.4.1 Example of Design Constraints18.4.2 GNP with a Fixed Inductor18.4.3 GNP with a Fixed Inductance Value18.4.4 Inductance and Current Selection18.4.5 Summary of the Optimization Process18.4.6 Remarks on Final Adjustment and Robust DesignDiscussion on LC VCO OptimizationSimulationExperimental ResultsConclusion
AcknowledgmentsReferences
19Trade-Offs in Oscillator Phase NoiseAli Hajimiri
19.119.2
MotivationMeasures of Frequency Instability19.2.1 Phase Noise19.2.2 Timing Jitter
xiv Contents
19.3
19.4
19.5
Phase Noise Modeling19.3.1 Up-Conversion of 1 / f Noise19.3.2 Time-Varying Noise SourcesPhase Noise Trade-Offs in LC Oscillators19.4.1 Tank Voltage Amplitude19.4.2 Noise SourcesStationary noise approximationCyclostationary noise sources19.4.3 Design ImplicationsPhase Noise Trade-Offs for Ring Oscillators19.5.1 The Impulse Sensitivity Function for Ring Oscillators19.5.2 Expressions for Phase Noise in Ring Oscillators19.5.3 Substrate and Supply Noise19.5.4 Design Trade-Offs in Ring Oscillators
References
557562563565565570570572573574574579582584585
591
591592594597599600600601602602603603603603604604604605605606606607610610610
Data Converters
20Systematic Design of High-Performance Data ConvertersGeorges Gielen, Jan Vandenbussche, Geert Van der Plas, Walter Daems, Anne Van denBosch, Michiel Steyaert and Willy Sansen
20.120.220.320.420.5
20.6
20.720.820.9
IntroductionSystematic Design Flow for D/A ConvertersCurrent-Steering D/A Converter ArchitectureGeneric Behavioral Modeling for the Top-Down PhaseSizing Synthesis of the D/A Converter20.5.1 Architectural-Level SynthesisStatic performanceDynamic performance20.5.2 Circuit-Level SynthesisStatic performanceDynamic performance20.5.3 Full Decoder Synthesis20.5.4 Clock Driver SynthesisLayout Synthesis of the D/A Converter20.6.1 Floorplanning20.6.2 Circuit and Module Layout GenerationCurrent-source array layout generationSwatch array layout generationFull decoder standard cell place and route20.6.3 Converter Layout AssemblyExtracted Behavioral Model for Bottom-Up VerificationExperimental ResultsConclusions
AcknowledgmentsReferences
Contents xv
21Analog Power Modeling for Data Converters and FiltersGeorges Gielen and Erik Lauwers
613
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631632632633636639640644644645649650653654654656657657658659659660662
21.121.221.3
21.4
21.5
IntroductionApproaches for Analog Power EstimatorsA Power Estimation Model for High-Speed Nyquist-Rate ADCs21.3.1 The Power Estimator Derivation21.3.2 Results of the Power EstimatorA Power Estimation Model for Analog Continuous-Time Filters21.4.1 The ACTIF Approach21.4.2 Description of the Filter Synthesis Part21.4.3 OTA Behavioral Modeling and Optimization for Minimal Power
ConsumptionModeling of the transconductancesThe distortion modelOptimization21.4.4 Experimental ResultsConclusions
AcknowledgmentReferences
22Speed vs. dynamic range Trade-Off in Oversampling Data ConvertersRichard Schreier, Jesper Steensgaard and Gabor C. Temes
22.122.2
22.3
22.4
IntroductionOversampling Data Converters22.2.1 Quantization Error22.2.2 Feedback Quantizers22.2.3 Oversampling D/A Converters22.2.4 Oversampling A/D Converters22.2.5 Multibit QuantizationMismatch Shaping22.3.1 Element Rotation22.3.2 Generalized Mismatch-Shaping22.3.3 Other Mismatch-Shaping Architectures22.3.4 Performance ComparisonReconstructing a Sampled Signal22.4.1 The Interpolation ProcessAn interpolation system example22.4.2 Fundamental Architectures for Practical ImplementationsSingle-bit delta–sigma modulationMultibit delta–sigma modulationHigh-resolution oversampled D/A converters22.4.3 High-Resolution Mismatch-Shaping D/A ConvertersA fresh look on mismatch shapingPractical implementations
References
xvi Contents
Transceivers
23Power-Conscious Design of Wireless Circuits and SystemsAsad A. Abidi
23.123.223.3
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723725725726728732732734735
IntroductionLowering Power across the HierarchyPower Conscious RF and Baseband Circuits23.3.1 Dynamic Range and Power Consumption23.3.2 Lowering Power in Tuned Circuits23.3.3 Importance of Passives Quality in Resonant Circuits23.3.4 Low Noise Amplifiers23.3.5 Oscillators23.3.6 Mixers23.3.7 Frequency Dividers23.3.8 Baseband Circuits23.3.9 On-Chip Inductors23.3.10 Examples of Low Power Radio Implementations23.3.11 Conclusions: Circuits
References
24Photoreceiver DesignMark Forbes
24.124.224.3
24.424.524.624.724.8
IntroductionReview of Receiver StructureFront-End Small-Signal Performance24.3.1 Small-Signal Analysis24.3.2 Speed/Sensitivity Trade-Off24.3.3 Calculations, for example, parametersNoise LimitsPost-Amplifier PerformanceFront-End and Post-Amplifier Combined Trade-OffMismatchConclusions
AcknowledgmentsReferences
25Analog Front-End Design Considerations for DSLNianxiong Nick Tan
25.125.2
25.3
IntroductionSystem Considerations25.2.1 Digital vs Analog Process25.2.2 Active vs Passive FiltersData Converter Requirements for DSL25.3.1 Optimum Data Converters for ADSLOptimum ADCs for ADSLOptimum ADC for ADSL-COOptimum ADC for ADSL-CP
Contents xvii
25.4
25.5
Optimum DACsOptimum DAC for ADSL-COOptimum DAC for ADSL-CP25.3.2 Function of FilteringCircuit Considerations25.4.1 Oversampling vs Nyquist Data Converters25.4.2 SI vs SC25.4.3 Sampled-Data vs Continuous-Time Filters25.4.4 Gm-C vs RC filtersConclusions
AcknowledgmentsReferences
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26Low Noise DesignMichiel H. L. Kouwenhoven, Arie van Staveren, WouterA. Serdijn andChris J. M. Verhoeven
26.126.2
26.3
26.4
26.5
IntroductionNoise Analysis Tools26.2.1 Equivalent Noise Source26.2.2 Transform-I: Voltage Source Shift26.2.3 Transform-II: Current Source Shift26.2.4 Transform-III: Norton-Thévenin Transform26.2.5 Transform-IV: Shift through TwoportsLow-Noise Amplifier Design26.3.1 Design of the Feedback NetworkNoise production by the feedback networkMagnification of nullor noiseDistortion increment and bandwidth reduction26.3.2 Design of the Active Part for Low Noise26.3.3 Noise OptimizationsNoise matching to the sourceOptimization of the bias currentConnecting stages in series/parallelSummary of optimizationsLow Noise Harmonic Resonator Oscillator Design26.4.1 General Structure of a Resonator Oscillator26.4.2 Noise Contribution of the Resonator26.4.3 Design of the Undamping Circuit for Low NoisePrinciple implementation of the undamping circuitAmplitude controlNoise performanceDriving the oscillator load26.4.4 Noise Matching of the Resonator and Undamping Circuit: Tapping26.4.5 Power Matching26.4.6 Coupled Resonator OscillatorsLow-Noise Relaxation Oscillator Design26.5.1 Phase Noise in Relaxation OscillatorsSimple phase noise model
xviii Contents
Influence of the memory on the oscillator phase noiseInfluence of comparators on the oscillator phase noise26.5.2 Improvement of the Noise Behavior by Alternative TopologiesRelaxation oscillators with memory bypassCoupled relaxation oscillators
References
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27Trade-Offs in CMOS Mixer DesignGanesh Kathiresan and Chris Toumazou
27.1
27.2
27.3
27.4
27.5
Introduction27.1.1 The RF Receiver Re-VisitedSome Mixer Basics27.2.1 Mixers vs Multipliers27.2.2 Mixers: Nonlinear or Linear-Time-Variant?Mixer Figures of Merit27.3.1 Conversion Gain and Bandwidth27.3.2 1 dB Compression Point27.3.3 Third-Order Intercept Point27.3.4 Noise Figure27.3.5 Port-to-Port Isolation27.3.6 Common Mode Rejection, Power Supply, etcMixer Architectures and Trade-Offs27.4.1 Single Balanced Differential Pair Mixer27.4.2 Double-Balanced Mixer and Its Conversion Gain27.4.3 Supply VoltageActive loadsInductive current sourceTwo stack source coupled mixerBulk driven topologies27.4.4 LinearitySource degenerationSwitched MOSFET degeneration27.4.5 LO Feedthrough27.4.6 Mixer NoiseNoise due to the loadNoise due to the input transconductorNoise due to the switchesConclusion
References
28A High-performance Dynamic-logic Phase-Frequency DetectorShenggao Li and Mohammed Ismail
28.128.2
IntroductionPhase Detectors Review28.2.1 Multiplier28.2.2 Exclusive-OR Gate
Contents xix
28.3
28.428.5
28.6
28.2.3 JK-Flipflop28.2.4 Tri-State Phase DetectorDesign Issues in Phase-Frequency Detectors28.3.1 Dead-Zone28.3.2 Blind-ZoneDynamic Logic Phase-Frequency DetectorsA Novel Dynamic-Logic Phase-Frequency Detector28.5.1 Circuit Operation28.5.2 Performance EvaluationConclusion
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References
29Trade-Offs in Power AmplifiersChung Kei Thomas Chan, Steve Hung-Lung Tu and Chris Toumazou
29.129.2
29.3
29.4
29.5
IntroductionClassification of Power Amplifiers29.2.1 Current-Source Power Amplifiers29.2.2 Switch-Mode Power AmplifiersClass D power amplifierClass E power amplifierClass F power amplifier29.2.3 Bandwidth Efficiency, Power Efficiency and LinearityEffect of Loaded Q-Factor on Class E Power Amplifiers29.3.1 Circuit Analysis29.3.2 Power Efficiency29.3.3 Circuit Simulation and DiscussionClass E Power Amplifiers with Nonlinear Shunt Capacitance29.4.1 Numerical Computation of Optimum Component ValuesBasic equationsOptimum operation (Alinikula’s method [16])Fourier analysisNormalized power capability29.4.2 Generalized Numerical MethodDesign exampleSmall linear shunt capacitorConclusion
References
Neural Processing
30Trade-Offs in Standard and Universal CNN CellsMartin Hänggi, Radu Dogaru and Leon O. Chua
30.130.2
30.3
IntroductionThe Standard CNN30.2.1 Circuit Implementation of CNNsStandard CNN Cells: Robustness vs Processing Speed30.3.1 Reliability of a Standard CNN
xx Contents
IntroductionAbsolute and relative robustnessThe Robustness of a CNN template setTemplate scalingTemplate design30.3.2 The Settling Time of a Standard CNNIntroductionThe exact approach for uncoupled CNNS30.3.3 Analysis of Propagation-Type TemplatesIntroductionExamples of propagation-type templates30.3.4 Robust CNN Algorithms for High-Connectivity TasksTemplate classesOne-step vs algorithmic processing30.3.5 Concluding RemarksUniversal CNN Cells and their Trade-Offs30.4.1 Preliminaries30.4.2 Pyramidal CNN cellsArchitectureTrade-offs30.4.3 Canonical Piecewise-linear CNN cellsCharacterization and architectureTrade-offsExample30.4.4 The Multi-Nested Universal CNN CellArchitecture and characterizationTrade-offs30.4.5 An RTD-Based Multi-Nested Universal CNN Cell Circuit30.4.6 Concluding Remarks
References
887888888890890892892893893893894897898900901902902904904905906906907908909909910914917918
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30.4
Analog CAD
31Top–Down Design Methodology For Analog Circuits Using Matlab and SimulinkNaveen Chandra and Gordon W. Roberts
31.131.2
31.3
31.4
31.5
IntroductionDesign Methodology Motivation31.2.1 Optimization ProcedureSwitched Capacitor Delta–Sigma Design Procedure31.3.1 Switched Sampled Capacitor (kT/C) Noise31.3.2 OTA ParametersModeling of Modulators in Simulink31.4.1 Sampled Capacitor (kT/C) Noise31.4.2 OTA Noise31.4.3 Switched Capacitor Integrator Non-IdealitiesOptimization Setup31.5.1 Implementation in Matlab31.5.2 Initial Conditions31.5.3 Additional Factors
Contents xxi
31.631.731.8
Summary of Simulation ResultsA Fully Coded Modulator Design ExampleConclusion
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985988989992993996998
1000100610091010
References
32Techniques and Applications of Symbolic Analysis for Analog Integrated CircuitsGeorges Gielen
32.132.2
32.3
32.4
32.532.6
IntroductionWhat is Symbolic Analysis?32.2.1 Definition of Symbolic Analysis32.2.2 Basic Methodology of Symbolic AnalysisApplications of Symbolic Analysis32.3.1 Insight into Circuit Behavior32.3.2 Analytic Model Generation for Automated Analog Circuit Sizing32.3.3 Interactive Circuit Exploration32.3.4 Repetitive Formula Evaluation32.3.5 Analog Fault Diagnosis32.3.6 Behavioral Model Generation32.3.7 Formal Verification32.3.8 Summary of ApplicationsPresent Capabilities and Limitations of Symbolic Analysis32.4.1 Symbolic Approximation32.4.2 Improving Computational Efficiency32.4.3 Simplification During Generation32.4.4 Simplification Before Generation32.4.5 Hierarchical Decomposition32.4.6 Symbolic Pole–Zero Analysis32.4.7 Symbolic Distortion Analysis32.4.8 Open Research TopicsComparison of Symbolic SimulatorsConclusions
AcknowledgmentsReferences
33Topics in IC Layout for ManufactureBarrie Gilbert
33.1
33.2
33.3
33.4
Layout: The Crucial Next Step33.1.1 An Architectural Analogy33.1.2 IC Layout: A Matter of “Drafting”?33.1.3 A Shared Undertaking33.1.4 What Inputs should the Layouteer Expect?Interconnects33.2.1 Metal Limitations33.2.2 Other Metalization Trade-OffsSubstrates and the Myth of “Ground”33.3.1 Device-Level Substrate NodesStarting an Analog Layout
xxii Contents
33.5
33.6
33.7
Device Matching33.5.1 The “Biggest-of-All” Layout Trade-Off33.5.2 Matching Rules for Specific Components33.5.3 Capacitor Matching33.5.4 Circuit/Layout SynergyLayout of Silicon-on-Insulator Processes33.6.1 Consequences of High Thermal ResistanceReflections on Superintegrated Layout
10121015101610181020102410281029
1033Index
Foreword
With so many excellent texts about analog integrated circuit design now available, theneed for yet another compilation of contributions may be questioned. Nevertheless, thisbook fills a notable void, in addressing a topic that, while a common aspect of a productdesigner’s life, is only occasionally addressed in engineering texts. It is about Trade-Offs: What they are; the circumstances in which they arise; why they are needed; howthey are managed, and the many ingenious ways in which their conflicting demandscan be resolved. We call it a Designer’s Companion, since it is more in the nature ofa reference work, to dip into when and where some new perspectives on the topic areneeded, rather than a text to be read in isolation and absorbed as a whole. However, itis an aspect of a trade-off that it is peculiar to each situation and there are no recipes fortheir instant resolution. That being true, their treatment here is frequently by example,suggestive rather than definitive. The personal insights, intuitions and inventiveness ofthe designer remain vital to the pursuit of a well-balanced solution, but which is eventhen only one of many, so its selection requires a relative-value judgment.
Understanding how to cope with trade-offs is an indispensable and inextricablepart of all engineering. In electronics, and particularly in analog design, the dilemmasarise in the choice of basic cell topology, its biasing, the specific element values andin making performance compromises. For example, wireless communication systemsare becoming increasingly sophisticated: they must operate at ever higher carrier fre-quencies, while using increasingly complex modulation modes, and posing extremelystringent performance demands. Meeting these requirements is only made more dif-ficult as the dimensions of transistors and passive elements in modern IC processescontinue to shrink, and as time-to-market and cost pressures mount. Similar trends arefound throughout the field of electronics: in power management, fiber-optics, clockgeneration for CPUs, high-precision instrumentation for signal generation and metrol-ogy, and in analytical equipment of numerous kinds in science, industry, medicine andmore recently in forensics and security.
Simply stated, the need for a trade-off is generated by the dilemma of being facedwith a multiplicity of paths forward in the design process, each providing a differentset of benefits or posing different risks, and which can only be resolved by giving upcertain benefits in exchange for others of comparable value. The trade-off invariablygenerates a constellation of considerations which are specific to each situation, withina particular design context and set of circumstances that will often have never occurredbefore, and whose resolution will have little general applicability.
It is these latter features that make writing about trade-offs so difficult: they are noteasy to anticipate in a systematic treatment, and they don’t teach lessons of universalapplicability. Furthermore, a trade-off calls for creativity: it requires us to provide whatisn’t there, in the data. Trade-offs cannot be made by tossing a coin; they are rarely ofan either-or character to begin with. The longer one mulls over the unique particulars,the more likely it is that a panoply of solutions will present themselves, to be added to
xxiii
xxiv Foreword
one’s bulging list of options. At some point, of course, ingenuity has to be curbed, anda decision has to be made.
Edward de Bono has noted that “In the end, all [human] decisions are emotional”.In resolving a trade-off, our intervention as laterally thinking, resourceful individualsis not required if the facts unequivocally speak for themselves, that is, if the resolutionof a transient dilemma can be achieved algorithmically. It involves selecting one fromseveral similarly attractive choices. We invariably try to apply all sorts of wisdom andlogic to our choice of which car or house to buy; but when logic fails to force the answer,as it so often does, we fall back on emotion. The essential role of emotion as an intrinsicpart of rational intelligence and an ally to creative thought has recently been illuminatedby a few pioneering psychologists. Intriguingly, in the index to Antonio Damasio’s 1994book Descartes’ Error, one finds the entry “Decision making: see Emotion”. Copingwith trade-offs also requires the inquisitive anticipation of the circumstances in whichthey may arise, and a good deal of practice in playing out What If? scenarios. JoelArthur Barker1 makes this observation, in which we may want to substitute “the nextIC development” in place of “the new worlds coming”:
Some anticipation can be scientific, but the most important aspect of anticipationis artistic. And, just like the artist, practice and persistence will dramaticallyimprove your abilities. Your improved ability will, in turn, increase your abilityin dealing with the new worlds coming. [Emphases added]
Although often referred to as “an art” in casual conversation, circuit design is morecorrectly viewed as a craft. The central emphasis in formal treatments of integratedcircuit design is generally on acquiring a thorough knowledge of the underlying elec-tronic principles, and of semiconductor processes and devices, aided by a fluency inmathematics, familiarity with the particular domain of specialization under consider-ation, and a basic ability for applying various pre-packaged concepts, techniques andalgorithms. But this hides the importance of developing the knack of making all theright judgments in practicing this craft, and the value of cultivating a personal flair incoping with the realities beyond the covers of the textbook.
Contrarily, from the layman’s perspective, design is perceived as a linear intellectualprocess, which proceeds something like this: One is faced with a set of objectives, andthen calls on experience to assemble all the pieces in a methodical, step-by-step fashion,making fact-driven decisions along the way. As each part of the product is considered,logic prevails at every juncture, and the whole gradually takes on a shape that is asoptimal as it is inevitable, to become another testament to the power of the underlyingrules and theories.
As a seasoned product designer, you will know that from the outset this will be farfrom the reality. Inspired guesses (more charitably labeled “engineering judgments”)
1 Joel Arthur Barker, Paradigms: The Business of Discovering the Future, 1994. This highlyrecommended work was previously published in 1992 under the title Future Edge. By thattime anything with the word “Future” in its title was already becoming passé, so perhapsit enjoyed only lackluster sales. By contrast, “Paradigms” was a very marketable word in1994.
Foreword xxv
are scattered all along the path, from start to finish. To begin with, those Objectives,that are supposed to inform every step of the proceedings and give the developmenta sure sense of direction, are either insufferably detailed and give one a feeling ofbeing imprisoned in a straightjacket, or they are so comically sketchy and perhapsmutually inconsistent, that anything approaching a focused, optimal solution is out ofthe question. Regrettably, as your own experience may testify, both of these extremesare all-too common, as well as every flavour in between. Each in its own way ismischievously setting the stage for the first trade-off to be needed.
In the over-constrained scenario, one designer may be inclined to take a stab atsatisfying the provider of the objectives with the desired results, no less, but no more,either: a just-right solution. This could be unwise, however, since the writer of thesespecifications might be viewing the development in a way that is strongly influenced bya prior discrete-element solution, and could be unaware of the special advantages thatcan be provided by a monolithic implementation. On the other, this tactic might be theright one if the product needs to meet only this one customer’s need, and developmenttime is severely limited, and die cost must be minimized. Another designer mightadopt the opposite rationale: Sure, the product will meet all those fussy requirements,but it could be capable of doing a lot more, too. By skillful design, many additionalapplications and features can be anticipated, and the versatility extended to embracethese, for little extra design effort or manufacturing cost. Thus, each of these twodesigners is making a trade-off, right at the start, about how to interpret and react tothe challenge implicit in the specifications.
Similarly, when faced with scant information about what is needed of this newproduct, one designer’s approach might be to opt for caution, and painstakingly solicitmore detailed information from the provider of the objectives. This only generatesanother trade-off, since the provider/user may in fact be no more informed than thedesigner; but, perhaps to hide his ignorance, he will nonetheless generate more numbersbased on estimates and prior practice, in other words, more guesses. If these are receivedand acted on with unmerited respect, the outcome could be a disaster. Alternatively,if they are treated with disdain, and another set of guesses is substituted, the outcomecould be equally undesirable.
Meanwhile, a second designer may lean on her specialized experience with similarproducts, and assume that the missing information can be adequately interpolated,without the need for any further consultation. That tactic could work out well, or itcould be just the beginning of a monstrous headache for both the potential user andthe designer. In all these scenarios, it is painfully evident that the tools needed forresolution of this particular dilemma will be found in no text book (including this one!)and they each in their own way call for a trade-off to be made. And this before thedesign has even begun.
These sketches also make us aware of the arbitrariness of the trade-off. It’s anidiosyncratic response to a dilemma. The more practiced the engineer, the more likelyit is that the majority of the hundreds of trade-offs that eventually will have to be made,during the course of developing even a relatively straightforward analog circuit, will bebased on good judgment, and a balanced consideration of all the alternatives that came
xxvi Foreword
to mind. But we cannot say that these decisions will be entirely rational, or optimal.There are no algorithms for success.
This book covers ten subject areas: Design Methodology; Technology; GeneralPerformance; Filters; Switched Circuits; Oscillators; Data Converters; Transceivers;Neural Processing; and Analog CAD. It addresses a diversity of trade-offs ranging fromsuch well-known couplets as frequency versus dynamic range, or gain-bandwidth vspower consumption, or settling-time vs phase-noise in PLLs, to some of the moresubtle trade-offs that arise in design for robustness in manufacture and in the “polygonworld” of IC layout. During its several years in development, it has transcended itsoriginal scope, becoming a designer’s desktop companion while also having value as agraduate textbook, inasmuch as numerous fundamental relationships leading to designconflicts are explained, in many cases with practical examples.
Its thirty-three chapters come from a variety of sources, including some of theworld’s most eminent analog circuits and systems designers, to provide, for the firsttime, a timely and comprehensive text devoted to this important aspect of analog circuitdesign. Those authors who are professional designers are faced every day with difficultdecisions on which the success of their products depend, and not always with allthe analytic horsepower that may be demanded by some of the situations. Taken inaggregate, the trade-offs that they choose eventually shape the competitive stature andreputation of the companies for whom they work. Other authors allow themselves totake a more academic view of the nature of a trade-off, and as a group are more inclinedto have greater optimism about the amenability of challenging circumstances to yieldto formal approaches, and even a degree automation.
The first section on Design Methodology opens with a discussion by Toumazouabout the nature and value of qualitative reasoning, in contrast to the usual emphasis inengineering on the towering importance of quantitative analysis. The underlying needfor intuition, playful inventiveness and emotion in the pursuit of an engineering life ispicked up by Gilbert, in Chapters 2 and 33, although the more serious focus here isnonetheless on making decisions within the context of commercial product develop-ment. In all these chapters, the sheer breadth of the field allows only an introductionto the subject matter.
The next three chapters, in the Technology section, range from the “Big Picture”of VLSI, and in particular, some of the trade-offs in CMOS circuit development, asexplored by Mezhiba and Friedman, to the specific and detailed topic of bandgapvoltage references, as perceived by Staveren, Kouwenhoven, Serdijn and Verhoeven(Chapter 5). Perched between these two chapters is a presentation of the less-familiarfloating-gate devices and circuits that have a unique, although limited, scope of appli-cations and might also comfortably fit into the later (and short) section on NeuralProcessing, in Chapter 30 of which Hanggi, Dogaru and Chua discuss specializedtrade-offs in integrated neural networks.
In some cases, the emphasis is on the tension between two dominant aspects ofperformance. This approach is particularly evident in the five chapters about GeneralPerformance issues. A very basic trade-off is that which arises between amplifierbandwidth and gain; this is discussed by Toumazou and Payne in Chapter 7, and froma different perspective by Meyer in Chapter 8. Aspects of frequency compensation
Foreword xxvii
in integrated amplifiers is explored in Chapter 9, by Staveren, Kouwenhoven, Serdijnand Verhoeven. In amplifier design, one cannot increase bandwidth without regard fornoise, and this in turn is strongly influenced by the power consumption that one canafford to assign to the amplifier. Noise and bandwidth are likewise linked by devicegeometry. Attempts to push bandwidth may impact DC offsets or gain accuracy incertain cases, or distortion and intermodulation in others. Thus, trade-offs are usuallymulti-faceted, and in a very real way, nearly all the key specifications that will appearin a product data sheet will be linked to a considerable extent. Vittoz and Tsividis faceup to these harsh realities in Chapter 10.
In the section on Filters, the many conflicts and compromises that surroundcontinuous-time active-filter design are addressed by Moschytz in Chapter 11, andby Fox in Chapter 12. The particular way in which trade-offs arise in Log-Domain(Translinear) Filters is discussed by Drakakis and Burdett in Chapter 13. The nextsection is about Switched Circuits in general, and includes four differing perspectives.The optimization of comparators is the focus of Chapter 14, by Rodríguez-Vázquez,Delgado-Restituto, Domínguez-Castro and de la Rosa, while a general overview ofswitched-capacitor circuits is presented by Baschirotto in Chapter 15, followed by areview of the compatibility of such circuits with advanced digital technologies, pro-vided by Leelavattananon. This section closes with Chapter 17, which offers somethoughts by Hughes and Worapishet about the differences and trade-offs that arisebetween the standard switched-capacitor circuits that are now well established and theless well-known switched-current forms that are sometimes viewed as equally useful,in certain situations.
Communications circuits are a minefield of trade-offs, and the very stringent perfor-mance required of Oscillators are examined in the Chapters 18 and 19 of this section.In the first, by Ham, some of the special problems of maintaining low phase-noiseusing the relatively poor on-chip components (principally low-Q inductors and lossyvaractors of limited range) are put under scrutiny. A different perspective on the samesubject is provided by Hajimiri. The next three chapters, in the section on Data Con-verters, provide insights from the foremost exponents of these extremely importantgateways between the analog and digital domains. The first, which sets forth princi-ples for the systematic design of high-performance data converters, is authored by animpressive team composed of Gielen, Vandenbussche, Van de Plas, Daems, den Bosch,Steyaert and Sansen. The following Chapter 21 is more specialized in its approach:Gielen and Lauwers discuss particular issues of power modeling for data convert-ers and filters. Chapter 22, authored by Schreier, Steensgaard and Temes, provides adefinitive account of the fundamental trade-off between speed and dynamic range inover-sampled converters.
The focus next shifts to Transceivers, in several very different arenas. In Chap-ter 23, Abidi shares his considerable experience in the design of wireless circuits, andthe systems of which they are an integral part, where power conservation is a dominantconcern. This is followed by a review by Forbes of the design trade-offs that arise inoptical receivers. Finally, Chapter 25 closes this section with some considerations foranalog front-ends in digital subscriber-line systems. In all these cases, the overarchingchallenge is the attainment of a very high dynamic range, entailing the simultaneous
xxviii Foreword
provision of low distortion, of various disparate types, with a near-fundamental noisefloor. The endless search for low noise is also featured in Chapter 26, as illuminated byKouwenhoven, Staveren, Serdijn and Verhoeven, and again, noise and intermodulationare the central challenges in mixer design, the topic of the next chapter by Kathiresanand Toumazou. Phase detectors once bore a passing resemblance to mixers, and theirclose cousin, the analog multiplier; but in today’s phase-locked loops, there is a morepressing need to capture both phase and frequency information. Some special tech-niques are presented by Li and Ismail. The closing chapter of this section, authored byChan, Tu and Toumazou, looks at the trade-offs that arise in the design of various sortsof power amplifiers.
The final section is concerned with CAD for analog design. Chandra and Robertspresent an overview of a design methodology for analog circuits using Matlab andSimulink, while in Chapter 32, Gielen adds a concluding word about the possibilitiesfor using symbolic analysis tools for analog circuits.
Clearly, no book on the topic of trade-offs can ever be truly representative of theentire field of analog design, nor exhaustive in its treatment of those subjects which doget included. The primary function of any engineering text is to inform, and provideaccurate and authoritative guidance of both a general and specific sort. However, asearlier suggested in this Foreword, and as these chapters testify, it is unlikely that verymany general recommendations can be made regarding trade-offs, and the specializedcase histories have a strictly limited scope of application. But another function of anygood text is to enthuse, to inspire, to illuminate the less-explored corners of the domain,and to point the way to new perspectives on each topic. It is hoped that the materialassembled here serves that objective.
Barrie Gilbert11 March 2002
List of Contributors
Asad A. AbidiElectrical Engineering DepartmentUniversity of CaliforniaLos AngelesUSAEmail:[email protected]
Andrea BaschirottoDepartment of Innovation EngineeringUniversity of LecceVia per Monteroni-73100LecceItalyEmail:[email protected]
Alison J. BurdettDepartment of Electrical & Electronics EngineeringImperial CollegeExhibition Road, SW7 2BTLondonUKEmail: [email protected]
Scott K. BurgessDepartment of Electrical Engineering–ElectrophysicsUniversity of Southern CaliforniaLos Angeles, CaliforniaUSA
Chung Kei Thomas ChanCircuits and Systems GroupImperial College of Science, Technology and MedicineUKEmail: [email protected]
xxix
xxx List of Contributors
Naveen ChandraMicroelectronics and Computer Systems LaboratoryMcGill UniversityMontreal, QuebecCanadaEmail: [email protected]
John Choma, Jr.Department of Electrical Engineering–ElectrophysicsUniversity of Southern CaliforniaLos Angeles, CaliforniaUSAEmail: [email protected]
Leon O. ChuaEmail: [email protected]
Walter DaemsESAT-MICASKatholieke Universiteit Leuven
J. M. de la RosaInstitute of Microelectronics of SevilleCNM-CSICAvda. Reina Mercedes s/nEdif. CICA, 41012-SevillaSpain
M. Delgado-RestitutoInstitute of Microelectronics of SevilleCNM-CSICAvda. Reina Mercedes s/nEdif. CICA, 41012-SevillaSpain
Radu Dogaru
R. Domínguez-CastroInstitute of Microelectronics of SevilleCNM-CSICAvda. Reina Mercedes s/nEdif. CICA, 41012-SevillaSpain
List of Contributors xxxi
E. M. DrakakisDepartment of BioengineeringImperial CollegeExhibition Road, SW7 2BXLondonUKEmail: [email protected]
Mark ForbesHeriot-Watt UniversityEdinburghScotlandEmail: [email protected]
Robert FoxUniversity of FloridaFloridaUSAEmail: [email protected]
Eby G. FriedmanDepartment of Electrical and Computer EngineeringUniversity of RochesterRochesterNew YorkUSAEmail: [email protected]
Georges GielenESAT-MICASKatholieke Universiteit LeuvenEmail: [email protected]
Barrie GilbertAnalog Devices Inc.1100 NW Compton DriveBeavertonOregon 97006-1994USAEmail: [email protected]
xxxii List of Contributors
Ali HajimiriCalifornia Institute of TechnologyCaliforniaUSAEmail: [email protected]
Donhee HamCalifornia Institute of TechnologyCaliforniaUSAEmail: [email protected]
Martin HänggiEmail: [email protected]
John HughesEmail: [email protected]
Mohammed IsmailAnalog VLSI Lab,The Ohio-State UniversityOhioUSAEmail: [email protected]
Ganesh KathiresanCircuits and Systems GroupDepartment of Electrical & Electronics EngineeringImperial College of Science, Technology and MedicineLondonUKEmail: [email protected]
Michiel H. L. KouwenhovenElectronics Research Laboratory/DIMESDelft University of TechnologyThe NetherlandsEmail: [email protected]
Tor Sverre LandeDepartment of InformaticsUniversity of OsloOsloNorwayEmail: [email protected]
xxxiiiList of Contributors
Erik LauwersESAT-MICASKatholieke Universiteit Leuven
Kritsapon LeelavattananonEricsson MicroelectronicsSwindon Design CentrePagoda HouseWestmead Drive, WestleaSwindon SN5 7UNUKEmail: [email protected]
Shenggao LiAnalog VLSI Lab,The Ohio-State UniversityWireless PAN Operations,Intel Corporation, San FranciscoCaliforniaUSAEmail: [email protected]
F. Madiero
Andrey V. MezhibaDepartment of Electrical and Computer EngineeringUniversity of RochesterRochesterNew YorkUSA
George MoschytzSwiss Federal Institute of TechnologySwitzerlandEmail: [email protected]
Gordon W. RobertsMicroelectronics and Computer Systems LaboratoryMcGill UniversityMontreal, QuebecCanadaEmail: [email protected]
xxxiv List of Contributors
A. Rodríguez-VázquezInstitute of Microelectronics of SevilleCNM-CSICAvda. Reina Mercedes s/nEdif. CICA, 41012-SevillaSpain
Willy SansenESAT-MICASKatholieke Universiteit Leuven
Richard Schreier
Wouter A. SerdijnElectronics Research Laboratory/DIMESDelft University of TechnologyThe NetherlandsEmail: [email protected]
Arie van StaverenElectronics Research Laboratory/DIMESDelft University of TechnologyThe Netherlands
Jesper SteensgaardEmail: [email protected]
Michiel SteyaertESAT-MICASKatholieke Universiteit Leuven
Nianxiong Nick TanGlobeSpan, Inc.Irvine, California, USA
Gabor C. TemesEmail: [email protected]
Chris ToumazouCircuits & Systems GroupDepartment of Electrical EngineeringImperial College of Science, Technology & MedicineLondonUKEmail: [email protected]
List of Contributors xxxv
Yannis P. TsividisColumbia UniversityNew YorkUSAEmail: [email protected]
Steve Hung-Lung TuCircuits and Systems GroupImperial College of Science, Technology and MedicineLondonUK
Anne Van den BoschESAT-MICASKatholieke Universiteit Leuven
Geert Van der PlasESAT-MICASKatholieke Universiteit Leuven
Jan VandenbusscheESAT-MICASKatholieke Universiteit Leuven
Chris J. M. VerhoevenElectronics Research Laboratory/DIMESDelft University of TechnologyThe Netherlands
Eric A. VittozSwiss Centre for Electronics and MicrotechnologySwitzerland
Apisak Worapishet
