Two-dimensional fiber array Two-dimensional fiber array with integrated topologywith integrated topologyfor short-distance optical interconnectionsfor short-distance optical interconnections

Makoto Naruse1),2), Alvaro Cassinelli3), and Masatoshi Ishikawa3)

  

1: Ultrafast Photonic Network GroupCommunications Research Laboratory , Japan

E-mail: naruse@crl.go.jp 

2: Japan Science and Technology Corporation (JST), PRESTO 

3: Dept. Information Physics and Computing, University of Tokyo

Contents

1. Interconnection fabric

2. Wave-guide-base, direct implementation of interconnection topology

3. Interconnection decomposition

4. Experimental fabrication

5. Summary and future plans

Optical Interconnection fabric / switching fabric

LSILSI

LSILSI

LSI

LSILSI

LSI

Optical Interconnection fabric / Switching fabric

Inter Chip, Inter-boardOptical interconnection

Optical interconnection

Multistage architecture

Multistage architecture

…

…

All optical

Optoelectronic

An example: Omega network

Inp

ut

Ou

tpu

t

OE

Computation

EO Optical interconnect

Optical interconnect

w/o OEO

Regularly interconnected multistage architecture

Wave-guide-base, direct implementation of interconnection topology

…

…

OE

Computation

EO Optical interconnect

Optical interconnect

w/o OEO

• Two-dimensional fiber array

Configure the interconnection topology directly by positioning the input and output end of the wave-guides

Input

Output

All optical

Optoelectronic

Design considerations

• Two-dimensional (2D) parallelism • Focus on Permutation network (such as perfect shuffle)• Scalability• Module reusability (Permutation reusability)

• Alignment difficulty: Both input and output end• Theoretically more volume efficient than free-space equivalent

Other remarks

Out of scope of this paper

Y.Li, et. al., “Volume-consumption comparisons of free-space and guided-wave optical interconnections”, Appl.Opt. 39 (2000), 1815

Example1: Omega networkIn

pu

t

Ou

tpu

t

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

• Messy topology

• Poor scalability

• Poor reusability

Permutation=Perfect shuffle

2D direct implementation

Example 2:Indirect Binary n-Cube Network

Permutation=Butterfly and perfect shuffle

Several kinds of different interconnection topology are used

Interesting fact

Perfect shuffle and butterfly permutation can be made out of the following three types of elemental permutations: Row, Column, and Diagonal permutations

Column permutationRow permutation Diagonal permutation

Before decomposition

Direct implementation

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

0123456789

101112131415

Node assignment:Scan mapping

Perfect shuffle

Interconnection decomposition

Row permutation

Column permutation

Diagonal permutationDecompose

0123456789

101112131415 1

2

6

14

0123456789

101112131415

Perfect shuffle

Interconnection decomposition

Column permutation

Column permutation

Diagonal permutation

0123456789

101112131415

Decompose

3

10

10

3

0123456789

101112131415

Butterfly

shuffle shuffle shuffleshuffle

Processor arrays

(exchange switches and more)

Row permutation

90º

Overall Omega Network

Column permutation

Diagonal permutation

(2) (3) (4) -1(4)

Processor arrays

(exchange switches and more)

Row permutation

90º

Column permutation

Diagonal permutation

Overall Indirect Binary n-Cube Network

Two holder prototypes: Zirconium, SiO2

Pitch: 250±5 m

Multimode graded index fibers: NA=0.21(core 50m, cladding 126m)

Transmission loss: 3dB/km

Length: 30 cm

Prototype fiber module: Preliminary 4x4 array

3 mm

2 mm

5 mm

Embedded interconnection topology

Pitch uniformity

0

2

4

6

8

10

12

14

16

244 246 248 250 252 254 256

Zirconium

Pitch (m)

Num

ber

of li

nk

245m-255mAve. 250mStd deviation 2.0m

246m-254mAve. 250mStd deviation 1.5m

SiO2

Pitch(250m)

Input Output (CCD image)

No relay optics

Interconnection example

VCSEL arrayFiber module input

Input

Output

x 50 m

0

0.05

0.1

0.15

0.2

0.25

-105 -90 -75 -60 -45 -30 -15 0 15 30 45 60 75

X (microns)

Exi

t p

ow

er (

a.u

)

x

Alignment tolerances(half peak power)

y 70 m

Transmission efficiency / Alignment tolerance

Transmission efficiency

Max. transmittance 38.45%

0

5

10

15

20

25

30

35

40

45

6 7 8 9 10 11 12 13

VCSEL driving current (mA)

Tra

nsm

itta

nce

(%

)

38.45

9.5

LED regime

LASER regime

Summary and future plans

• Wave-guide-base, direct implementation of 2D parallel interconnection topology

• Interconnection decomposition for scalability and reusability

• 2D fiber array with interconnection topology was demonstrated

Future plan: • Theoretical foundation for interconnection

decomposition and total system design• Higher-density 2D interconnect• System demonstration