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TWO LEVEL CASCADED INVERTER WITH ELIMINATION OF LOW FREQUENCY HARMONICS USING MICRO CONTROLLER
CONTENTS
1.INTRODUCTION2. CONFIGURATION AND OPERATIONAL
PRINCIPLE OF PROPOSED INVERTER3. MICRO-CONTROLLER4.OPTO-COUPLER5. SIMULATION IN MULTISIM SOFTWARE6.CONCLUSION
INTRODUCTION
Presence of harmonics in power system causes various problems. especially the low frequency harmonics reduce the overall efficiency of the system to a greater extent. Fourier transformation is applied in harmonic analysis. Any periodic waveform can be shown to be the super position of a fundamental and a set of harmonic components. By applying Fourier transformation, magnitude of these components can be known. The frequency of each harmonic component is an integral multiple of its fundamental.
50 Hz(h = 1)
150 Hz(h = 3)250 Hz(h = 5)350 Hz(h = 7)450 Hz(h = 9)550 Hz(h = 11)650 Hz(h = 13)
There are several methods to indicate the quantity of harmonics content.
The most widely used measure is the total harmonic distortion (THD),
which is defined in terms of the amplitudes of the harmonics, Mh. THD is a measure of the effective value of the harmonic components of a distorted waveform. That is, it is the potential heating value of
the harmonics relative to the fundamental.
where Mh is the rms value of harmonic component h of the quantity M.
• Inverter• Conventional Two-Level And• Three-Level Voltage Source Inverter• PWM Techniques• Multi-Level Voltage Source Inverter• Cascaded Multi-Level Inverter
CONFIGURATION AND OPERATIONALPRINCIPLE OF PROPOSED INVERTER
• Circuit Configuration
• Operation
CIRCUIT CONFIGURATION
Typical two-level inverter
operation
+V+2V
-2V-V
0
MICRO-CONTROLLERThe micro-controller is used here to create accurate on, off pulses for all the eight MOSFETs. Using a micro-controller for generating the switching sequence is very advantageous in many aspects. It is very compact, occupies very less space, allows reprogramming of time-delays, and is very reliable.The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM
Modes of operation
• Mode 0• Mode 1• Mode 2
OPTO-COUPLEROpto-coupler is nothing but a combination of LED and a phototransistor. It provides optical coupling between input and output. The input side has a LED. It emits photons, when it is forward biased.The output side has a phototransistor.When the emitted photons hit the phototransistor, it induces the base current to flow. The transistor is switched on. When the LED is not forward biased, the transistor remains in off state
SIMULATION IN MULTISIM SOFTWARE
V1 12 V
XSC1
A B Ext Trig
+ +
_ _ + _
V2 12 V
17
U1
8051
P1B0T2 1 P1B1T2EX 2 P1B2 3 P1B3 4 P1B4 5 P1B5MOSI 6 P1B6MISO 7 P1B7SCK 8 RST 9 P3B0RXD 10 P3B1TXD 11 P3B4T0 14 P3B5T1 15 XTAL2 18 XTAL1 19 GND 20 P2B0A8 21 P2B1A9 22 P2B2A10 23 P2B3A11 24 P2B4A12 25 P2B5A13 26 P2B6A14 27 P2B7A15 28
P0B7AD7 32 P0B6AD6 33 P0B5AD5 34 P0B4AD4 35 P0B3AD3 36 P0B2AD2 37 P0B1AD1 39 P0B0AD0 38 VCC 40
P3B2INT0 12 P3B3INT1 13 P3B6WR 16 P3B7RD 17
PSEN 29 ALEPROG 30 EAVPP 31
2
VCC 5V
VCC
Q2 IRF530 Q3
IRF530
Q4 IRF530 Q5
IRF530
Q1 IRF530 Q6
IRF530
Q7 IRF530 Q8
IRF530
V3
9 V R4 10k
U3
PS2561-1 2 1
3 4 5
V5
9 V R2 10k
U2
PS2561-1 2 1
3 4 8
V6
9 V R3 10k
U4
PS2561-1 2 1
3 4 15 V7
9 V R5 10k
U5
PS2561-1 2 1
3 4 20
V8
9 V R6 10k
U6
PS2561-1 2 1
3 4 23
V9
9 V R7 10k
U7
PS2561-1 2 1
3 4 26
V10
9 V R8 10k
U8
PS2561-1 2 1
3 4 29
V11
9 V R9 10k
U9
PS2561-1 2 1
3 4 32
7 14
22 19
4
25
9 28
31 34
18
0
6
R1 100
24
0
R12 500
10 R13
500
R14 500
11 R15
500 12
R16 500
13 R17
500 16
R18 500
21 R19
500 27
30
33
35
36 37
38 39
40 41
• The 3rd and 5th order harmonics eliminated, two-level cascaded inverter is successfully • implemented in hardware. • It is giving the expected output. • It is well suited for dc-ac conversion from batteries, fuel cells and solar cells.• Compared to other multilevel inverter topologies, it requires least no of components. • Since the circuit for all the levels are same, optimized circuit layout and packaging are possible.• This two-level inverter has only 8 transitions in each cycle, but a PWM inverter of same type needs 10 transitions.• Moreover in each transition only half of the voltage is applied across the MOSFET so switching loss is halved.• Thus switching loss is substantially reduced compared to PWM inverters.
CONCLUSION