UC San Diego / VLSI CAD Laboratory

Incremental Multiple-Scan Chain Ordering for ECO Flip-Flop Insertion

Incremental Multiple-Scan Chain Ordering for ECO Flip-Flop Insertion

Andrew B. Kahng, Ilgweon Kang and Siddhartha NathVLSI CAD LABORATORY, UC San Diego

32nd IEEE/ACM International Conference on Computer-Aided Design

November 20th, 2013

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OutlineOutline Motivation Related Work Problem Formulations IMSCO Flow Experimental Results Conclusions and Future Works

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MotivationMotivation Engineering Change Orders (ECOs) are IC design changes close

to tapeout– The testability of ECO logic is very challenging to the design schedule– To avoid loss of test coverage, ECO flip-flops (FFs) must be added for

ECO logic

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Challenges for ECO FF InsertionChallenges for ECO FF Insertion ECO FFs should be distributed among existing scan chains to

minimize test time Only a subset of existing scan chains will be compatible

with ECO FF depending on clock domain Existing routing should be minimally perturbed to minimize

impact on timing and existing routing congestion ECO FF insertion flow should be automated

– Manual ECO FF insertion near tapeout can cost days or weeks of design time

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Why Is The Problem Difficult?Why Is The Problem Difficult?

Large incremental wirelength (timing impact)

Chain 1

Many edges perturbed (routing disturbance)

Chain 1

Chain 1

Compromise between wirelength and #edges perturbed

ECO FF Insertion Requires Good Heuristics

How to tradeoff wirelength, test time, and impact to existing timing and routing?

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Our WorkOur Work New Incremental Multiple-Scan Chain Ordering

(IMSCO) formulation– Minimize test time (or scan chain depth)– Minimize incremental wirelength and congestion

Affects setup timing slacks and routability of ECO changes– Minimize disturbance of the existing routing and timing

By minimizing number of edges that are modified Develop heuristics for ordering scan chains based on

– Traveling Salesman Problem (TSP) Develop Incremental Scan Chain solver (ISC-solver) tool that

– implements IMSCO heuristics to minimize test time, wirelength and routing disturbance

– shows promising results

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OutlineOutline Motivation Related Work Problem Formulations IMSCO Flow Experimental Results Conclusions and Future Works

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Relationship to TSPRelationship to TSP TSP: Given a set of cities, find a minimum-cost tour

that visits every city exactly once In IMSCO

– City :: Scan FF– Cost :: Wirelength

Our problem– Multiple salesmen– Multiple starting points mTSP

Scan chain ordering can be formulated as TSP

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Prior WorksPrior Works Two broad classifications

– Clustering and assignment of scan FFs– Ordering of assigned scan FFs

Clustering and assignment– Elm et al. [2008] present partitioning heuristics to cluster scan

FFs into scan chains– Seok et al. [2006] use placement information to divide a scan

chain into multiple chains Ordering

– Feuer and Koo [1983] first use TSP for scan chain optimization– Gupta et al. [2003] propose routing-driven and timing-driven

methodology to order scan chains

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OutlineOutline Motivation Related Work Problem Formulations IMSCO Flow Experimental Results Conclusions and Future Works

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Minimize Test TimeMinimize Test Time

Scan depth of chain 2 > scan depth of chain 1

Chain 1

Chain 2

Scan depth of chain 2 = scan depth of chain 1

Not good solution Good solution

Chain 1

Chain 2

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Minimize Incremental WirelengthMinimize Incremental Wirelength

Larger incremental wirelength

Chain 1

Chain 2

Not good solution Good solution

Chain 1

Chain 2

Smaller incremental wirelength Potentially less impact to existing

routing

We can minimize timing impact to existing scan chains We can reduce routing congestion

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Minimize #Cut EdgesMinimize #Cut Edges

Two cut edges disturb existing routing

Chain 1

Not good solution Good solution

One cut edge reduces routing disturbance

Chain 1

We can minimize the disturbance to existing routing (Major changes to existing routing may break previously-achieved timing closure)

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OutlineOutline Motivation Related Work Problem Formulations IMSCO Flow Experimental Results Conclusions and Future Works

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Overall FlowOverall Flow

Input: Original Scan Chains, ECO FFs, Constraints

(1) Construction of Initial Clustering (Affinity)

(2) Improvement of Initial Clustering (modified FM) (GainWL)

(3) Selection of Multiple Cut Edges (k-way clustering, GainWL_byCE)

Output: Clustering and Ordering of ECO FFs with Multiple Cut Edges

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Initial ClusteringInitial Clustering Affinity: Weighted sum of scan depth (SD), wirelength (WL)

and #cut edges (CE) affinities between ECO FF and original scan chain

Distances for WL affinity are calculated differently for congestion- and non-congestion-aware modes– Non-congestion mode: Manhattan distance between FFs– Congestion mode:

Calculate Affinity of ECO FF to all compatible scan chains

Find and pairwith largest affinity

Invoke TSP-solver (Concorde)

Ordered list of ECO FFs per scan chain with min WL

Assign to scan chain

Repeat red blocks for all remaining

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Improvement of Initial ClustersImprovement of Initial Clusters

𝐺𝑎𝑖𝑛𝑊𝐿 (𝐹𝐸 ,C )=𝑊𝐿 (removed edges )−𝑊𝐿 (added edges)

Invoke FM (iterative hill-climbing) algorithm for each ECO FF from scan chain to scan chain

Search for ECO FF that maximizes Move from to

– Remove three edges (two from and one from )– Add three edges (one from and two from )

Fix to Invoke TSP-Solver (Concorde) to order FFs to minimize WL

Chain 1

Chain 2

26

11

8Chain 1

Chain 2

𝐺𝑎𝑖𝑛𝑊𝐿=(𝟔+𝟏𝟏 )+(𝟖 )−(𝟕)−(𝟓+𝟓)=𝟖>𝟎2

7

5

5

F

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Selection of Multiple Cut EdgesSelection of Multiple Cut Edges

Disconnect two longest edges of ECO FFs in a cluster for each chain

Reconnect sub-clusters to nearest original scan FFs Calculate and find Retain new connections if Invoke TSP-solver (Concorde) to order FFs to minimize WL

We can reduce the incremental wirelength even more We select multiple cut edges by using greedy k-way clustering

– For ECO scan FFs in a given scan chain

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OutlineOutline Motivation Related Work Problem Formulations IMSCO Flow Experimental Results Conclusions and Future Works

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Experimental SetupExperimental Setup Develop ISC-solver to implement three-phase heuristics

– Written C++ with several user configurations– Compiled with g++ 4.8.0– Concorde as TSP-solver– Validated on 12-core HT Intel Xeon E5-2640 2.5GHz, 128GB

RAM server Testcases

– Industrial (from industry partners)– Artificial with our configurable scan instance generator– User options include layout size, #scan chains, #scan FFs per

scan chain, #ECO FFs, congestion map, ….

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ISC-Solver User ParametersISC-Solver User Parameters

psd : Max % increase in scan depth allowed in chain

after ECO FFs insertion mel : Max edge length between scan FFs

– To avoid use of high-leakage LVT cells lel : Min edge length between scan FFs

– To avoid the need for excessive hold buffer insertion mce : Max #cut edges in each individual scan chain MCE : Max #cut edges in the entire design

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Option: psdOption: psd

0 1 2 3 4 5 6 7 8 9 10560

570

580

590

600

610

620

psd

Maxi

mum

Sca

n D

epth

psd maximum scan depth

mel 500

lel 0

mce ∞

MCE ∞

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Option: melOption: mel

mel wirelength

101001000100001989000

1990000

1991000

1992000

1993000

1994000

1995000

mel

Wir

eLe

ngth

(μm

)

psd 0

lel 0

mce ∞

MCE ∞

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Option: lelOption: lel

1 10 1001970000

1980000

1990000

2000000

2010000

2020000

2030000

2040000

2050000

lel

Wir

eLe

ngth

(μm

)

lel wirelength

psd 0

mel 500

mce ∞

MCE ∞

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ISC-Solver Example SolutionsISC-Solver Example Solutions

Final chain WL is 3818 when mce = 10

Final chain WL is 4116 when mce = 1

mce is max #cut edges per scan chain

ISC-solver reports smaller WL when mce increases

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ISC-Solver: Congestion-AwarenessISC-Solver: Congestion-Awareness

Congested regions

Cut edges

ISC-solver generates more cut edges to avoid high congestion area

Non-congestion-aware Congestion-aware

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Comparison to Industrial ResultsComparison to Industrial Results Industrial testcase

– 320 scan chains – 634 ECO FFs– 7 compatible scan chain groups

5.3% reduction in SD (no additional test time) from manual 45.71% reduction of incremental WL compared to manual

6000 10000 140000

10

20

30

40 ISC-solver Results Manually-Solved Result

ΔWireLength

ΔSca

n D

epth

(tes

t tim

e)

RECOMMENDED SOLUTION !!

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OutlineOutline Motivation Related Work Problem Formulations IMSCO Flow Experimental Results Conclusions and Future Works

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Conclusions and Future WorksConclusions and Future Works IMSCO provides automated flow to improve testability

of ECO logic in SOC implementation flow ISC-solver implements clustering, incremental

clustering and ordering heuristics Compared to manual solutions, ISC-solver achieves

– 5.3% of test time reduction– 45.71% reduction in incremental wirelength

Future works– Code optimizations to speedup ISC-solver– Connections to operations research literature, e.g.,

via dynamic MDVRP with variable number of movable depots

Thank You!

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Affinity Calculation ScalabilityAffinity Calculation Scalability Time complexity = #scan FFs; = #ECO FFs

0 500 1000 1500 2000 25000

100020003000400050006000

n

CP

U T

ime (

s)

= 49300#scan chains = 100Memory Usage ≤ 36MB

0 50 100 150 200 2500

500100015002000250030003500

m (K)

CP

U T

ime (

s)

𝑛 = 300#scan chains = 20 to 500Memory Usage ≤ 150MB

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Option: mceOption: mce

0 5 10 15 20 251991000

1992000

1993000

1994000

1995000

1996000

1997000

1998000

mce

Wir

eLe

ngth

(μm

)

0 5 10 15 20 250

30

60

90

120

mce

# o

f C

ut

Edges

mce wirelength mce # of cut edges

psd 0

mel 5000

lel 0

MCE ∞