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:

Email: ccc@kmit.edu.tw

URL : http://ccc.kmit.edu.tw

: 2014/1/19

Micro C/OS II

mailto:ccc@kmit.edu.twhttp://ccc.kmit.edu.tw/http://ccc.kmit.edu.tw/mailto:ccc@kmit.edu.tw

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Micro C/OS II Micro-Controller Operating Systems, Version 2

Jean J. Labresse, MicroC/OS-II: The Real-Time

Kernel, CMP Book, ISBN:1-57820-103-9

http://www.uCOS-II.com

http://www.ucos-ii.com/http://www.ucos-ii.com/http://www.ucos-ii.com/http://www.ucos-ii.com/

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Micro C/OS II

C

Preemptible priority-driven real-time scheduling.

550020KB

64 priority levels (max 64 tasks)

8 reserved for uC/OS-II

Each task is an infinite loop.

Deterministic execution times for most

uC/OS-II functions and services.

Nested interrupts could go up to 256 levels.

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Supports of various 8-bit to 64-bit platforms:x86, 68x, MIPS, 8051, etc

Easy for development: Borland C++compiler

and DOS (optional). However, uC/OS-II still lacks of the following

features:

Resource synchronization protocols. Sporadic task support.

Soft-real-time support.

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Getting started with uC/OS-II!

See how a uC/OS-II program looks like.

Learn how to write a skeleton program for uC/OS-

II.

How to initialize uC/OS-II?

How to create real-time tasks?

How to use inter-task communicationmechanisms?

How to catch system events?

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Mail Box

A mailbox is for data exchanging between tasks. A mailbox consists of a data pointer and a wait-list.

OSMboxPend(): The message in the mailbox is retrieved.

If the mailbox is empty, the task is immediately blocked and movedto the wait-list.

A time-out value can be specified.

OSMboxPost():

A message is posted in the mailbox. If there is already a message in the mailbox, then an error is

returned (not overwritten).

If tasks are waiting for a message from the mailbox, then the taskwith the highest priority is removed from the wait-list and scheduledto run.

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Message Queue

A message queue consists of an array of

elements and a wait-list.

Different from a mailbox, a message queue

can hold many data elements (in a FIFO

basis).

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Hooks (User Customizable)

void OSInitHookBegin (void)

void OSInitHookEnd (void)

void OSTaskCreateHook (OS_TCB *ptcb)

void OSTaskDelHook (OS_TCB *ptcb)

void OSTaskIdleHook (void)

void OSTaskStatHook (void)

void OSTaskSwHook (void) void OSTCBInitHook (OS_TCB *ptcb)

void OSTimeTickHook (void)

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Critical Section

A critical section is a portion of code that is not safe from raceconditions because of the use of shared resources. They can be protected by interrupt disabling/enabling interrupts or

semaphores.

The use of semaphores often imposes a more significant amount of

overheads. A RTOS often use interrupts disabling/enabling to protect critical

sections.

Once interrupts are disabled, neither context switches nor any otherISRs can occur.

Interrupt latency is vital to an RTOS!

Interrupts should be disabled as short as possible to improve theresponsiveness.

It must be accounted as a blocking time in the schedulabilityanalysis.

Interrupt disabling must be used carefully: E.g., if OSTimeDly() is called with interrupt disabled, the machine might hang!

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Real Time System

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(Task state)

OSStart()

OSIntExit()OS_TASK_SW()

Dormant

Ready

Running ISR

Waiting

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Waiting

Dormant

Ready Running

ISR

OSIntExit

OSMBoxPend()

OSQPend()OSSemPend()

OSTaskSuspend()

OSTimeDly()

OSTimeDlyHMSM()

OSMBoxPost()OSQPost()

OSPostFront()

OSSemPost()

OSTaskRusume()

OSTaskDlyResume()

OSTimeTick()

OSTaskDel()

OSTaskDel()

OSTaskCreate()OSTaskCreateExt()

Preempted

OSStart()

OSIntExit()OS_TASK_SW()

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TCB (Task Control Block)

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Ready List

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Ready List

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Ready List - Coding Style

Ready List if ((OSRdyTbl[prio >> 3] &= ~OSMapTbl[prio & 0x07]) == 0)

OSRdyGrp &= ~OSMapTbl[prio >> 3];

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Task Scheduling

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Task Scheduling

A context switch must save all CPU registers and PSW of thepreempted task onto its stack, and then restore the CPUregisters and PSW of the highest-priority ready task from itsstack.

Task-level scheduling will emulate that as ifpreemption/scheduling is done in an ISR. OS_TASK_SW() will trigger a software interrupt.

The interrupt is directed to the context switch handler OSCtxSw(),which is installed when uC/OS-II is initialized.

Interrupts are disabled during the locating of the highest-priorityready task to prevent another ISRs from making some tasksready.

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OSSchedLock()

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OSSchedUnLock()

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Statistics Task

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Interrupts

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Initialize

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Initialize

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Starting

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(1)

OSTaskCreate()

OSTaskCreateExt()

OSTaskDel()

OSStart() uCOSII

OSIntExit()

OS_TASK_SW()

Preempted

Interrput

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(2) OSMBoxPend()

OSQPend()

OSSemPend() (Semaphore)

OSTaskSuspend()

OSTaskResume()

OSTimeDly() Time Click ()

OSTimeDlyHMSM()

OSMBoxPost()

OSQPost()

OSSemPost() Semaphore

OSTaskDlyResume() uCOSII\LPC210x\CH11_uCOS-II\lpc2100\Os_cpu_a.s

http://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.shttp://localhost/var/www/apps/conversion/tmp/scratch_3/uCOSII/LPC210x/CH11_uCOS-II/lpc2100/Os_cpu_a.s