Understanding Remappable I/O Pins on the PIC24FJ256GB110 MCU · 2014-07-21 · Introduction: For...

Understanding Remappable I/O PinsUnderstanding Remappable I/O Pinsonon the thePICPIC2424FFJ256GB110J256GB110 MCU MCU

Version 1.00 – 6/2014 www.muniac.comBy Scott Bridgman

Microchip's PIC24FJ256GB110 PIM Module

Understanding Remappable I/O Pins Copyright MUNIAC, LLC. 2014

Remappable I/O Pins Page 1 of 17

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Introduction:

For those working with Microchip's PIC24FJ256GB110 advanced MCU, you have the option of remapping I/O pins for the peripheral devices contained within the chip. This means peripheral functions can be brought out to pins of your choosing. The 100 pin processor has a total of 32 output and 12 input pins that can be remapped. The 64 and 80 pin processors have less (See table 10-4, page 139 in Microchip's document DS39897c). The programming procedure for remapping input and output functions differ slightly. Having the ability to assign I/O pins to peripheral devices may help with laying out a PCB more efficiently by bringing I/O functions closer to sockets, chips and other components. To use this feature, you'll need to program the chip's special function registers that control the I/O assignments. You'll also need to manage the control register lock and control register select lock bits. These are provided as an extra measure of security to ensure the chip's I/O integrity doesn't become corrupted. Understanding how to use all of these features can be a bit confusing at first. The purpose of this document is to combine all the relevant remappable I/O pin information in one place, provide clear explanations on its usage and include C coding examples. This should help anyone laying out PCBs and/or wanting to learn how to program these features. This document is based on Microchip's PIC24FJ256GB110 family data sheet (document DS39897c) and borrows heavily from its content. All references to their document are included. Those serious about using the PIC24FJ256GB110 should download their data sheet and study the sections of interest. It can be downloaded as a PDF from their website. Section 10.0 I/O Ports (page 133) is the chapter that explains how the remapping of I/O pins works.

TABLE 1: (Sorted by processor pin number)

PIC24FJ256GB110 Remappable I/O Pin and Physical Processor Pin Numbers

- Data Direction Supported - - Remappable I/O Pin - - Processor Pin Number -

INPUT only RPI38 6

INPUT only RPI39 7

INPUT only RPI40 8

INPUT only RPI41 9

INPUT and OUTPUT RP21 10




INPUT only RPI33 18

INPUT only RPI34 19





TABLE 1: (Sorted by processor pin number - Continued)




NULL RP0 25






INPUT only RPI32 40



INPUT only RPI43 47







INPUT only RPI36 66

INPUT only RPI35 67






INPUT only RPI37 74




INPUT only RPI42 79



TABLE 1: (Sorted by processor pin number - Continued)




Page 7 (Microchip's DS39897c) shows the layout of the 100 pin TQFP for the PIC24FJ256GB110 MCU. Table 1 above breaks out all the remappable pins sorted by pin number. Table 2 below breaks out all the remappable pins sorted by function number. These are shown in bold face type on the chip pin layout diagram. It's difficult to find these amongst all the other information associated with pins. Tables 1 and 2 should make finding the remappable pins a bit easier. The 100 pin device includes 32 digital outputs (remappable) and 12 digital inputs (remappable). In actuality, only 31 working digital outputs exist as RP0 is NULL which disables the RPn output function. The 64 and 80 devices include fewer numbers of these remappable pins.

TABLE 2: (Sorted by remappable function)



NULL RP0 25



















TABLE 2: (Sorted by remappable function - Continued)

















INPUT only RPI32 40

INPUT only RPI33 18

INPUT only RPI34 19

INPUT only RPI35 67

INPUT only RPI36 66

INPUT only RPI37 74

INPUT only RPI38 6

INPUT only RPI39 7

INPUT only RPI40 8

INPUT only RPI41 9

INPUT only RPI42 79

INPUT only RPI43 47


Registers Associated with PPS:

Microchip refers to the remapping feature as Peripheral Pin Select or PPS for short. The SFR (special function registers) names associated with PPS mapping are RPINRx for input and RPORx for output. The 'x' refers to the specific register associated with a given peripheral I/O function. Two additional registers OSCCON (IOLOCK bit 6) and CW2 (IOL1WAY bit 4) manage the write lock and unlock as well as only allowing 1 write to occur. The single write has been provided as an added measure of protection. Device power on reset (POR) clears the IOLOCK bit and sets the IOL1WAY. After POR, an application can write to the PPS registers, but only once.

Table 3 shows all the input sources that can be remapped to RPIn processor pins. The corresponding register and mapping bits within that register must be programmed.

TABLE 3: (See Microchip DS39897c Page 137)

Selectable Input Sources (Maps Input To Function)

InputName

FunctionName

SF RegisterName

Function Mapping Bits

External Interrupt 1 INT1 RPINR0 INT1R<5:0>




Input Capture 1 IC1 RPINR7 IC1R<5:0>









Output Compare Fault A OCFA RPINR11 OCFAR<5:0>

Output Compare Fault B OCFB RPINR11 OCFBR<5:0>

SPI1 Clock Input SCK1IN RPINR20 SCK1R<5:0>

SPI1 Data Input SDI1 RPINR20 SDI1R<5:0>

SPI1 Slave Select Input SS1IN RPINR21 SS1R<5:0>




TABLE 3: Continued (See Microchip DS39897c Page 137)

Selectable Input Sources (Maps Input To Function)

InputName

FunctionName

SF RegisterName

Function Mapping Bits





Timer2 External Clock T2CK RPINR3 T2CKR<5:0>




UART1 Clear To Send U1CTS RPINR18 U1CTSR<5:0>

UART1 Receive U1RX RPINR18 U1RXR<5:0>







Table 4 below shows all the output sources whose function can be remapped to RPn processor pins. The RPORn register must be set with the output function number to make the assignment. A key difference between pin select and non pin select peripherals is that pin select peripherals are not associated with a default I/O pin. The peripheral must always be assigned to a specific I/O pin before it can be used. In contract, non pin select peripherals are always available on a default pin, assuming that the peripheral is active and not conflicting with another peripheral.


TABLE 4: (See Microchip DS39897c Page 138)

Selectable Output Sources (Maps Function To Output)

Output Function Number (1) Function Output Name

0 NULL (2) Null

1 C1OUT Comparator 1 Output


3 U1TX UART1 Transmit

4 U1RTS (3) UART1 Request To Send



7 SDO1 SPI1 Data Output

8 SCK1OUT SPI1 Clock Output

9 SS1OUT SPI1 Slave Select Output




18 OC1 Output Compare 1

















TABLE 4: Continued (See Microchip DS39897c Page 138)

Selectable Output Sources (Maps Function To Output)

Output Function Number Function Output Name


37-63 OC9 36 (unused) NC

Notes 1: Setting the RPORx register with the listed value assigns that output function to the associated RPn pin.2: The NULL function is assigned to all RPn output pins at device reset and disables the RPn output function.3: IrDA BCLK functionality uses this output.

Peripheral Pin Select Registers:

The PIC24FJ256GB110 family of devices implements a total of 37 registers for remappable peripheral configuration. 21 of these are used for input remapping and 16 are used for output remapping. Registers are 16 bits wide with each byte devoted to a value. Only the lower order 6 bits are used, however. And not all registers utilize both bytes. The diagram below shows how the peripheral pin select input/output registers are organized.

Peripheral Pin Select Input/Output Register Format

High Order Byte Low Order Byte

X X B13 B12 B11 B10 B9 B8 X X B5 B4 B3 B2 B1 B0

X – Denotes unimplemented bit. Read as 0. B0 and B8 are the least significant bits.

By convention each register has a predefined name which the C compiler will recognize. In the case of the PIC24FJ256GB110 its device header file (p24FJ256GB110.h) contains the macros for the register names and the structures to allow access to single or groups of bits. This makes assigning values much easier and more understandable than it would be otherwise. Table 5 below summarizes the peripheral pin select input registers and indicates which input functions they assign.

TABLE 5: (Microchip DS39897c pages 141-151)

Peripheral Pin Select Input Registers

Register Name High Order Byte <15:8> (1) Low Order Byte <7:0> (1)

RPINR0 INT1 Not Used

RPINR1 INT3 INT2

RPINR2 Not Used INT4

RPINR3 T3CK T2CK

RPINR4 T5CK T4CK


TABLE 5: Continued (Microchip DS39897c pages 141-151)

Peripheral Pin Select Input Registers


RPINR7 IC2 IC1

RPINR8 IC4 IC3

RPINR9 IC6 IC5

RPINR10 IC8 IC7

RPINR11 OCFB OCFA

RPINR15 IC9 Not Used

RPINR17 U3RX Not Used

RPINR18 U1CTS U1RX

RPINR19 U2CTS U2RX

RPINR20 SCK1 SDI1

RPINR21 U3CTS SS1

RPINR22 SCK2 SDI2

RPINR23 Not Used SS2

RPINR27 U4CTS U4RX

RPINR28 SCK3 SDI3

RPINR29 Not Used SS3

Note 1: Only the lower 6 bits are used in this byte. Register numbering isn't contiguous.

The balance of the 37 registers are used to control peripheral pin output selection. Table 6 below summarizes the output registers and indicates which output functions they assign.

TABLE 6: (Microchip DS39897c pages 151-159)

Peripheral Pin Select Output Registers


RPOR0 RP1 RP0

RPOR1 RP3 RP2

RPOR2 RP5 RP4

RPOR3 RP7 RP6

RPOR4 RP9 RP8

RPOR5 RP11 RP10

RPOR6 RP13 RP12


TABLE 6: Continued (Microchip DS39897c pages 151-159)

Peripheral Pin Select Output Registers


RPOR7 RP15 RP14

RPOR8 RP17 RP16

RPOR9 RP19 RP18

RPOR10 RP21 RP20

RPOR11 RP23 RP22

RPOR12 RP25 RP24

RPOR13 RP27 RP26

RPOR14 RP29 RP28

RPOR15 RP31 RP30

Note 1: Only the lower 6 bits are used in this byte.

Programming The Registers:

To use pin select peripherals like the UART and other devices, the RPORn and RPINRn registers must be programmed. This ensures the peripheral's I/O becomes available on the processor's pins. Input and output are handled in slightly different ways. Note that an input function can be assigned to either an RPn or RPIn pin where as an output function can only be assigned to an RPn pin. Microchip has provided macros to help make the I/O pin assignments easier and clearer to understand. (See the reference section at the end of this document for a listing of available macros.) You can also search p24FJ256GB110.h to find these. To assign a peripheral's digital output to one of the processor's RPn pins follow the steps below:

1) Look in Table 1 for the processor pin # to see which output RPn it corresponds to.2) Look in Table 6 for the output register name (RPORn) that corresponds to the RPn remappable pin. Most registers can map two pins.3) Look in Table 4 to locate the output function number for the peripheral output.4) Set that register's byte (high order or low order) to the output function number.

As an example, let's assign UART2's transmit (TX) function to pin 50 of the processor. Looking in Table 1 for pin 50 we see it corresponds to RP17. Looking in Table 6 for RP17 we find its register name is RPOR8. Looking in Table 4 we determine UART2's output function number that corresponds to transmit (TX) is 5. Table 5 tells us register RPOR8's high order byte must be used to make the assignment. Using the predefined macros in the device header file, the C code below is required to assign UART2's transmit function to physical processor pin 50.

RPOR8bits.RP17R = 5; // PPS - Configure U2TX - put on pin 50 (RP17)


When peripherals contain both a digital input and output, two assignments (one for input and one for output) will need to be made. To assign a peripheral's digital input to one of the processor's RPn or RPIn pins follow the steps below:

1) Look in Table 1 for the processor pin # to see which RPn or RPIn it corresponds to.2) Look in Table 3 to determine the register name (RPINRn) for the peripheral's input function.3) Look in Table 5 for the input register name (RPINRn) that corresponds to the desired RPn or RPIn pin.4) Set that register's byte (high order or low order) to the “n” portion which is the RP or RPI remappable pin number.

Continuing with our UART2 example, we want to assign its input (RX) to physical processor pin 49. Looking in Table 1 we see pin 49 corresponds to RP10. This pin can either be an input or an output. Looking in Table 3, UART2's receive function (U2RX) is assigned through input register RPINR19. Table 5 tells us register RPINR19's low order byte must be used for the assignment. Using the predefined macros in the device header file, the C code below is required to assign UART2's receive function to physical processor pin 49.

RPINR19bits.U2RXR = 10;// PPS - Configure U2RX - put on pin 49 (RP10)

Again it's important to point out that pin selectable peripheral devices are assigned to the NULL function effectively making them inaccessible to the outside world. Thus a pin assignment must be made to use the peripheral.

See the p24FJ256GB110.h reference at the end of this document for available macros.

IOLOCK and IOL1WAY:

For security and integrity purposes, the PIC24FJ256GB110 has an IOLOCK bit that prevents writing to the remapping registers. An additional IOL1WAY bit restricts writing to the registers only once. That means after an assignment(s) is made it can't be changed. The IOL1WAY bit also blocks the IOLOCK bit from being cleared. The MCU must be reset to remove this restriction. After POR (power on reset) the IOLOCK bit is cleared and the IOL1WAY is set. With the IOLOCK bit set, writes to the remapping register will appear to complete but no value(s) will be changed.

Setting and clearing the IOLOCK bit must be done via a timed code sequence. This can be accomplished using in line assembly code or the built in macro. See the example C code below for the built in macro:

__builtin_write_OSCCONL(OSCCON $ 0xBF); // Clear IOLOCK bit__builtin_write_OSCCONL(OSCCON | 0x40); // Set IOLOCK bit

Refer to DS39897c page 139 and 140 for more information on IOLOCK and IOL1WAY.


The PIC24FJ256GB110 processor has three configuration words (CW1 – CW3) located in the upper portion of the program memory space. (See DS39897c page 287-292 for more information.) Since these are beyond the user program memory space they can only be accessed using table reads/writes. The IOL1WAY bit is contained in CW2 bit 4. A device configuration macro has been provided to manipulate this bit. See the C code examples below for setting and clearing the IOL1WAY bit:

#define IOL1WAY_OFF 0xF7EF // Found in p24FJ256GB110.h#define IOL1WAY_ON 0xF7FF

_CONFIG2(FCKSM_CSDCMD & OSCIOFNC_OFF & POSCMOD_XT & FNOSC_PRIPLL & PLLDIV_DIV2 & IESO_OFF & DISUVREG_OFF & PLL_96MHZ_ON & IOL1WAY_ON) // Write RP Registers Once IOL1WAY bit set

_CONFIG2(FCKSM_CSDCMD & OSCIOFNC_OFF & POSCMOD_XT & FNOSC_PRIPLL & PLLDIV_DIV2 & IESO_OFF & DISUVREG_OFF & PLL_96MHZ_ON & IOL1WAY_OFF) // Write RP Registers Once IOL1WAY bit cleared

These PRAGMAs as they are called must appear in the beginning of the application program. These are defined in the device header file p24FJ256GB110.h. Three of them exist allowing access to all three of the flash configuration words. As mentioned, macro _CONFIG2 (configuration word CW2) provides access to IOL1WAY bit.


PIC24FJ256GB110 Device Header Reference:

The following information has been extracted from the device header file p24FJ256GB110.h This is located in C:\Program Files\Microchip\mplabc30\v3.31\support\PIC24F\h for those with the C30 tool suite installed.

TABLE 7: (see p24FJ256GB110.h)

C Programming Macros for Peripheral Pin Select Input Registers

- C Macro Line - - Input Function Name -

RPINR0bits.INT1R = “RP or RPI Number”; External Interrupt 1

RPINR1bits.INT2R = External Interrupt 2



RPINR3bits.T2CKR = Timer2 External Clock




RPINR7bits.IC1R = Input Capture 1








RPINR11bits.OCFAR0 = Output Compare Fault A

RPINR11bits.OCFBR0 = Output Compare Fault B


RPINR17bits.U3RXR = UART3 Receive


RPINR18bits.U1CTSR = UART1 Clear To Send



RPINR20bits.SDI1R = SPI1 Data Input

RPINR20bits.SCK1R = SPI1 Clock Input


TABLE 7: Continued (see p24FJ256GB110.h)

C Programming Macros for Peripheral Pin Select Input Registers

- C Macro Line - - Function Name -

RPINR21bits.SS1R = SPI1 Slave Select Input










Table 8 lists all the macros for assigning peripheral output functions. The output function numbers are listed in Table 4.

TABLE 8: (see p24FJ256GB110.h)

C Programming Macros for Peripheral Pin Select Output Registers

- C Macro Line - - Remappable Pin Number -

RPOR0bits.RP0R = “Output Function Number” RP0 (NULL Function)

RPOR0bits.RP1R = RP1














TABLE 8: Continued (see p24FJ256GB110.h)

C Programming Macros for Peripheral Pin Select Output Registers

- C Macro Line - - Remappable Pin Number -




















The information presented in this document was extracted from Microchip's PIC24FJ256GB110 data sheet. Their document number DS39897c.

The macros were extracted from Microchip's device header file p24FJ256GB110.h which is included with the MPLAB download.

Please direct any comments, suggestions, questions or corrections to [email protected] I hope this basic document has been helpful to those needing to understand and program the remappable I/O pins on the PIC24FJ256GB110 advanced MCU. It is also good practice to study the original documents/files for more detailed information.

MUNIAC, [email protected] 2014 MUNIAC, LLC. All rights reserved.


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Understanding Remappable I/O Pins on the PIC24FJ256GB110 MCU · 2014-07-21 · Introduction: For...

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