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UNIT II Introduction

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    UNIT IIProgrammers Model for Intel 8086

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    Introduction

    8086 has 20 address lines, ie 1 MB of memoryThe memory has further divided in to 4segmentsEach has 64 KB memory segmentThere are four different 64 KB segments for instructions

    The functions of segment registers are to storethe starting address of the segments in thememory.

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    Introduction

    Code segment (CS)Stack segment (SS)Data segment (DS)Extra segment(ES)

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    Introduction

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    IntroductionAll general registers of the 8086microprocessor be used for arithmetic andlogic Operations

    The l6 bit general registers are:Accumulator register (AX)

    Base register (BX)Count register (CX)Data register (DX)

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    Introduction

    It consists of two 8-bit registers AL and AH,which can be combined together and used

    as a l6-bit register AX.

    Similar for BX, CX and DX

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    Introduction

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    Accu m u lator Register:

    Accumulator can be used for I/O operations

    and string manip u lation

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    Base register:

    BX register usually contains a data pointer used for based, based indexed or

    Register in dire c t addressing .

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    Co u nt register

    Count register can be used as a count instring manip u lation and shift/rotate

    instr uc tions.

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    Data register

    Data register can be used as a port number in I/O operationsIn integer 32-bit m u ltiply and divide instr uc tion

    DX register contains high-order word of the initial or resultingnumber.

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    S egment Registers

    Code segment ( CS)

    It is an l6-bit register containing address of 64 KBsegment with pro c essor instr uc tions.

    The processors uses CS register for all a cc esses toinstructions referenced by instr uc tion pointer (IP )register CS register c annot be c hanged dire c tly .

    The CS register is automatically updated during FA RJUMP, F A R CALL and F A R RET instr uc tions.

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    S egment Registers

    Data segment ( DS)It is a 16-bit register containing address of 64KBsegment with program data .

    By default, the processor assumes that all datareferenced by general registers

    (AX, BX, CX, DX) and index register (SI, DI) is locatedin the data segment

    DS register can be c hanged dire c tly using POP andL DS instructions.

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    S egment Registers

    Extra segment (E S)

    It is a 16-bit register containing address of 64KBsegment, usually with program data.

    the processor assumes that the DI register referencesthe ES segment in string Manipulation instructions ESregister can b e c hanged dire c tly u sing POP and L ES

    instr uc tions .

    It is possible to change defaults segments used bygeneral and index registers by prefixing instructions with

    a CS , SS , DS or E S prefix.

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    Pointer Registers

    S tack

    Pointer ( S P )

    It is an l6-bit register pointing to program sta ck .

    Base Pointer ( BP )

    It is an l6-bit register pointing to data in the sta ck segmentBP register is usually used for based, based indexedor register indire c t addressing.

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    Index Registers

    S ou

    r c

    e Index ( S I)

    It is an l6-bit register.

    SI is used for indexed, based indexed and register indire c t addressing,

    Also a sou

    r c

    ed data addressing stringmanip u lation instructions.

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    Index Registers

    Destination Index ( DI)

    It is a l6-bit register

    DI is also used for indexed, based indexed andregister indire c t addressing

    Also a destination data addressing stringmanip u lation instr uc tions .

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    Instr uc tion Pointer (IP )It is a 16-bit register

    The operation is same as the Program Counter

    The IP register is updated by the BIU to point to theaddress of the next instruction.

    Programs do not have direct access to the IP

    During execution of a program the IP can be modified or saved and restored from the stack.

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    Flag register 6 status flags and 3 Control flags

    It is a l6-bit register containing nine l-bit flags

    Six status or condition flags ( OF, S F, ZF, A F, PF, CF)

    Three control flags ( TF, DF, IF )

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    Flag register Overflow Flag (OF ) - set if the result is too large positiven u mber or is too small negative n u mber to fit into destinationoperand.

    S ign Flag ( S F) - set if the most significant bit of the result is set.

    Zero Flag (ZF ) - set if the result is zero .Au xiliary c arry Flag ( A F)- set if there was a carry from or borrow to bits 0-3 in the AL register.

    Parity Flag (PF ) - set if parity (the number of "1" bits) in thelow-order byte of the result is even.

    Carry Flag ( CF) - set if there was a carry from or borrow to themost significant bit during last result calculation

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    Flag register

    Trap or S ingle-step Flag(TF )- if set then single-stepinterrupt will occur after the next instruction.

    Dire c tion Flag ( DF) - if set then string manipulationinstructions will auto decrement index registers. If cleared then theindex registers will be auto incremented.

    Interr u pt-enable Flag (IF ) - setting this bit enables maskableinterrupts.

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    Memory Write operation:

    To execute Memory Write Operation,

    the CPU places the value zero on the data bus, the

    address(say 1250H ) on the address bus,

    Asserts the w rite line (since the CPU is writing data to

    memory).

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    Memory Write operation:

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    Memory Read operation:

    To execute Memory Read Operation,

    the CPU places the address (say1 250H) on theaddress bus, assert the read line

    Then reads the resulting data from the data bus.

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    Memory Read operation:

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    Memory Organization:

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    Instr uc tion S et:

    Intel 8086 has approximately 117 instr uc tions .

    These instructions are used to transfer data betweenregisters, register to memory , memory to register or register to I/O ports and other instructions are used for data manipulation

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    Instr uc tion S et:8086 instruction set consists of

    Data moving instr uc tions .

    A rithmeti c instr uc tions - add, subtraction, incrementdecrement convert byte/word and compare.

    L ogi c instr uc tions - AND, OR, exclusive OR,shift/rotate and test.

    S tring manip u lation instr uc tions - load, store, move,compare and scan for byte/word.

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    Instr uc tion S et:

    Control transfer instr uc tions - conditional,unconditional, call subroutine and return fromsubroutine.

    Inp u t/O u tp u t instr uc tions .

    Other instr uc tions - setting/clearing flag bits stackoperations, software interrupts, etc.

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    A ddressing modes:An addressing mode is the way the 8086 identifies theoperands for the instruction.All instructions that access the data use one or more of the addressing modes.The memory address of an operand consists of twocomponents:

    Starting address of the memory segment Offset

    The starting address of the memory segment resides inthe corresponding segment register.When an operand is stored in a memory location, theoperand's memory location is within a memory segmentfrom the starting address of the segment, is called

    Offset or Effective Address( EA).

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    A ddressing modes Conti.:An offset is determined by adding any combination of three address elements:

    Displa c ement, Base or Index .

    The combination depends on the addressing mode of

    the instruction.Displacement:

    It is an 8-bit or l6-bit immediate value given in theinstruction

    Base: It is the content of the base register, BX or BP

    Index: It is the content of the index register, SI or DI

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    A ddressing modes Conti.:

    Memory address = starting address of the

    memory segment + offset

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    A ddressing modes Conti.:The 8086 has the following addressing modes:

    Register Addressing Mode Immediate Addressing Mode

    Direct Addressing Mode

    Register Indirect Addressing Mode

    Base Addressing Mode

    Indexed Addressing Mode

    Based Indexed Addressing Mode

    String Addressing Mode

    I/O Port Addressing Mode

    Relative Addressing Mode Implied Addressing Mode

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    A ddressing modes Conti.:

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    A ddressing modes Conti.:

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    A ddressing modes Conti.:

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    A ddressing modes Conti.:

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    A ddressing modes Conti.:

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    A ddressing modes Conti.:

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    A ddressing modes Conti.:

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    A ddressing modes Conti.:

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    Data Transfer Instr uc tions :

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    Data Transfer Instr uc tions :

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    Data Transfer Instr uc tions :

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    Data Transfer Instr uc tions :

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    Data Transfer Instr uc tions :

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    Data Transfer Instr uc tions :


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