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Synchronous Serial IO

• Send a separate clock line with data– SPI (serial peripheral interface) protocol

– I2C (or I2C) protocol

• Encode a clock with data so that clock be extracted or data has guaranteed transition density with receiver clock via Phase-Locked-Loop (PLL)– IEEE Firewire (clock encoded in data)

– USB (data has guaranteed transition density)

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Serial Peripheral Interface (SPI)

SDI: data in

SDO: data out

SCK: clock

© Charles River Media 2005

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CKE configuration bit allows either falling or rising edge of clock to be used, while CKP selects clock polarity.

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SPM bit selects whether data is sampled in middle of clock period or at end of clock period.

Between the CKP, CKE, SPM bits there is a lot of flexibility in how data is clocked in. Can make the SPI protocol work with just about any serial device.

© Charles River Media 2005

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Multiple SPI peripherals each require a separate chip select line via parallel port line. We will concentrate on the I2C serial bus as it does not require use of chip selects.

© Charles River Media 2005

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I2C (Inter-Integrated-Circuit) BusI2C is a two wire serial interface.

18F242

SDA

Microchip 24LC515

SDA

A2SCL

10K

10K

SCL

Vdd

VddA1

A0

SDA

A2SCL

A1

A0

SCL – clock line

SDA – data (bidirectional)

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What is a bus??

© Charles River Media 2005

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Ethernet is a example of a bus

© Charles River Media 2005

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I2C Features

• Multiple receivers do not require separate select lines as in SPI– At start of each I2C transaction a 7-bit device address is

sent– Each device listens – if device address matches internal

address, then device responds

• SDA (data line) is bidirectional, communication is half duplex

• SDA, SCLK are open-drain, require external pullups – Allows multiple bus masters (will discuss this more

later).

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I2C Bus Addressing

© Charles River Media 2005

No chip selects needed!!!!!

pullups are needed

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I2C Bus Transfer

Multiple bytes sent in a transaction; every 8 bits has a 9th bit that is an acknowledge.

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Write (master to slave)

Read (master from slave)

Master initiates all transactions, read or write.

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Example: I2C Serial EEPROM

Will use the Microchip 24LC515 Serial EEPROM to discuss I2C operation.

The 24LC515 is a 64K x 8 memory. This would require 16 address lines, and 8 data lines if a parallel interface was used, which would exceed the number of available IO pins our PIC18F242!!!

Putting a serial interface on a memory device lowers the required pin count.

Reduces speed since data has to be sent serially, but now possible to add significant external storage to a low pin-count micro controller.

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I2C Device AddressingEach I2C device has either a 7-bit or 10-bit device address.

We will use an I2C EEPROM and an I2C DAC (Digital-to-Analog Converter, MAX517) in lab. Both of these devices have a 7-bit address.

Upper four bits are assigned by device manufacturer and are hardcoded in the device. Lower three bits are used in different ways by manufacturer.

Microchip 24LC515

SDA

A2SCL

A1

A0

LC515 control byte (contains slave address):

7 6 5 4 3 2 1 0

1 0 1 0 B0 A1 A0 R/W

‘B0’ is block select (upper/lower 32K). A1, A0 are chip selects, four devices on one bus.

R/W = 1 for read, 0 for write.

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I2C Transmission

START: high to low transition on SDA while SCL high.

IDLE: SCL, SDA high.

Valid data: While clock is high, data valid and stable.

Data changes while clock is low.

STOP: low to high transition on SDA while SCL high.

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AcknowledgementACK sent by slave after every 8-bits received. Master releases line (stops driving), samples line on next clock.

Slave MUST pull line low. If Master does not detect ACK, then sets error bit. If Slave does not pull line low, the pullup resistors will pull the line low.

Most common cause of ACK error – incorrect device address.

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Byte Write Operation

• Byte Write: used to write one byte– Send Control Byte, High address byte, low address

byte, data.– After data is sent, takes 5 ms for write to complete– SLOOOOOWWWWWW....

‘X’ because block select bit chooses high or low 32K.‘0’ indicates write mode.

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Page Write Operation• Send a block of 64 bytes, then perform write

– Send starting address, followed by 64 bytes

– After 64 bytes sent, wait 5 ms for write to complete

– Much faster than individual writes

Address should be on a page boundary. For page size = 64 = 0x40, starting address should be a multiple of 64.

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Speed Comparison

• Assume a 400 Khz I2C bus, 2.5 us clock period (2.5 e-6)

• Random write:– 9 bit transmission = 2.5 us * 9 = 22.5 us

– 5 ms + 22.5 us* 4 (control,addhi,addlo,data) =5.09 ms

– For 64 bytes = 325 ms approximately, not counting software overhead.

• Page Write– 67 bytes total (control, addhi, addlo, data)

– 5 ms + 67 * 22.5 us = 6.5 ms!!!

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Checking for end-of-write

Timing on write is guaranteed to finish after 5 ms. But can end sooner; to determine if write finished use polling method.

No ACK means device is still busy with last write.

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Read Operation: Current Address

• An internal counter is used to keep track of last address used

• A current address read uses this address, only sends the command byte– Internal counter incremented after read operation

‘1’ indicates read operation

‘no ack’ because slave is driving data back to master.

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Random Read Operation

• Must first set the internal address counter by starting a write operation, but aborting by not sending data byte

Current address readAborted random write (address only, no data)

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Sequential Read• Like a current address read, but after Slave sends

data byte, Master sends ACK instead of STOP– Slave then sends next byte

– Can do this from 0x0000h to 0x7FFF (lower 32K block). When 0x7FFF is reached, address rolls over to 0x0000

– Upper block goes from 0x8000 to 0xFFFF; at 0xFFFF address rolls over to 0x8000

– Internal address counter is only 15 bits wide.

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PIC18 I2C Registers• Synchronous Serial Port on PIC implements I2C• Registers are:

– SSPCON – control register - we will always set this to 0x28 which enables I2C MASTER mode.

– SSPCON1 – control register - used to initiate a START/STOP conditions, indicates if ACK has been received

– SSPSTAT – status register – check this to see if byte finished transmitting, or byte has been received

– SSPBUF – read/write to this register for data transfer

– SSPADD – used to control clock rate

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I2C on the PIC18

• Will always use master mode on the PIC18– This means that the PIC will always initiate all I2C bus

activity

• To set I2C clock rate, write 8-bit value to the SSPADD register– Clock rate = Fosc/(4 *(SSPADD+1))

• I2C standard defines 100 KHz and 400 KHz but in reality just about any clock rate from DC to 400 KHz works

Clock Rate formula in SSPCON1 description, page 136 of datasheet (page 138 PDF page), section 15-4 of datasheet

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Lab #8: Read/Write to Serial EEPROM

• Lab #8 has you read/write to a Serial EEPROM via the I2C bus

• The files i2cmsu.h, i2cmsu.c define interface subroutines for the I2C bus

• This file i2c_memutil.c has subroutines for random read/write, block read/write for the serial eeprom

• The file i2cmemtst.c tests uses the subroutines to read/write data to the serial EEPROM.

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i2cmsu.c Subroutines

• i2c_idle() – wait for idle condition on I2C bus• i2c_Start() – send a START and wait for START

end• i2c_Stop() – send a STOP and wait for STOP end• i2c_doAck() – do an ACK cycle• i2c_doNak() – do a NACK cycle• i2c_WriteTo(address) – do a i2c_Start(), then send

address to I2C bus.• i2c_PutByte(byte) – write byte to I2C, wait for

finish, then get an ACK• i2c_GetByte() – get a byte from I2C bus

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Watchdog Timer Use

The I2C subroutines assume the watchdog timer is enabled, so the statement:

asm(“clrwdt”);

is used in subroutines to clear the watchdog timer.

It is NOT used in loops which wait for ACK bits from peripherals; we want the watchdog timer to expire if a peripheral does not repond with an ACK bit.

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Random Read: memread(cmd,addr)cmd is unsigned char that has EEprom i2c device address

addr is unsigned char is memory address within EEprom

i2c_Writeto (write_cmd)

i2c_PutByte (address_hibyte)

i2c_PutByte (address_lobyte)

i2c_Stop()

i2c_Writeto (read_cmd)

i2c_GetByte ()

i2c_Stop()

Set internal address counter.

Read byte from current address

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memread(cmd,addr)

/* random read */unsigned char mem_read(unsigned char cmd,int addr) { unsigned char hbyte, lbyte, val;

if (addr & 0x8000) { // if MSB set , set block select bit cmd = cmd | 0x08; } hbyte = (addr >> 8) & 0x7F; // high address byte lbyte = (addr) & 0xFF; // low address byte i2c_WriteTo(cmd); // send write cmd, do this to set address counter i2c_PutByte(hbyte); // send high address byte i2c_PutByte(lbyte); // send low address byte i2c_Stop(); // send stop cmd = cmd | 0x1; // set read bit i2c_WriteTo(cmd); // send read cmd, address set by previous cmd val = i2c_GetByte(); // read data i2c_Stop(); // send stop return(val);

}

Does a random read of EEPROM

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Page Writei2c_Writeto (write_cmd)

i2c_PutByte (address_hibyte)

i2c_PutByte (address_lobyte)

i2c_PutByte (); i++

i2c_Stop()

i = 0;

i = 64?

set starting address.

Send 64 bytes.

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Page (Block) Write/* block write */void block_mem_write(unsigned char cmd,int addr, char *buf) { unsigned char hbyte, lbyte, val;

hbyte = (addr >> 8) & 0x7F; // high address byte lbyte = (addr) & 0xFF; // low address byte i2c_WriteTo(cmd); // send write cmd i2c_PutByte(hbyte); // send high address byte i2c_PutByte(lbyte); // send low address byte for (k=0;k<64;k++) { //i2c_PutByte(buf[k]); // send data i2c_FastPutByte(buf[k]); // send data } i2c_Stop();

//DelayMs(5); // no need to delay, will not be back here for 5 ms

}

FastPutByte does not check for idle condition before sending data.

Uncomment if subroutine called more often than 5 ms.

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Block Readi2c_Writeto (write_cmd)

i2c_PutByte (address_hibyte)

i2c_PutByte (address_lobyte)

i2c_Stop()

i2c_Writeto (read_cmd)

i2c_GetByte (); i++

i2c_Stop()

i2c_doAck();

set starting address.

Send read command

i = 64?

Use sequential read to get 64 bytes.

Sequential read can read up to 32K, block size of 64 bytes was arbitrary

no

yes

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Block Read in C/* block read */void block_mem_read(unsigned char cmd,int addr,char *buf) { unsigned char hbyte; unsigned char lbyte; unsigned char k; if (addr & 0x8000) { // if MSB set , set block select bit cmd = cmd | 0x08; } hbyte = (addr >> 8) & 0x7F; // high address byte lbyte = (addr) & 0xFF; // low address byte i2c_WriteTo(cmd); // send write cmd, do this to set address counter i2c_PutByte(hbyte); // send high address byte i2c_PutByte(lbyte); // send low address byte i2c_Stop(); // send stop cmd = cmd | 0x1; // set read bit i2c_WriteTo(cmd); for (k=0;k<64;k++){ buf[k] = i2c_GetByte(); // read data if (k== 63) i2c_Stop(); // last byte, so send stop else i2c_doAck(); // do ack if not at end }

}

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EEPROM Test: memblk.c memblk.c tests serial EEPROM by doing block read/write to EEPROM.

printf("Enter 'w'(write), or 'r' (read): "); pcrlf (); inchar=getch(); if (inchar == 'w') { pcrlf (); printf("Capturing next 64 bytes for write to memory"); pcrlf (); for (i=0;i<64;i++) { buf[i] = getch(); } printf("Block write to memory"); pcrlf (); for (i=0;i<64;i++) { printf("Write at %d, val: %x (%c) \n",i,buf[i], buf[i]); pcrlf (); } block_mem_write(ROM,0,buf); printf("Mem Write complete"); pcrlf ();} elsif...

From main(), ask user for write or read test.

Get 64 bytes from serial port, save in buffer.

Print bytes before write to EEPROM.

Write bytes to EEPROM at address 0.

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EEPROM Test: memblk.cprintf("Enter 'w'(write), or 'r' (read): "); pcrlf (); inchar=getch(); if (inchar == 'w') { // see previous slide}else if (inchar == 'r') { printf("###Reading first 64 memory locations, via a block read"); pcrlf (); block_mem_read(ROM,0,buf); for (i=0;i<64;i++) { printf("Read %d, val: %x (%c) \n",i,buf[i], buf[i]); pcrlf (); } pcrlf (); printf("###Mem Read complete"); pcrlf (); }

Read 64 bytes from address 0, store in buffer.

Print the 64 bytes read from EEPROM, hopefully they will match what was written!

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i2c_idle()

i2c_idle(){

unsigned char byte1; unsigned char byte2;

do { byte1 = SSPSTAT & 0x04; // gte R/W bit. byte2 = SSPCON2 & 0x1F; }while (byte1 | byte2); asm(“clrwdt”);}

R/W bit, when ‘0’ then transmit is not in progress

Check if lower 5 bits are all ‘0’ indicating that Start, Stop, Acknowledge sequences are all idle.

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i2c_Start()/i2c_Stop()i2c_Start(){ i2c_idle(); /* initiate start, SEN=1 */ bitset(SSPCON2,0); /* wait until start finished */ while (bittst(SSPCON2,0)); asm(“clrwdt”);

}

begin START

wait for end

i2c_Stop() { i2c_idle();/* initiate stop, PEN=1 */ bitset(SSPCON2,2); /* wait until stop finished */ while (bittst(SSPCON2,2)); asm(“clrwdt”);}

begin STOP

wait for end

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i2c_PutByte()

i2c_PutByte(unsigned char byte) {

i2c_idle();

/* write data */ SSPBUF = byte; /* wait until finished */ while(bittst(SSPSTAT,2)); asm(“clrwdt”);

/* wait for acknowledge */

while(bittst(SSPCON2,6)); asm(“clrwdt”);}

i2c_FastPutByte deletes this call.

SSPBUF holds outgoing data

Cleared when transmit finished.

Cleared when ACK received.

If device does not respond with ACK bit, then Watchdog timer will expire.

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i2c_WriteTo

i2c_WriteTo(unsigned char addr) {

/* first, send start */ i2c_Start(); SSPBUF = addr; /* write data */

/* wait until finished */

while(bittst(SSPSTAT,2)); asm(“clrwdt”); /* wait for acknowledge */

while(bittst(SSPCON2,6)); asm(“clrwdt”);

}

SSPBUF holds outgoing data

Cleared when transmit finished.

Cleared when ACK received.

If device does not respond with ACK bit, then Watchdog timer will expire.

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i2c_GetByte()

unsigned char i2c_GetByte() {

unsigned char byte;

i2c_idle(); /* initiate read event */

bitset(SSPCON2,3); /* wait until finished */

while(bittst(SSPCON2,3));

while (!(bittst(SSPSTAT,0)));

byte = SSPBUF; /* read data */

return(byte);

}

Enable receive

Will be cleared when finished.

Receive buffer should be full

Get data

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Differences between i2c_WriteTo, i2c_PutByte, i2c_FastPutByte, i2c_GetByte()

• i2c_PutByte() sends one byte, checks for idle condition first.

• i2c_FastPutbyte is simply i2c_PutByte() without the idle check.– Executes faster than i2c_PutByte

• i2c_GetByte() gets reads one byte

• i2c_WriteTo() initiates a start condition first, then sends one byte.– i2c_WriteTo() used to send the first byte of a transaction

– i2c_PutByte or i2c_FastPutByte used to send remaining bytes of transaction.

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An I2C TransactionAn I2C transaction is an exchange of data between the PIC and an external device over the I2C bus. All transactions use the calls:

i2c_Start()

i2c_PutByte()

Start Transaction

Send device address

i2c_Writeto() combines these two actions

sequence of i2c_GetByte, i2c_PutByte()

Read/Write Datai2c_GetByte()

PICExternalDevice

i2c_PutByte()

PIC ExternalDeviceEnd Transaction i2c_Stop()

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Lab 9: I2C & Serial EEPROMGoal: Capture streaming data from serial port, store to serial EEPROM

Capture 64 bytes from serial port to buffer

Page Write of 64 bytes

Interrupt service routine stores bytes in a buffer.

Problem: While writing bytes to serial EEPROM, more bytes are arriving!!!

Solution: Use two buffers! Second buffer captures data while first buffer data written to EEPROM.

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Buffer A

Data

Buffer B

Interrupt Service Routine (ISR) fills data buffer, sets flag when data buffer is full. ISR is invoked for each new input character.

When main() sees that buffer is full, tells ISR to swap buffers, then empties the full buffer.

Empty buffer by writing contents to EEPROM, no longer need data after written to EEPROM.

swapped when full.

EEPROM

ISRmain()

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Two Buffers

Active buffer?

Save char in buff1

1

64 bytes?

Write_flag = 1

Save char in buff0

64 bytes?

Write_flag = 1

exit interrupt service

0

Char arrival triggers interrupt

no no

yes yes

Interrupt Service Subroutine

While writing data to EEPROM from one buffer, use other buffer to receive incoming data.

ISR sets write_flag to indicate to main() that 64 bytes has been received, and that block_mem_write() should be called.

active_buffer flag set by main() to indicate what buffer the ISR uses for byte storage.

At least one of the 64 byte buffers MUST be in bank1, not enough room for both in bank0.

ISR Flowchart

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Streaming Write Loop: main()Streaming Write Loop

Active buffer?

Page write buff1

1

Page write buff0

0

Write_flag?

1

0

Write_flag = 0addr = addr + 64

Active buffer = 1 Active buffer = 0

Wait for interrupt service routine to fill a buffer.

main() flowchart

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What do you have know?• Serial Peripheral Interface (SPI) – how is this

different from I2C?• I2C Protocol

– What is start, stop, ack conditions, purpose of each

– How is data sent, received

– Device addressing

• Serial EEPROM– Sequential, Random Read operations

– Random, Block Write operations