V Semester Sl. No. Subject Code Subject Credits 1 UEC511C Digital Signal Processing 4.0 2 UEC512C Digital Communication 4.0 3 UEC513C Circuit Design with VHDL 4.0 4 UEC514C Control Systems 4.0 5 UECXXXE Elective-I 3.0 6 UECXXXE Elective-II 3.0 7 UEC521L DSP and VHDL Lab 1.5 8 UEC522L Analog Communication Lab 1.5 Total 25 Elective-I Sl. No Subject Code Subject Credits 1 UEC515E Computer Organization 3.0 2 UEC516E Soft Computing 3.0 3 UEC517E Pulse and Switching Circuits 3.0 Elective-II Sl. No Subject Code Subject Credits 1 UEC518E Random Process 3.0 2 UEC519E Automotive Electronics 3.0 3 UEC520E Data Structures using “C” 3.0
Transcript
V Semester Sl. No. Subject Code Subject Credits
1 UEC511C Digital Signal Processing 4.0 2 UEC512C Digital Communication 4.0 3 UEC513C Circuit Design with VHDL 4.0 4 UEC514C Control Systems 4.0 5 UECXXXE Elective-I 3.0 6 UECXXXE Elective-II 3.0 7 UEC521L DSP and VHDL Lab 1.5 8 UEC522L Analog Communication Lab 1.5 Total 25
1 UEC518E Random Process 3.0 2 UEC519E Automotive Electronics 3.0 3 UEC520E Data Structures using “C” 3.0
DIGITAL SIGNAL PROCESSING Contact hours/week : 04 Credits : 04 Total lecture hours : 52 CIE marks : 50 Sub. Code : UEC511C SEE marks : 50 Department : Electronics and Communication Engg. Designation : Core Prerequisites : Signals and Systems
Course Objectives 1. To provide a broad treatment of digital signal processing concepts, techniques algorithms and applications. 2. To introduce Discrete Time Fourier Transform in detail. 3. To provide a comprehensive treatment of efficient computation methods of DFT. 4. To provide different design and implementation techniques of digital filters (FIR and IIR).
Course Outcomes A student who successfully completes this course should be able to 1. Appreciate the importance and scope of digital signal processing in various fields of science and engineering. 2. Characterize discrete time signals and their spectrum. 3. Compute DFT of a signal efficiently and know its importance in signal processing. 4. Design both FIR and IIR filters. 5. Realize FIR and IIR filters in different structure forms. The topics that enable to meet the above objectives and course Outcomes are given below
Syllabus Unit I (13 hours)
Discrete Fourier Transform: Frequency domain sampling and reconstruction of discrete time signals, DFT as a linear transformation, its relationship with other transforms, properties, multiplication of two DFTs, circular convolution, additional properties of DFT, use of DFT in linear filtering, overlap add and overlap save method.
Unit II (13 hours) Fast Fourier Transform Algorithms: Direct computation of DFT, Need for efficient computation of DFT, Radix 2 FFT algorithms for computation of DFT and IDFT: Decimation in time and decimation in frequency algorithms. Goertzel algorithm and chirp-Z transform algorithm.
Unit III (13 hours) IIR filter design: Characteristics of commonly used analog filters – Butterworth and Chebyshev filters. Design of IIR filters from analog filters (i.e. Butterworth and Chebyshev), Transformation techniques: Impulse invariance method, Approximation of derivative (Backward difference and Forward difference) method. Bilinear transformation method.
Unit IV (13 hours) FIR filter design: Introduction to FIR filters, Spectrum of different windows used in FIR filter design, Design of FIR filters using windowing (Rectangular, Hamming, Hanning and Bartlet) method, FIR filter design using frequency sampling method. Implementation of discrete time systems - Structures for IIR and FIR systems: Direct form I, Direct form II, Cascade and Parallel realization.
Reference Books Sl. No
Authors Title, publisher, edition, year
1 Proakis and Manolakis “Digital Signal Processing-Principles Algorithms and Applications” PHI Publication, III Edition, 1997.
2 Oppenheim and Schaffer “Discrete Time Signal Processing” PHI Publication, III Edition, 2003.
DIGITAL COMMUNICATION Contact hours/week : 04 Credits : 04 Total lecture hours : 52 CIE marks : 50 Sub. Code : UEC512C SEE marks : 50 Department : Electronics and Communication Engg. Designation : Core Prerequisites : Fundamental concepts of Analog Communication, Signals and Systems. Course Objectives
1. To understand the building blocks of digital communication system. 2. To understand the concept of various waveform coding techniques. 3. To understand and analyze the bandpass modulation techniques 4. To analyze error performance of a digital communication system in presence of noise and
other interferences. 5. To understand concept of spread spectrum communication system.
Course Outcomes A student who successfully completes this course should be able to
1. To design and implementation of sampling and reconstruction of low pass and bandpass signals
2. To design and implement uniform and non uniform quantizer and encoder for analog to digital conversion
3. To design and implement different digital modulation /demodulation techniques 4. To comprehend the concept of signals estimation detection and spread spectrum
communication The topics that enable to meet the above objectives and course Outcomes are given below
Unit I (13 hours) Sampling process: Sampling Theorem, quadrature sampling of Band pass signal, reconstruction of a message from its samples, signal distortion in sampling. Practical aspects of sampling and signal recovery, PAM, TDM
Unit II (13 hours) Waveform Coding Techniques: PCM, Channel noise and error probability, quantization noise and SNR, robust quantization. DPCM, DM, ADM, Applications: Digital multiplexers, T1 carrier system. Base-band shaping for Data Transmission: Discrete PAM signals, power spectra of discrete PAM signals, ISI, Ideal solution and Raised Cosine solution.
Unit III (13 hours) Digital Modulation Techniques: Digital Modulation formats, Coherent binary modulation techniques (ASK, PSK, FSK), Coherent quadrature modulation techniques (minimum shift
Unit IV (13 hours) Detection and Estimation: Gram-Schmidt Orthogonalization procedure, geometric interpretation of signals, response of bank of correlators to noisy input, detection of known signals in noise, probability of error. Spread Spectrum Modulation: Pseudo noise sequences, notion of spread spectrum, direct sequence spread coherent binary PSK, signal space dimensionality & processing gain, frequency hop spread spectrum. Reference Books
Sl. No
Authors Title, publisher, edition, year
1 Simon Haykin Digital communications, John Wiley, Edition 2003
2 B. P. Lathi and Zhi Ding
“Modern Digital & Analog Communication Systems”, 4th Edition.
3 Bernard Sklar and Prabitra kumary Ray
Digital Communication Fundamentals and Applications”, Pearson Publications, 2nd edition
4 Herbert Taub, Goutam Saha, Donald L. Schilling,
“Principles of Communication Systems”, 4th Edition.
5 K. Sam Shanmugan,
“Digital and Analog Communication Systems”, John Wiley & Sons, 2006.
CIRCUIT DESIGN WITH VHDL Contact hours/week : 04 Credits : 04 Total lecture hours : 52 CIE marks : 50 Sub. Code : UEC513C SEE marks : 50 Department : Electronics and Communication Engg. Designation : Core Prerequisites : UEC313C
Course Objectives: • To write program using Hardware Description Language (VHDL) to describe and
implement digital circuits and arithmetic circuits in FPGA. • To design digital and arithmetic circuits by writing VHDL code using different design
styles. • To write test benches using VHDL to automate simulation and verification of design. • To understand front end design style in VLSI. • To lean synthesis process of FPGA based designs.
Course outcomes A student who successfully completes this course should be able to
• Design combinational, sequential, arithmetic circuits by writing VHDL program. • Design digital circuits, arithmetic circuits using different design styles. • To write test benches to automate simulation and verification of design. • To understand synthesis of RTL based design in FPGA.
The topics that enable to meet the above objectives and course outcomes are given below
Unit I (13 hours)Introduction: VHDL, design flow, EDA tools, translation of VHDL code into circuits, circuit simulation, VHDL syntax, number and character representation in VHDL. Code structure: Fundamental VHDL units, VHDL libraries and packages, library/package declarations, entity, architecture, generic, coding guidelines, VHDL 2008, examples. Data types: Introduction, VHDL objects, data-type libraries and packages, Classification of standard data types, logic data types, unsigned and signed data types, fixed and floating point types, predefined data type summary, user defined scalar types, user defined array types, integer Vs enumerated indexing, array slicing, legal Vs illegal assignments.
Unit II (13 hours)Operators & Attributes: Introduction, predefined Operators, overloaded and user-defined operators, predefined attributes, user-defined attributes, synthesis attributes, Group, Alias. Concurrent Code: Introduction, using operators, the when statement, the select statement, the generate statement, implementing sequential circuits with concurrent code, implementing arithmetic circuits with operators, preventing combinational-Logic simplification, allowing multiple-signal assignments. Sequential Code: Introduction, Latches and flip-flops, Process, the if statement, the wait statement, the loop statement, the case statement, case Vs select, implementing combinational circuits with sequential code.
Unit III (13 hours)Signals and Variables: Introduction, signal, variable, signal Vs variable, the interference of registers, dual-edge circuits, making multiple signal assignments. Package and Component: Introduction, Package, Component, Generic Map, Component instantiation with Generate, Configuration, Block. Function and Procedure: Introduction, the assert statement, function, procedure, function Vs procedure summary, overloading.
Unit IV (13 hours)Simulation with VHDL Techniques: Introduction, Simulation Types, writing data to files, reading data from files, Graphical simulation (preparing the design), stimulus generation, general VHDL template for testbenches, Type I testbench (manual function simulation), Type II testbench (manual timing simulation), Type III testbench (Automated functional simulation), Type IV testbench (Automated timing simulation), Testbenches with Data files. VHDL Design of state machines: Introduction, VHDL template for FSMs, Poor FSM model, FSM encoding Styles, The state-bypass problem in FSMs, systematic Design Technique for timed machines, FSM with repetitive states, Other FSM designs.
Reference Books Sl. No
Authors Title, publisher, edition, year
1 Volnei A. Pedroni “Circuit Design and Simulation with VHDL”, 2nd Edition, PHI publication.
2 Roth Jr. C.H, Thomson “Digital Systems Design Using VHDL” 2002. 3 Bhaskar. J “VHDL Synthesis Primer”, 2001.4 Navabi Z “VHDL Analysis and Modeling of Digital Systems”, Mc
Graw-Hill, 1993.5 Perry D L “VHDL”, Mc Graw-Hill, 1999.6 Robert K.D “Digital Design with CPLD Applications VHDL”,
Thomson, 2001.7 Sudhakar Yalamanchi “Introductory VHDL from Simulation to Synthesis”,
Pearson Education, 2001.8 Nazeih. M. Botros “HDL programming VHDL and Verilog”, Dreamtech,
2007.
CONTROL SYSTEMS Contact hours/week : 04 Credits : 04 Total lecture hours : 52 CIE marks : 50 Sub. Code : UEC514C SEE marks : 50 Department : Electronics and Communication Engg. Designation : Core Prerequisites : Laplace Transform Course Objectives: The course is intended to provide the knowledge about 1: The concept of feedback and hence the differences between closed loop and open loop control
system 2: The physical modeling of interrelated systems like electrical, mechanical and
electromechanical control systems. 3: The control system in time domain in order to obtain time domain specifications of systems as
a result system designing can be carried out 4: Undertaking stability analysis of the system by using various techniques such as Hurwitz’s
criterion, Root Locus method. 5: Understanding the instability of a control system through root locus plotting technique as
result the system parameters can be modified. 6: A control system in frequency domain specifications through various plotting techniques such
as Bode plot, Polar plot, Nyquist plot. 7: State space analysis to identify status of linear or non linear systems and solve state equations. Course Outcomes A student who successfully completes this course should be able to
1. Understand the concept of feedback and list the differences between closed loop and open loop control system
2. Mathematically model the electrical, mechanical and electromechanical control systems. 3. Analyse the control system in time domain and understand steady state and transient analysis
of a control system. 4. Determine the stability of a system by using various techniques such as Hurwitz’s criterion,
Routh Hurwitz criterion and Root Locus technique. 5. Analyse the stability of a control system through root locus plotting technique. 6. Analyse a control system in frequency domain through various plotting techniques such as
bode plot, polar plot, Nyquist plot. 7. Analyse state space to identify status of linear or non linear systems and solve state equations.
The topics that enable to meet the above objectives and course Outcomes are given below Unit I (13 hours)
System modeling: Definition of control system, Concept of feedback and its significance, open loop and closed loop systems, Modeling of Electrical, Mechanical and Electromechanical systems, Differential equations of physical system. Transfer function, Block diagram representation and Reduction technique, Signal flow graph representation and reduction using Mason’s gain formula.
Unit II (13 hours) Time domain analysis of control systems: Introduction, standard test signals, Unit step response of a second order system, Steady state error analysis, time domain specifications. Stability analysis technique: Concept of stability, Location of Roots in the s-plane for stability, methods of determining stability, Routh-Hurwitz stability criterion.
Unit III (13 hours) Root-Locus Technique: Introduction, Procedure for constructing Root-locus. Stability analysis using root locus. Frequency Domain Analysis: Introduction, Polar plots, Bode plots, Gain and Phase cross over frequency, gain margin, phase margin, Frequency domain specifications-resonant peak, resonant frequency, and bandwidth.
Unit IV (13 hours) Nyquist stability criterion; Principle of argument, mapping, Nyquist path, Nyquist criterion, Nyquist Plot and stability analysis. State Space Analysis: Introduction, concept of state and variables, state model, Non-homogeneous solution of a state equation. Reference Books Sl. No
Authors Title, publisher, edition, year
1 Nagrath and Gopal Control System Engineering, New Age published. 2 K. Ogeta Modern control engineering, Person education, Asia/PHI
4th edition, 2002. 3 Benjamin C. Kuo Automatic Control Systems, PHI 7th edition. 4 Richard C. Dorf and
Robert. H. Bishop Modern Control Systems, Person Education, 8th Edition, 2002.
5 M. Gopal Control Systems-Principles and Design, TMH, 2nd Edition, 2002.
6 David. K. Chng, Analysis of Linear systems”, Narosa publishing house, 1996.
COMPUTER ORGANIZATION Contact hours/week : 03 Credits : 03 Total lecture hours : 40 CIE marks : 50 Sub. Code : UEC515E SEE marks : 50 Department : Electronics and Communication Engg. Designation : Elective Prerequisites : ---
Course Objectives 1. To conceptualize the basics of organizational and architectural issues of a digital computer. 2. To analyze performance issues in processor and memory design of a digital computer. 3. To understand various data transfer techniques in digital computer. 4. To analyze processor performance improvement using instruction level parallelism.
Course Outcomes A student who successfully completes this course should be able to 1. Understand basic structure of computer. 2. Perform computer arithmetic operations. 3. Understand control unit operations. 4. Design memory organization that uses banks for different word size operations. 5. Understand the concept of cache mapping techniques and I/O organization. 6. Conceptualize instruction level parallelism.
The topics that enable to meet the above objectives and course Outcomes are given below Unit I (10 hours)
Basic Structure of Computers: Computer Types, Functional Units, Basic Operational Concepts, Bus Structures, Performance–Processor Clock, Basic Performance Equation, Clock Rate, Performance Measurement, Historical Perspective. Machine Instructions and Programs: Numbers, Arithmetic Operations and Characters, Memory Location and Addresses Memory Operations, Instructions and Instruction Sequencing. Addressing Modes, Assembly Language, Basic Input and Output Operations, Stacks and Queues, Subroutines, Additional Instructions, Encoding of Machine Instructions
Unit II (10 hours) Input/output Organization: Accessing Multiple Devices, Controlling Device Requests, Exceptions, Direct Memory Access, Buses I/O Devices, Interrupts – Interrupt Hardware, Enabling and Disabling Interrupts, Handling Interface Circuits, Standard I/O, Interfaces – PCI Bus, SCSI Bus, USB.
Unit III (10 hours) Memory System: Basic Concepts, Semiconductor RAM Memories, Read Only Memories, Speed, Size, and Cost, Cache Memories–Mapping Functions, Replacement Algorithms, Performance Considerations, Virtual Memories, Secondary Storage, Arithmetic: Addition and Subtraction of Signed Numbers, Design of Fast Adders, Multiplication of Positive Numbers
Unit IV (10 hours) Arithmetic Contd: Signed, Operand Multiplication, Fast Multiplication, Integer Division, Floating-point Numbers and Operations Basic Processing Unit: Fundamental Concepts, Execution of a Complete Instruction, Multiple Bus Organization, Hard-wired Control and Micro
programmed Control Reference Books Sl. No
Authors Title, publisher, edition, year
1 Carl Hamacher, Zvonko Vranesic, Safwat Zaky
Computer Organization, Tata McGraw Hill, 5th Edition, 2002.
2 David A. Patterson, John L. Hennessy
Computer Organization and Design – The Hardware / Software Interface ARM Edition, Elsevier, 4th Edition, 2009.
CIE Marks: 50 SEE Marks: 50 Total Marks: 100 Unit I
Fundamental Concepts: - Introduction to Artificial Neural Networks (ANN). Learning Process: - error–correction learning, Hebbian learning, competitive learning, Boltzmann learning, the credit-assignment problem, supervised learning, and other learning techniques.
Unit II Single neuron/ Perceptron networks: - training methodology, typical application to linearly separable problems. Multilayer Perceptron: - Back propagation algorithm, virtues and limitation of BP algorithm, modifications to back-propagation. Radial-basis function Networks – interpolation problem, Covers theorem, regularization networks, applications.
Unit III Classical sets and Fuzzy sets, Classical relation and Fuzzy relation, Cartesian product, Crisp relation, Fuzzy relation: Tolerance and Equilance relation, Membership functions: Future of the membership functions, membership value assignment.
Unit IV Fuzzy to crisp conversions: Lambda-cuts for Fuzzy sets, Lambda-cuts for Fuzzy Relations, Defuzzification Methods, Fuzzy Arithmetic, Numbers, Vectors, and the Extension Principle, Fuzzy Numbers, Interval Analysis in Arithmetic, Approximate Methods of Extension, Fuzzy vectors, Classical Logic and Fuzzy Logic, Classical Predicate Logic, Fuzzy Logic,
Text Books: 1) Haykin, “Neural Networks, A Comprehensive Foundation”, Pearson Education, India. 2) T. J. Ross, “Fuzzy Logic with Engineering Applications”, MC Graw Hill International Edition, 1997. Reference Book: 1) Jang, Sun and Mizutani, “Neuro-Fuzzy and Soft-Computing – A computational approach to
Unit I Linear Wave Shaping: The low pass RC circuit, the low pass RC circuit as integrator, the high pass RC circuit, the high pass RC circuit as differentiator, double differentiation, attenuators, RLC circuits, ringing circuits.
Unit II Nonlinear Wave Shaping: Clipping Circuits, clamping circuits, Switching Characteristics of Devices: Junction diode switching times, Piece-wise linear diode characteristics, breakdown in junction diodes, Transistor as switch, transistor switching times, breakdown voltages of transistor, the transistor switch in saturation, temperature sensitivity of saturation parameters, design of transistor as switch.
Unit III Multivibrators: Bistable multivibrator, a fixed biased bistable mutivibrators, a self biased transistor binary, commutataing capacitors, a non saturating binary, triggering the binary, triggering unsymmetrical through a unilateral devices, triggering symmetrical through a unilateral devices, a direct connected binary, the emitter coupled binary, monostable multivibrator, the collector coupled monostable multivibrator, the emitter coupled monostable multivibrator, triggering the monostable multivinrator, astable multivibrator, the collector coupled astable multivibrator, the emitter coupled astable multivibrator.
Unit IV Time Based Generators: General features of time base signal, methods of generating time base waveform, exponential sweep circuits, uni junction transistor, sweep circuit using UJT, sweep circuit using transistor switch, a transistor constant current sweep, Miller and Bootstrap time based generators basic principles, the transistor miller time base generator, the transistor Bootstrap time base generator, current time based generators, a simple current sweep, linearity correction through adjustment of driving waveform, a transistor current time base generator. Synchronization and Frequency Division: Pulse synchronization of relaxation devices, frequency division in sweep circuits, other astable relaxation circuits, monostable relaxation circuits as dividers, phase delay and phase jitters, synchronization of sweep circuits with symmetrical signals, sine wave frequency division with sweep circuits. Text Books: 1) A Anand Kumar, “Pulse and Digital Circuits”, PHI 2nd Edition, 2008. 2) Jacob Millman, Herbert Taub, and Mothiki Prakash Rao, “Pulse, Digital and Switching Waveforms”, Tata MacGraw Hill, 2nd Edition, 2007
Course Title: Random Process Course Code: UEC518E Credits: 3 Teaching Hours: 40 Hrs
(10 Hrs/Unit) Contact Hours: 3 Hrs/Week
CIE Marks: 50 SEE Marks: 50 Total Marks: 100
Unit I Introduction to Probability Theory: Experiments, sample space, Events, Axioms, Assigning probabilities, Joint and conditional probabilities, Baye’s Theorem, Independence, Discrete Random Variables, Engg Example.
Unit II Random Variables, Distributions, Density Functions: CDF, PDF, Gaussian random variable, Uniform Exponential, Laplace, Gamma, Erlang, Chi-Square, Raleigh, Rician and Cauchy types of random variables. Operations on a single R.V.: Expected value, EV of Random variables, EV of functions of Random variables, Central Moments, Conditional expected values.
Unit III Pairs of Random variables, Joint CDF, joint PDF, Joint probability mass functions, Conditional Distribution, density and mass functions, EV involving pairs of Random variables, Independent Random variables, Complex Random variables, Engg Application.
Unit IV Multiple Random Variables: Joint and conditional PMF, CDF, PDF, EV involving multiple Random variables, Gaussian Random variable in multiple dimension, Engg application, linear prediction. Random Process: Definition and characterization, Mathematical tools for studying Random Processes, Stationary and Ergodic Random processes, Properties of ACF.
Text Book: 1) S. L. Miller and D. C. Childers, “Probability and Random Processes: Application to Signal Processing and Communication”, Academic Press / Elsevier 2004. 2) Peyton Z Peebles, “Probability, Random Variables and Random Signal Principles”, 4th Edition, TMH, 2007. 3) H. Stark and Woods, “Probability, Random Processes and Applications”, PHI, 2001.
Unit I Automotive Systems: Introduction to Power Train System, Transmission System, Braking System, Steering System, Starting System, Charging System. Need for Electronics: Performance, Control & Legislation. Bus Architecture and Protocols: Introduction to control networking, Review of SPI, I2C, USB, CAN, LIN, FLEXRAY, MOST Protocols.
Unit II Power train & Chassis Subsystem: Electronic fuel control in ignition systems, Fuel injection systems, Advanced fuel control technology, ABS, TCS & ESP, Airbags. Automotive Sensors & Actuators: Engine Speed Sensor, temperature sensor, Lambda sensor, Accelerometer (knock sensors).
Unit III Automotive Engine Control Actuators, Solenoid actuator, Exhaust Gas Re circulation Actuator. Infotainment & Navigation Systems, Vehicle multimedia, Driver Assistance & Navigation
Unit IV AUTOSAR Standard: Motivation, AUTOSAR Architecture, Main Areas of AUTOSAR Standardization, AUTOSAR Models.
Text Books: 1) Denton. T, “Automobile Electrical and Electronic Systems”, Edward Arnold publication, 1995. 2) William T. M., “Automotive Electronic Systems”, Heiemann Ltd., London, 1978.
Reference Books: 1) Nicholas Navet, “Automotive Embedded System Handbook”, CRC Press, 2009. 2) “BOSCH Automotive Handbook”, Wiley Publications, 8th Edition, 2011. 3) Jason. R. Andrews, “Co-Verification of Hardware & Software for ARM SoC Design”, Newnes Publications, 2004. 4) F. Balarin, “Hardware Software co-design of Embedded Systems”, Kluwer Academic Publishers, 1987. 5) William B. Ribbens, “Understanding Automotive Electronics”, Newnes Publications, 6th Edition, 2003.
DATA STRUCTURE USING C Contact hours/week : 03 Credits : 03 Total lecture hours : 40 CIE marks : 50 Sub. Code : UEC520E SEE marks : 50 Department : Electronics and Communication Engg. Designation : Elective Prerequisites :C language. Course Objectives A student provided with 1. The dynamics of memory by the use of pointers and implement linked list data
structure to solve various problems 2. Various data structure such as stacks, queues and lists to solve various computing problems
using C-programming language 3. Data structures and abstract data types (ADT) including lists, stacks, queues. 4. The linked implementation, and its uses both in linear and non-linear data structure 5. Various kinds of searching and sorting techniques Course Outcomes A student who successfully completes this course should be able to 1. Select and model data using primitive and structured types 2. Analyze and construct effective algorithms 3. Explain and describe the structure representation and access procedures for ADTs including arrays, stacks, queues, linked lists. 4. Describe how arrays, queues ,linked structures, stacks, queues, are represented in memory
and used by algorithms .
5. Decide a suitable data structure and algorithm to solve a real world problem
The topics that enable to meet the above objectives and course Outcomes are given below Unit I (10 hours)
Advanced C: Pointers: Concepts, Pointer variables, Accessing variables through pointers, pointer declaration & definition, Initialization of pointer variables, example programs, Pointers and functions, Pointers to Pointers, Compatibility, Lvalue and Rvalue, example programs. Array and Pointers, Pointers arithmetic and array, passing array to a functions, Memory allocation functions, some example programs. Array of Pointers, dynamic array, strings and Pointers, Derived types Enumerated, structure & Union: Type definition, enumerated types, structure, Accessing structures. Complex structures, array of structure, structures and functions, pointers to structures, example programs, unions.
Unit II (13 hours) Introduction to data structures: Basic concepts, Pseudocode: Algorithm header, Purpose, Conditions and Return, Statement Numbers, Variables, Statement constructs, sequence, selection, loop, Algorithm analysis, Psuedocode example. The abstract data type: Atomic and composite data, Data type, Data structure, Abstract data type, Model for an abstract data type:
ADT operations, ADT data structures, ADT Implementations: Array implementation, Linked list implementation, Pointers to linked lists, Generic code for ADTs: Pointer to void, Pointer to Function: Defining pointers to functions, using pointers to functions. Linear Lists: Stacks: Basic stack operations: Push, Pop, Stack top, Stack linked list: Implementation, Data structure, Stack head, Stack data node, Stack algorithms: Create Stack, Push Stack, Stack top, Empty Stack, Full Stack, Stack count, Destroy Stack.
Unit III (13 hours) C language implantations: Insert data, Push Stack, Print Stack, Pop character, Stack ADT: Data structure, ADT Implementations, Stack structure, Create stack, Push stack, Pop stack, Stack top, Empty stack, Stack count, Destroy stack, Recursion: Factorial: A case study: Recursion defined, Iterative solution, Recursive solution, Designing Recursive algorithms: The design methodology, Limitations of recursion. Design implementation- Reverse keyboard input, Recursive examples: Greatest common divisor, GCD designs, GCD C implementation, Fibonacci Numbers, Design, Fibonacci C implementation, how recursion works. Queues: Queue Operations: Enqueue, Dequeue, Queue front, Queue rear, Queue example, Queue Linked list design: Data structure, Queue head, Queue data node. Queue algorithms.
Unit IV (13 hours) Queues: Create queue, Enqueue, Dequeue, Retrieving queue data, Empty queue, Full queue, Queue count, Destroy queue, Queue ADT: Queue structure, Queue ADT algorithms, Queue Applications: Categorizing data, Categorizing data design, Categorizing data - C implementation. General Linear lists: Basic operations, Insertion, Deletion, Retrieval, Traversal, Implementation: Data structure, Head node, Data node, Algorithms, Create list, Insert node, Delete node, List search, Retrieve node, Empty list, Full list, List count, Traverse list, Destroy list, List ADT: ADT functions, Create list, Add node, Internal insertion function, Remove node, Internal delete function, Search list, Internal search function, Retrieve node, Empty list Full list, List count, Traverse, Destroy list.
Reference Books Sl. No
Authors Title, publisher, edition, year
1 Behrouz A. Forouzan and Richard F. Gilberg
“Computer Science: A Structured Programming Approach Using C”, Thomson, 2nd Edition, 2003
2 Behrouz A. Forouzan and Richard F. Gilberg
“Data Structure: A Pseudocode Approach with C”, Cengage Learning Publisher, 2nd Edition, 2005.
3 Andrew Tenanbaum. “Data Structures with C”, Thomson 2005
4 Robert Kruse & Bruce Leung
“Data Structures & Program Design in C” Pearson Education, 2007
5 Aaron M. Tenenbaum, Yedidyah Langsam, Moshe J.Augenstein
“Data Structures Using C”, Pearson Education, Seventh impression 2009.
6
Course Title: DSP and VHDL Laboratory Course Code: UEC521L Credits: 1.5 Contact Hours: 3 Hrs/Week CIE Marks: 50 SEE Marks: 50 Total Marks: 100 Course objectives: To simulate and synthesize combinational and sequential circuits by writing VHDL Code and using Altera Quartrus II software. To program industry standard FPGA kits To apply the Discrete Fourier Transform (DFT) on given data by writing MATLAB code. Understand circular convolution, its relationship to linear convolution, and how circular convolution can be achieved via the Discrete Fourier Transform. To design digital filters and implement the design using MATLAB. To implement verified MATLAB code (mentioned in sl.no 3 and 4) on DSP kits by writing ‘C’ code. Course Outcomes: Should be able to write VHDL code for combinational and sequential circuits and implement it on FPGA Kits. Should be able to write MATLAB code for digital filters and basic DSP algorithms. Should be able to write ‘C’ code for basic DSP algorithms and implement it on DSP kits.
List of Experiments - DSP Using MATLAB
1) Computation of N point DFT and IDFT 2) Linear and Circular convolution of two sequences using DFT and IDFT. 3) Design and implementation of FIR filter (windowing/frequency sampling method) to meet given specifications. 4) Design and implementation of IIR filter (Chebyshev / Butterworth) to meet given specifications. Using Digital Signal Processor (TMS 320 C 54XX) 1) Linear and convolution of two given sequences. 2) Computation of N- Point DFT of a given sequence 3) Realization of FIR filter (using any one window) to meet given specifications. The input can be a signal from external source. 4) Realization of a two band graphic equalizer of two different audio bands. The input can be a music signal (music containing different instruments). List of Experiments - VHDL 1) Write VHDL code using concurrent signal assignment statements for a. Full adder b. 3:8 decoder with active low output, truth table is shown in table 1.1 c. 4:1 MUX, truth table is shown in table 1.2 d. Boolean expressions i. F1(abc) = Σ(0,1,3,4,5);
ii. F2(abc) = π(1,2,3,5,7); 2) Write VHDL code using selected signal assignment statement a. Full adder b. 3:8 Decoder with active low output truth table shown in table 1.1 c. 4:1 MUX, truth table is shown in table 1.2 d. Boolean expressions i. F1(abc) = Σ(0,1,3,4,5,); ii. F2(abc) = π(1,2,3,5,7); 3) Implementation using conditional signal assignment statement a. 8:3 Priority encoder truth table is shown in table 1.3 b. 3:8 Decoder with active low output truth table shown in table 1.1 c. 4:1 MUX, truth table is shown in table 1.2 d. Boolean expressions i. F1(abc) = Σ(0,1,3,4,5,); ii. F2(abc) = π(1,2,3,5,7); 4) Write VHDL program using process statement(s) for – combinational circuits a. Full subtractor b. 2 bit magnitude comparator c. 8 bit magnitude comparator d. 3:8 decoder 5) Displays a. Write VHDL code for BCD to seven segment display decoder b. Write VHDL code display following message on LCD i. Line 1 : BEC ii. Line 2 : ECE c. Write VHDL code to run following message from left to right on LCD i. Line 1 : BEC ii. Line 2 : ECE d. Write VHDL code to run following message from right to left on LCD i. Line 1 : BEC ii. Line 2 : ECE e. Write VHDL program to display and blink following message every one second i. Line 1 : BEC ii. Line 2 : ECE 6) Counters and Shift Register a. Write VHDL program for 4-bit up counter and display result on LEDS b. Write VHDL program for BCD up counter and display the result on seven segment display c. Write VHDL program for 00 to 99 counter and display result on LCD d. Write VHDL program for 6-bit SISO shift registers 7) Sequence Detector (1010)
Course Title: Analog Communication Laboratory
Course Code: UEC522L
Credits: 1.5 Contact Hours: 3 Hrs/Week CIE Marks: 50 SEE Marks: 50 Total Marks: 100
Course objectives
1. To design and und obtain the frequency response of second order active low pass, high pass, and band pass filters.
2. To understand analog signal modulation and demodulation techniques
3. To understand the concept of digital carrier modulation (ASK, FSK, and PSK) and demodulation
4. To understand the generation of PN sequence and verifying its properties
Course Outcomes
1. Should be able to design and verify the frequency response of active filters for a given specifications.
2. Should be able to design and asses the different analog and digital modulation techniques.
3. Should be able to generate PN sequence of desired length and verify its properties.
List of Experiments
1) Design and verification of: a. Second order active low pass filter b. Second order active high pass filter 2) Design and verification of second order band pass filter. 3) Realization of Amplitude modulation and demodulation for a given modulation index. 4) Realization of Frequency modulation. 5) Realization of pulse width modulation. 6) Verification of sampling theorem.
7) Generation and detection of Amplitude shift keying (ASK) Signal. 8) Generation and detection of frequency shift keying (FSK) signal. 9) Generation and detection of phase shift keying (PSK) signal. 10) Study of sample and hold circuit. 11) Realization of pulse Amplitude modulation (PAM) 12) Realization of Pre-emphasis and de-emphasis circuits. 13) Generation of FSK signal using 555 timers. 14) Characterization of Phase Locked Loop (PLL) 15) Generation of PN sequence using shift registers and verification of its properties.
