Verizon 5G TF; Air Interface Working Group; Verizon 5th ...5gtf.net/V5G_212_v1p2.pdf · TS V5G.212...

TS V5G212 V12 (2016-06)

1

Verizon 5G TF Air Interface Working Group Verizon 5th Generation Radio Access Multiplexing and channel coding (Release 1)

06 2016

Cisco Ericsson Intel Corp LG Electronics Nokia Qualcomm Technologies Inc Samsung Electronics amp

Verizon

V 12

Disclaimer This document provides information related to 5G technology All information provided herein is subject to change

without notice The members of the 5GTF disclaim and make no guaranty or warranty express or implied as to the accuracy or

completeness of any information contained or referenced herein THE 5GTF AND ITS MEMBERS DISCLAIM ANY IMPLIED

WARRANTY OF MERCHANTABILITY NON-INFRINGEMENT OR FITNESS FOR ANY PARTICULAR PURPOSE AND ALL

INFORMATION IS PROVIDED ON AN ldquoAS-ISrdquo BASIS No licenses under any intellectual property of any kind are provided by any

person (whether a member of the 5GTF or not) that may be necessary to access or utilize any of the information contained herein

including but not limited to any source materials referenced herein and any patents required to implement or develop any

technology described herein It shall be the responsibility of anyone attempting to use the information contained or referenced herein

to obtain any such licenses if necessary The 5GTF and its members disclaim liability for any damages or losses of any nature

whatsoever whether direct indirect special or consequential resulting from the use of or reliance on any information contained or

referenced herein

copy 2016 Cellco Partnership dba Verizon Wireless All rights reserved

TS V5G212 V12 (2016-06)

2

Document History

Version Date Change Verizon POC

01 2016-03-31 Draft version created

02 2016-03-31 Agreements after April 5GTF F2F

03 2016-05-04 Agreements before May 5GTF F2F v1


10 2016-05-18 First version approved

11 2016-06-15 CR001 ndash Introduction of DCI formats A1 A2 B1 B2

2016-06-24 CR002 approved





12 2016-06-29

New release including CR002 CR003 CR004 CR005 and CR006

Document Approvals

Name Title Company Date of Approval

TS V5G212 V12 (2016-06)

3

Table of Contents

1 Scope 5

2 References 5

3 Symbols and abbreviations 5

31 Symbols 5

32 Abbreviations 5

4 Mapping to physical channels 6

41 Uplink 6

42 Downlink 7

5 Channel coding multiplexing and interleaving 7

51 Generic procedures 7

511 CRC calculation 7

512 Code block segmentation 8

513 Channel coding 12

514 Rate matching 22

515 Code block concatenation 29

52 Uplink transport channels and control information 30

521 Random access channel 30

522 Uplink shared channel 30

523 Uplink control information on xPUCCH 40

524 Uplink control information on xPUSCH without xUL-SCH data 43

53 Downlink transport channels and control information 45

531 Broadcast channel 45

531A Extended broadcast channel 46

532 Downlink shared channel 48

533 Downlink control information 50

List of Figures

Figure 5131-1 Rate 13 tail biting convolutional encoder 13

Figure 51331-1 Structure of rate 13 turbo encoder (dotted lines apply for trellis termination only) 20

Figure 5142-1 Rate matching for convolutionally coded transport channels and control information 23

Figure 5143-1 Rate matching for turbo coded transport channels 26

Figure 522-1 Transport block processing for xUL-SCH 31

Figure 523-1 Processing for UCI 40

TS V5G212 V12 (2016-06)

4

Figure 531-1 Transport channel processing for xBCH 45


Figure 532-1 Transport block processing for xDL-SCH 49

Figure 533-1 Processing for one DCI 51

List of Tables

Table 41-1 6

Table 41-2 6

Table 42-1 7

Table 42-2 7

Table 512-1 Kmax and Kmin 8

Table 513-1 Usage of channel coding scheme and coding rate for TrCHs 13

Table 513-2 Usage of channel coding scheme and coding rate for control information 13

Table 5132-1 Parameters of parity check matrix 14

Table 5132-2 Matrix exponents for Code rate R=56 14

Table 5132-3 Matrix exponents for R=34 15



Table 51333-3 Turbo code internal interleaver parameters 21

Table 514-2 Inter-column permutation pattern for sub-block interleaver 25


Table 5226-1 Encoding of 1-bit RI 33

Table 5226-2 0

RIo to RI mapping 34

Table 52261-1 Fields for channel quality information feedback for one wideband CQI report 36

Table 52261-2 Fields for BSI feedback for wideband report 36

Table 52261-3 Fields for BRI feedback for one wideband report 36

Table 52263-1 Basis sequences for (32 O) code 37

Table 52321-1 Fields for channel quality information feedback for one wideband CQI reports 41

Table 52331-1 Fields for BSI feedback for one wideband report 42

Table 5311-1 CRC mask for xPBCH 46

Table 53311-1 Antenna port(s) and number of layers indication by UL DCI formats 54

Table 53313-1 Antenna port(s) and number of layers indication by DL DCI formats 57

TS V5G212 V12 (2016-06)

5

1 Scope

The present document specifies the coding multiplexing and mapping to physical channels for Verizon

5G Radio Access (V5G RA)

2 References

The following documents contain provisions which through reference in this text constitute provisions of

the present document

References are either specific (identified by date of publication edition number version number etc) or

non-specific

For a specific reference subsequent revisions do not apply

For a non-specific reference the latest version applies In the case of a reference to a V5G document a

non-specific reference implicitly refers to the latest version of that document in the same Release as the

present document

[1] TS V5G201 Verizon 5G Radio Access (V5G RA) Physical layer General description

[2] TS V5G211 Verizon 5G Radio Access (V5G RA) Physical channels and modulation

[3] TS V5G213 Verizon 5G Radio Access (V5G RA) Physical layer procedures

[4] TS V5G321 ldquoVerizon 5G Radio Access (V5G RA) 5G Medium Access Control Protocolrdquo

[5] TS V5G331 ldquoVerizon 5G Radio Access (V5G RA) 5G Radio Resource Control (5G-RRC)

Protocol Specificationrdquo

[6] IEEE Std 80211ntrade-2009 Enhancements for Higher Throughput (Amendment 5)

3 Symbols and abbreviations

31 Symbols

For the purposes of the present document the following symbols apply

Symbols are not defined

32 Abbreviations

For the purposes of the present document the following abbreviations apply

5GNB 5G NodeB

BRS Beam measurement Reference Signal

CSI Channel State Information

TS V5G212 V12 (2016-06)

6

DCI Downlink Control Information

LDPC Low Density Parity Check

PMI Precoding Matrix Indicator

TDD Time Division Duplexing

UCI Uplink Control Information

xBCH 5G Broadcast channel

xDL-SCH 5G Downlink Shared channel

xPBCH 5G Physical Broadcast channel

xPDCCH 5G Physical Downlink Control channel

xPDSCH 5G Physical Downlink Shared channel

xPRACH 5G Physical Random Access channel

xPUSCH 5G Physical Uplink Shared channel

xUL-SCH 5G Uplink Shared channel

4 Mapping to physical channels

41 Uplink

Table 41-1 specifies the mapping of the uplink transport channels to their corresponding physical

channels Table 41-2 specifies the mapping of the uplink control channel information to its corresponding

physical channel

Table 41-1

TrCH Physical Channel

xUL-SCH xPUSCH

Table 41-2

Control information Physical Channel

UCI xPUCCH xPUSCH

TS V5G212 V12 (2016-06)

7

42 Downlink

Table 42-1 specifies the mapping of the downlink transport channels to their corresponding physical

channels Table 42-2 specifies the mapping of the downlink control channel information to its

corresponding physical channel

Table 42-1


xDL-SCH xPDSCH

xBCH xPBCH ePBCH

Table 42-2


DCI xPDCCH

5 Channel coding multiplexing and interleaving

Data and control streams fromto MAC layer are encoded decoded to offer transport and control services

over the radio transmission link Channel coding scheme is a combination of error detection error

correcting rate matching interleaving and transport channel or control information mapping ontosplitting

from physical channels

51 Generic procedures

This section contains coding procedures which are used for more than one transport channel or control

information type

511 CRC calculation

Denote the input bits to the CRC computation by 13210 Aaaaaa and the parity bits by

13210 Lppppp A is the size of the input sequence and L is the number of parity bits The parity

bits are generated by one of the following cyclic generator polynomials

gCRC24A(D) = [D24

+ D23

+ D18

+ D17

+ D14

+ D11

+ D10

+ D7 + D

6 + D

5 + D

4 + D

3 + D + 1] and

gCRC24B(D) = [D24

+ D23

+ D6 + D

5 + D + 1] for a CRC length L = 24 and

gCRC16(D) = [D16

+ D12

+ D5 + 1] for a CRC length L = 16

gCRC8(D) = [D8 + D

7 + D

4 + D

3 + D + 1] for a CRC length of L = 8

The encoding is performed in a systematic form which means that in GF(2) the polynomial

231

2222

123

024

122

123

0 pDpDpDpDaDaDa AAA

yields a remainder equal to 0 when divided by the corresponding length-24 CRC generator polynomial

gCRC24A(D) the polynomial

TS V5G212 V12 (2016-06)

8

151

1414

115

016

114

115

0 pDpDpDpDaDaDa AAA

yields a remainder equal to 0 when divided by gCRC16(D) and the polynomial

7

1

6

6

1

7

0

8

1

6

1

7

0 pDpDpDpDaDaDa A

AA

yields a remainder equal to 0 when divided by gCRC8(D)

The bits after CRC attachment are denoted by 13210 Bbbbbb where B = A+ L The relation between

ak and bk is

kk ab for k = 0 1 2 hellip A-1

Akk pb for k = A A+1 A+2 A+L-1

512 Code block segmentation

5121 Code block segmentation for LDPC code

The input bit sequence to the LDPC (Low Density Parity Check) code block segmentation is denoted by

13210 Bbbbbb where B gt 0 If B is larger than the maximum code block size Kmax segmentation of

the input bit sequence is performed

The maximum and minimum code block sizes depending on the code rate are depicted in Table 512-1

Table 512-1 Kmax and Kmin

Code Rate Kmax Kmin

56 1620 540

34 1458 486

23 1296 432

12 972 324

If the number of filler bits Fr calculated below is not 0 filler bits are added to r-th blocks where r is the

code block number

Note that if B lt Kmin filler bits are added to the end of the code block

The filler bits shall be set to ltNULLgt at the input to the encoder

For a given code rate total number of code blocks C is determined by

if Ble Kmax

Number of code blocks 1C

else

TS V5G212 V12 (2016-06)

9

Number of code blocks maxΒΚC

end if

The bits output from code block segmentation for C 0 are denoted by

13210 rKrrrrr ccccc where r is the code block number and Kr is the number of bits for the

code block number r

Number of bits in each code block (applicable for C 0 only)

if C = 1

the length of code block 1198700 = lceil119861119870119898119894119899rceil ∙ 119870119898119894119899

the number of filler bits 1198650 = 1198700 minus 119861

else

the temporal value of the length of code block 119869 = lceil119861119862rceil

the temporal value of the length of code block 119870prime = lceil119869119870119898119894119899rceil ∙ 119870119898119894119899 - to make it multiple

of Kmin

the number of total filler bits 119865prime = 119870prime ∙ 119862 minus 119861

120574 = 119865primemod 119862

for r = 0 to 119862 minus 1

if 119903 le 119862 minus 120574 minus 1

the number of filler bits of r-th code block 119865119903 = lfloor119865prime119862rfloor

the length of r-th code block 119870119903 = lceil119861119862rceil + 119865119903

else

the number of filler bits of r-th code block 119865119903 = lceil119865prime119862rceil

the length of r-th code block 119870119903 = lfloor119861119862rfloor + 119865119903

end if

end for r

end if

s = 0


for k = 0 to Kr ndash Fr ndash 1

TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k

The filler bits ltNULLgt shall be inserted end of the each code block

for k = Kr ndash Fr ndash 1 to Kr ndash 1 -- Insertion of filler bits to each code block

crk = ltNULLgt

end for k

end for r

5122 Code block segmentation for Turbo code

The input bit sequence to the code block segmentation is denoted by 13210 Bbbbbb where B gt 0 If

B is larger than the maximum code block size Z segmentation of the input bit sequence is performed and

an additional CRC sequence of L = 24 bits is attached to each code block The maximum code block size

is

Z = 6144

If the number of filler bits F calculated below is not 0 filler bits are added to the beginning of the first

block

Note that if B lt 40 filler bits are added to the beginning of the code block


Total number of code blocks C is determined by

if ZB

L = 0


BB

else

L = 24

Number of code blocks LZBC

LCBB

end if

TS V5G212 V12 (2016-06)

11

The bits output from code block segmentation for C 0 are denoted by 13210 rKrrrrr ccccc

where r is the code block number and Kr is the number of bits for the code block number r


First segmentation size K = minimum K in table 513-3 such that BKC

if 1C

the number of code blocks with length K is C =1 0K 0C

else if 1C

Second segmentation size K = maximum K in table 513-3 such that KK

KKK

Number of segments of size K

K

BKCC

Number of segments of size K CCC

end if

Number of filler bits BKCKCF

for k = 0 to F-1 -- Insertion of filler bits

NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1

The sequence 13210 LKrrrrr rccccc is used to calculate the CRC parity bits

1210 Lrrrr pppp according to section 511 with the generator polynomial gCRC24B(D) For CRC

calculation it is assumed that filler bits if present have the value 0

while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding

The bit sequence input for a given code block to channel coding is denoted by 13210 Kccccc where

K is the number of bits to encode After encoding the bits are denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd

for

convolutional scheme and turbo coding schemes and 1D3210 ddddd for LDPC coding scheme where

D is the number of encoded bits per output stream and i indexes the encoder output stream The relation

between kc and )(ikd and between K and D is dependent on the channel coding scheme

The following channel coding schemes can be applied to TrCHs

Tail biting convolutional coding

LDPC coding

Turbo coding

Usage of coding scheme and coding rate for the different types of TrCH is shown in Table 513-1 Usage

of coding scheme and coding rate for the different control information types is shown in Table 513-2

The values of D in connection with each coding scheme

tail biting convolutional coding with rate 13 D = K

TS V5G212 V12 (2016-06)

13

LDPC coding with code rate R D = KR

Turbo coding with rate 13 D = K + 4

The range for the output stream index i is 0 1 and 2 for tail biting convolutional coding scheme

Table 513-1 Usage of channel coding scheme and coding rate for TrCHs

TrCH Coding scheme Coding rate

xUL-SCH LDPC coding Turbo coding (optional)

Variable 13 xDL-SCH

xBCH Tail biting convolutional coding

13

Table 513-2 Usage of channel coding scheme and coding rate for control information

Control Information Coding scheme Coding rate

DCI Tail biting convolutional coding

13

UCI Tail biting convolutional coding

13

5131 Tail biting convolutional coding

A tail biting convolutional code with constraint length 7 and coding rate 13 is defined

The configuration of the convolutional encoder is presented in Figure 5131-1

The initial value of the shift register of the encoder shall be set to the values corresponding to the last 6

information bits in the input stream so that the initial and final states of the shift register are the same

Therefore denoting the shift register of the encoder by 5210 ssss then the initial value of the shift

register shall be set to

iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd

Figure 5131-1 Rate 13 tail biting convolutional encoder

TS V5G212 V12 (2016-06)

14

The encoder output streams)0(

kd )1(

kd and )2(

kd correspond to the first second and third parity

streams respectively as shown in Figure 5131-1

5132 LDPC coding

The K bits including filler bits (c0 c1 c2 hellip cK-1) are encoded based on D-K by D parity check matrix (H)

where D is number of encoded bits and D - K is the number of parity check bits The parity check bits (p0

p1 p2 hellip pD-K -1) are obtained so that H∙ dT

= 0 where d =(c0c1c2 hellip cK-1 p0 p1 p2 hellip pD-K-1) is coded

bits stream

The parity check matrix H is defined as

119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875

119886119873119901119886119903119894119905119910_119887minus1119873119897119889119901119888_119887minus2 119875119886119873119901119886119903119894119905119910_119887minus1119873119897119889119901119888_119887minus1]

where Paij (0leiltNparity_b 0lejltNldpc_b) is zero matrix (when aij=-1) or cyclic-permutation matrix obtained from

the Z by Z identity matrix by cyclically shifted the columns to the right by aij elements The value of Z is

shift size obtained by Z = lceil119870119870119898119894119899rceil ∙ 27 where Kmin is given in Table 512-1

The matrix Paij is Z by Z zero matrix when aij is -1 The codeword length D information length K and

number of parity bits D-K is equal to Nldpc_b x Z Kldpc_b x Z and Npairty_b x Z respectively The parameters

Nldpc_b Kldpc_b and Nparity_b according to code rates are depicted in Table 5132-1

Table 5132-1 Parameters of parity check matrix

Code Rate Nldpc_b Kldpc_b Nparity_b

56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12

The parity check matrix is obtained based on Tables 5132-2 5132-3 5132-4 and 5132-5 which

show the exponents (aij) of parity check matrix when the code rate equals 56 34 23 and 12 for each

encoded bits respectively [6]

Table 5132-2 Matrix exponents for Code rate R=56

(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0

Table 5132-3 Matrix exponents for R=34

(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

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30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder

The scheme of turbo encoder is a Parallel Concatenated Convolutional Code (PCCC) with two 8-state

constituent encoders and one turbo code internal interleaver The coding rate of turbo encoder is 13

The structure of turbo encoder is illustrated in figure 51331-1

The transfer function of the 8-state constituent code for the PCCC is

G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3

The initial value of the shift registers of the 8-state constituent encoders shall be all zeros when starting to

encode the input bits

The output from the turbo encoder is

kk xd )0(

)(

)(1

0

1

Dg

Dg

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20

kk zd )1(

kk zd )2(

for 1210 Kk

If the code block to be encoded is the 0-th code block and the number of filler bits is greater than zero

ie F gt 0 then the encoder shall set ck = 0 k = 0hellip(F-1) at its input and shall set NULLdk)0( k =

0hellip(F-1) and NULLdk)1( k = 0hellip(F-1) at its output

The bits input to the turbo encoder are denoted by 13210 Kccccc and the bits output from the first

and second 8-state constituent encoders are denoted by 13210 Kzzzzz and 13210 Kzzzzz

respectively The bits output from the turbo code internal interleaver are denoted by 110 Kccc and

these bits are to be the input to the second 8-state constituent encoder

DD D

DD D

Input

Turbo code internal

interleaverOutput

Output

1st constituent encoder

2nd constituent encoder

kc

kc

kx

kx

kz

kz

Figure 51331-1 Structure of rate 13 turbo encoder (dotted lines apply for trellis termination only)

51332 Trellis termination for turbo encoder

Trellis termination is performed by taking the tail bits from the shift register feedback after all information

bits are encoded Tail bits are padded after the encoding of information bits

The first three tail bits shall be used to terminate the first constituent encoder (upper switch of figure

51321-1in lower position) while the second constituent encoder is disabled The last three tail bits shall

be used to terminate the second constituent encoder (lower switch of figure 51321-1 in lower position)

while the first constituent encoder is disabled

The transmitted bits for trellis termination shall then be

KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

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21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd

51333 Turbo code internal interleaver

The bits input to the turbo code internal interleaver are denoted by 110 Kccc where K is the number

of input bits The bits output from the turbo code internal interleaver are denoted by 110 Kccc

The relationship between the input and output bits is as follows

ii cc i=0 1hellip (K-1)

where the relationship between the output index i and the input index )(i satisfies the following

quadratic form

Kififi mod)( 221

The parameters 1f and 2f depend on the block size K and are summarized in Table 51333-3

Table 51333-3 Turbo code internal interleaver parameters

i K 1f 2f i K 1f 2f i K 1f 2f I K 1f 2f

1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

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26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching

5141 Rate matching for LDPC coded transport channels

The rate matching for LDPC coded transport channels is defined per coded bit stream dk The sequence

of bits ek for transmission is generated according to below

Denoting by E the rate matching output sequence length for the r-th coded block the rate matching

output bit sequence is ke k = 01 1E

Define by G the total number of bits available for the transmission of one transport block

Set mL QNGG where Qm is equal to 2 for QPSK 4 for 16QAM and 6 for 64QAM and where

[FFS NL is equal to the number of layers a transport block is mapped onto]

Set CG mod where C is the number of code blocks computed in section 5121

if 119903 lt 120574

set 119864 = 119873119871 ∙ 119876119898 ∙ lceil119866prime119862rceil

else

set 119864 = 119873119871 ∙ 119876119898 ∙ lfloor119866prime119862rfloor

end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E

if 119889(1198960+119895) mod 119863 nelt NULL gt

119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while

5142 Rate matching for convolutionally coded transport channels and control information

The rate matching for convolutionally coded transport channels and control information consists of

interleaving the three bit streams )0(

kd )1(

kd and )2(

kd followed by the collection of bits and the

generation of a circular buffer as depicted in Figure 5142-1 The output bits are transmitted as

described in section 51422

Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw

Figure 5142-1 Rate matching for convolutionally coded transport channels and control information

The bit stream )0(

kd is interleaved according to the sub-block interleaver defined in section 51421 with

an output sequence defined as )0(

1

)0(2

)0(1

)0(0

Kvvvv and where K is defined in section 51421

The bit stream )1(


an output sequence defined as)1(

1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv

The sequence of bits ke for transmission is generated according to section 51422

51421 Sub-block interleaver

The bits input to the block interleaver are denoted by)(1

)(2

)(1

)(0

iD

iiidddd where D is the number of bits

The output bit sequence from the block interleaver is derived as follows

[1] Assign 32CCsubblockC to be the number of columns of the matrix The columns of the matrix are

numbered 0 1 2hellip 1CCsubblockC from left to right

[2] Determine the number of rows of the matrixCCsubblockR by finding minimum integer

CCsubblockR such

that

CCsubblock

CCsubblock CRD

The rows of rectangular matrix are numbered 0 1 2hellip 1CC

subblockR from top to bottom

[3] If DCR CCsubblock

CCsubblock then DCRN CC

subblockCCsubblockD dummy bits are padded such that yk =

ltNULLgt for k = 0 1hellip ND - 1 Then )(ikkN dy

D k = 0 1hellip D-1 and the bit sequence yk is written

into the CCsubblock

CCsubblock CR matrix row by row starting with bit y0 in column 0 of row 0

)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

Perform the inter-column permutation for the matrix based on the pattern 110 CCsubblockCj

jP that is

shown in table 514-2 where P(j) is the original column position of the j-th permuted column After

permutation of the columns the inter-column permuted CCsubblock

CCsubblock CR matrix is equal to

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

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25

The output of the block interleaver is the bit sequence read out column by column from the inter-column

permuted CCsubblock

CCsubblock CR matrix The bits after sub-block interleaving are denoted by

)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i

v corresponds to )0(Py )(1i

v to CCsubblockCP

y)0(

hellip and CCsubblock

CCsubblock CRK

Table 514-2 Inter-column permutation pattern for sub-block interleaver

Number of columns CCsubblockC

Inter-column permutation pattern

)1()1()0( CCsubblockCPPP

32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt

51422 Bit collection selection and transmission

The circular buffer of length KKw 3 is generated as follows

)0(kk vw for k = 0hellip 1K

)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K

Denoting by E the rate matching output sequence length the rate matching output bit sequence is ke k =

01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while

5143 Rate matching for turbo coded transport channels

The rate matching for turbo coded transport channels is defined per coded block and consists of

interleaving the three information bit streams )0(kd )1(

kd and )2(kd followed by the collection of bits and the

TS V5G212 V12 (2016-06)

26

generation of a circular buffer as depicted in Figure 5143-1 The output bits for each code block are

transmitted as described in section 51432

Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw

Figure 5143-1 Rate matching for turbo coded transport channels

The bit stream )0(kd is interleaved according to the sub-block interleaver defined in section 51431 with


1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv



The bits input to the block interleaver are denoted by )(1

)(2

)(1

)(0

iD



Assign 32TCsubblockC to be the number of columns of the matrix The columns of the matrix are

numbered 0 1 2hellip 1TCsubblockC from left to right

Determine the number of rows of the matrixTCsubblockR by finding minimum integer TC

subblockR such that

TCsubblock

TCsubblock CRD

The rows of rectangular matrix are numbered 0 1 2hellip 1TCsubblockR from top to bottom

TS V5G212 V12 (2016-06)

27

If DCR TCsubblock

TCsubblock then DCRN TC

subblockTCsubblockD dummy bits are padded such that yk =


D k = 0 1hellip D-1 and the bit sequence yk is written into

the TCsubblock

TCsubblock CR matrix row by row starting with bit y0 in column 0 of row 0

)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd

Perform the inter-column permutation for the matrix based on the pattern 110 TCsubblockCj

jP that is


permutation of the columns the inter-column permuted TCsubblock

TCsubblock CR matrix is equal to

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock

TCsubblock CR matrix The bits after sub-block interleaving are denoted by

)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(

hellip and TCsubblock

TCsubblock CRK

For )2(kd

The output of the sub-block interleaver is denoted by)2(

1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC

subblockTCsubblockTC

subblock

mod1mod)(

The permutation function P is defined in Table 514-1


Number of columns TCsubblockC


)1()1()0( TCsubblockCPPP

32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt


The circular buffer of length KKw 3 for the r-th coded block is generated as follows


TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K

Denote the soft buffer size for the transport block by NIR bits and the soft buffer size for the r-th code block

by Ncb bits The size Ncb is obtained as follows where C is the number of code blocks computed in

section 512

-

w

IRcb K

C

NN min for xDL-SCH transport channels

- wcb KN for xUL-SCH transport channels

where NIR is equal to

limitDL_HARQMIMO min MMKK

NN

C

soft

IR

where

Nsoft is the total number of soft channel bits [FFS]

KMIMO is equal to 2 if [FFS condition] and is equal to 1 otherwise

MDL_HARQ is the maximum number of DL HARQ processes as defined in section 7 of [3]

Mlimit is a constant equal to [FFS]

Denoting by E the rate matching output sequence length for the r-th coded block and rvidx the

redundancy version number for this transmission (rvidx = 0 1 2 or 3) the rate matching output bit

sequence is ke k = 01 1E


Set mL QNGG where Qm is equal to 2 for QPSK 4 for 16QAM 6 for 64QAM and where

- For transmit diversity

- NL is equal to 2

- Otherwise

- NL is equal to the number of layers a transport block is mapped onto


if 1 Cr

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29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR

is the number of rows defined in section

51411

Set k = 0 and j = 0

while k lt E

if NULLwcbNjk mod)( 0

cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while

515 Code block concatenation

The input bit sequence for the code block concatenation block are the sequences rke for 10 Cr

and 10 rEk The output bit sequence from the code block concatenation block is the sequence kf

for 10 Gk

The code block concatenation consists of sequentially concatenating the rate matching outputs for the

different code blocks Therefore

Set 0k and 0r

while Cr

Set 0j

while rEj

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30

rjk ef

1 kk

1 jj

end while

1 rr

end while

52 Uplink transport channels and control information

521 Random access channel

The sequence index for the random access channel is received from higher layers and is processed

according to [2]

522 Uplink shared channel

The processing structure for the xUL-SCH transport channel on one UL cell

Add CRC to the transport block

Code block segmentation (and code block CRC attachment only for turbo input bit sequence)

Channel coding of data and control information

Rate matching

Code block concatenation

Multiplexing of data and control information

Channel interleaver

The coding steps for one xUL-SCH transport block are shown in the figure below The same general

processing applies for each xUL-SCH transport block

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31

Code block segmentation

(CRC attachment)

Channel coding

Transport blockCRC attachment

1B10 bbb

Rate matching

Data and Control multiplexing [FFS]

Channel Interleaver [FFS]

1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff

Code blockConcatenation

1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh

Figure 522-1 Transport block processing for xUL-SCH

5221 Transport block CRC attachment

Error detection is provided on each xUL-SCH transport block through a Cyclic Redundancy Check (CRC)

The entire transport block is used to calculate the CRC parity bits Denote the bits in a transport block

delivered to layer 1 by 13210 Aaaaaa and the parity bits by 13210 Lppppp A is the size of

the transport block and L is the number of parity bits The lowest order information bit a0 is mapped to the

most significant bit of the transport block as defined in section 611 of [4]

The parity bits are computed and attached to the xUL-SCH transport block according to section 511

setting L to 24 bits and using the generator polynomial gCRC24A(D)

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32


The bits input to the code block segmentation are denoted by 13210 Bbbbbb where B is the number

of bits in the transport block (including CRC)

The bits after code block segmentation are denoted by 13210 rKrrrrr ccccc where r is the code

block number and Kr is the number of bits for code block number r

5223 Channel coding of xUL-SCH

Code blocks are delivered to the channel coding block The bits in a code block are denoted by

13210 rKrrrrr ccccc where r is the code block number and Kr is the number of bits in code block

number r The total number of code blocks is denoted by C and each code block is individually LDPC or

turbo (as optional) encoded according to section 5132 or section 5133

After LDPC encoding the bits are denoted by dr0 dr1 dr2 hellip dr(Dr-1) with Dr = Nldpc is the number of bits on

the i-th coded stream for code block number r

After turbo encoding the bits are denoted by )(

1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and where rD is

the number of bits on the i-th coded stream for code block number r ie 4 rr KD

5224 Rate matching

LDPC or Turbo coded blocks are delivered to the rate matching block They are denoted by dr0 dr1 dr2

hellip dr(Dr-1) where r is the code block number i is the coded stream index and Dr = Nldpc is the number of

bits in each coded stream of code block number r The total number of code blocks is denoted by C and

each coded block is individually rate matched according to section 5141

After rate matching the bits are denoted by 13210 rErrrrr eeeee where r is the coded block number

and where rE is the number of rate matched bits for code block number r


The bits input to the code block concatenation block are denoted by 13210 rErrrrr eeeee for

10 Cr and where rE is the number of rate matched bits for the r-th code block

Code block concatenation is performed according to section 515

The bits after code block concatenation are denoted by 13210 Gfffff where G is the total number

of coded bits for transmission of the given transport block over LN transmission layers excluding the bits

used for control transmission when control information is multiplexed with the xUL-SCH transmission

5226 Channel coding for UCI

Control data arrives at the coding unit in the form of channel quality information (CQI andor PMI) and

rank indication and beam-related information (beam state information (BSI) and beam refined information

TS V5G212 V12 (2016-06)

33

(BRI)) Different coding rates for the control information are achieved by allocating different number of

coded symbols for its transmission When control data are transmitted in the xPUSCH the channel

coding for rank indication beam-related information and channel quality information 1210 Ooooo is

done independently

When the UE transmits rank indicator bits it shall determine the number of coded modulation symbols per

layer Q for rank indicator bits as follows

Only one transport block is transmitted in the xPUSCH conveying the rank indicator bits

1

0

min

xPUSCH initial xPUSCH initial xPUSCH

sc symb offset xPUSCH xPUSCH

sc symbC

rr

O M NQ M N

K

where

O is the number of rank indicator bits and

xPUSCH

scM is the scheduled bandwidth for xPUSCH transmission in the current subframe for the transport

block expressed as a number of subcarriers in [2] where a number of subcarriers used for PCRS

transmission are not counted and

xPUSCH

symbN is the number of OFDM symbols per subframe for xPUSCH transmission in the current

subframe for the transport block respectively where symbol(s) that DMRS is mapped on is not

counted

xPUSCH-initial

symbN xPUSCH initial

scM C and rK are obtained from the initial xPDCCH for the same transport

block If there is no initial xPDCCH for the same transport block C and rK shall be determined from

ndash the random access response grant for the same transport block when the xPUSCH is initiated by

the random access response grant

For rank indication RI mQ Q Q and xPUSCH RI

offset offset where mQ is the modulation order of a given

transport block and RI

offset shall be determined according to [3]

For rank indication (RI)

If RI feedback consists of 1-bit of information ie 0[ ]RIo it is first encoded according to Table 5226-3

The 0[ ]RIo to RI mapping is given by Table 5226-4

Table 5226-1 Encoding of 1-bit RI

Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2

The ldquoxrdquo and ldquoyrdquo in Table 5226-1 are placeholders for [2] to scramble the RI bit in a way that maximizes

the Euclidean distance of the modulation symbols carrying rank information

For the case where RI feedback consists of one bit of information the bit sequence 0 1 2 1

RI

RI RI RI RI

Qq q q q is

obtained by concatenation of multiple encoded RI blocks where RIQ is the total number of coded bits for

all the encoded RI blocks The last concatenation of the encoded RI block may be partial so that the total bit sequence length is equal to

RIQ

When rank information is to be multiplexed with xUL-SCH at a given xPUSCH the rank information is

multiplexed in all layers of transport block of that xPUSCH For a given transport block the vector

sequence output of the channel coding for rank information is denoted by 0 1 1

RI

RI RI RI

Qq q q

where RI

iq

0 1RIi Q are column vectors of length ( )m LQ N and where RI RI mQ Q Q The vector sequence is

obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI

k mqqq -- temporary row vector

T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[

-- replicating the row vector RI

kq NL times and transposing into a column vector

mQii

1 kk

end while

where LN is the number of layers onto which the xUL-SCH transport block is mapped

For channel quality control information (CQI andor PMI andor BSI andor BRI denoted as

CQIPMIBSIBRI)

When the UE transmits channel quality control information bits it shall determine the number of

modulation coded symbols per layer Q for channel quality information and beam related information as

TS V5G212 V12 (2016-06)

35

1

0

( )min


sc symb offset xPUSCH xPUSCH RIsc symbC

mr

r

O L M N QQ M N

QK

where

O is the number of CQIPMIBSIBRI bits and

L is the number of CRC bits given by

otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI

offset offset where CQI

offset shall be determined according to [3] depending on

the number of transmission codewords for the corresponding xPUSCH

If RI is not transmitted then or 0RIQ respectively

xPUSCH initial

symbN

xPUSCH initial


block If there is no xPDCCH for the same transport block xPUSCH initial

scM C and rK shall be determined

from

the random access response grant for the same transport block when the xPUSCH is initiated by


For xUL-SCH data information xPUSCH xPUSCH

symb scL m CQI RIG N N M Q Q Q where

LN is the number of layers the corresponding xUL-SCH transport block is mapped onto and

xPUSCH

scM is the scheduled bandwidth for xPUSCH transmission in the current sub-frame for the

transport block where the subcarriers used for PCRS transmission are not counted and

xPUSCH

symbN is the number of OFDM symbols in the current xPUSCH transmission sub-frame block

obtained from the xPDCCH for the same transport block where symbol(s) that DMRS is mapped

on are not counted

If the CQIPMIBSIBRI payload size is less than or equal to 11 bits the channel coding of the channel

quality information is performed according to section 52263 with input sequence 0 1 2 1 Oo o o o

For CQIPMIBSIBRI payload sizes greater than 11 bits the CRC attachment channel coding and rate

matching of the channel quality information is performed according to sections 511 5131 and 5142

respectively The input bit sequence to the CRC attachment operation is 0 1 2 1 Oo o o o The output bit

sequence of the CRC attachment operation is the input bit sequence to the channel coding operation

The output bit sequence of the channel coding operation is the input bit sequence to the rate matching

operation

The output sequence for the channel coding of channel quality information is denoted by

0 1 2 3 1 L CQIN Qq q q q q where

LN is the number of layers the corresponding xUL-SCH transport block is

mapped onto

TS V5G212 V12 (2016-06)

36

52261 Channel quality information formats for wideband CQI reports

Table 52261-1 shows the fields and the corresponding bit widths for the channel quality information

feedback for wideband reports for xPDSCH transmissions

Table 52261-1 Fields for channel quality information feedback for one wideband CQI report

Field Bit width

Rank = 1 Rank = 2 No PMI

Wideband CQI 4 4 4

Precoding matrix indicator (PMI) 248 248 0

Rank indication (RI) 1 1 0

The bit width of PMI depends on the number of the corresponding CSI-RS port for 248 Tx ports the bit

width of PMI is equal to 2 bits 4bits and 8bits respectively

In the case when BSI is sent together on xPUSCH with CQIPMI the bits defined in Table 52261-2 are

appended at the end of the sequence N is configured by the higher layers

Table 52261-2 Fields for BSI feedback for wideband report

Field Bit width

Beam index 9N

Wide-band BRSRP 7N

In the case when BRI is sent together on xPUSCH with CQIPMI and BSI the bits defined in Table

52261-3 are appended at the end of the sequence N is configured by the higher layers

Table 52261-3 Fields for BRI feedback for one wideband report

Field Bit width

BRRS-RI 3N

Wide-band BRRS-RP 7N

The channel quality and beam related information bits in Table 52261-1 52261-2 and 52261-3

form the bit sequence 1210 Ooooo with 0o corresponding to the first bit of the first field in the table

1o corresponding to the second bit of the first field in the table and 1Oo corresponding to the last bit in

the last field in the table The first bit of each field corresponds to MSB and the last bit LSB The RI bit

sequence in Table 52261-1 is encoded according to section 5226

52262 Channel coding for CQIPMI information in xPUSCH

The channel quality andor beam related information bits input to the channel coding block are denoted by

13210 Oooooo where O is the number of bits The number of channel quality and beam related

information bits depends on the transmission format When xPUCCH-based reporting format is used the

number of CQIPMI bits is defined in section 52331 for wideband reports When xPUSCH-based

reporting format is used the number of CQIPMI bits is defined in section 52261 for wideband reports

TS V5G212 V12 (2016-06)

37

The channel quality andor beam related information is first coded using a (32 O) block code The code

words of the (32 O) block code are a linear combination of the 11 basis sequences denoted Min and

defined in Table 52263-1

Table 52263-1 Basis sequences for (32 O) code

i Mi0 Mi1 Mi2 Mi3 Mi4 Mi5 Mi6 Mi7 Mi8 Mi9 Mi10

0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0

The encoded CQIPMI block is denoted by 13210 Bbbbbb where 32B and

1

0

2modO

n

nini Mob where i = 0 1 2 hellip B-1

The output bit sequence 0 1 2 3 1

L CQIN Qq q q q q is obtained by circular repetition of the encoded

CQIPMI block as follows

TS V5G212 V12 (2016-06)

38

Bii bq mod where i = 0 1 2 hellip NLQCQI-1 where NL is the number of layers the corresponding

xUL-SCH transport block is mapped onto

5227 Data and control multiplexing

The control and data multiplexing is performed such that the multiplexing ensures control and data

information are mapped to different modulation symbols

The inputs to the data and control multiplexing are the coded bits of the control information denoted by

13210 CQIL QNqqqqq where mCQICQI QQQ and the coded bits of the xUL-SCH denoted by

13210 Gfffff The output of the data and control multiplexing operation is denoted by

13210

Hggggg where CQIL QNGH and mL QNHH and where

ig 10 Hi

are column vectors of length Lm NQ H is the total number of coded bits allocated for xUL-SCH data

and CQIPMIBSIBRI information across the LN transmission layers of the transport block

In the case of single transport block transmission and assuming that LN is the number of layers onto

which the xUL-SCH transport block is mapped the control information and the data shall be multiplexed

as follows

Set i j k to 0

while CQIL QNj -- first place the control information

TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while

while Gi -- then place the data

TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while

5228 Channel interleaver

The channel interleaver described in this section in conjunction with the resource element mapping for

xPUSCH in [2] implements a time-first mapping of control modulation symbols and frequency-first

mapping of data modulation symbols onto the transmit waveform

TS V5G212 V12 (2016-06)

39

The inputs to the channel interleaver are denoted by 1210

H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210

The number of modulation symbols per layer in the subframe is given by total RIH H Q The output bit

sequence from the channel interleaver is derived as follows

[1] Assign PUSCHsymbNCmux to be the number of columns of the matrix The columns of the matrix are

numbered 0 1 2hellip 1muxC from left to right PUSCHsymbN is determined according to section 5226

[2] The number of rows of the matrix is muxLmtotalmux CNQHR and define

Lmmuxmux NQRR

The rows of the rectangular matrix are numbered 0 1 2hellip 1muxR from top to bottom

)1(2)1(1)1()1(

1221

1210

muxmuxmuxmuxmuxmuxmuxmux

muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

[3] If rank information is transmitted in this subframe the vector sequence 0 1 2 1

RI

RI RI RI RI

Qq q q q

is

written into the muxmux CR matrix by sets of Lm NQ rows starting with the vector 0

y in

column 0 and rows 0 to 1 Lm NQ according to the following pseudo-code

Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while

[4] Write the portion of the input vector sequence containing CQIPMIBSIBRI information

1210

CQIQgggg into the muxmux CR matrix according to the following pseudo-code

Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while

[5] Write the remaining portion of the input vector sequence containing the xUL-SCH data

121

HQQQgggg

CQICQICQI

into the muxmux CR matrix column by column starting with the

vector 0

y and moving downward skipping the matrix entries that are already occupied

TS V5G212 V12 (2016-06)

40

[6] The output of the block interleaver is the bit sequence read out column by column from the

muxmux CR matrix The bits after channel interleaving are denoted by 1210 Lmtotal NQHhhhh

where NL is the number of layers the corresponding xUL-SCH transport block is mapped onto

523 Uplink control information on xPUCCH

Data arrives to the coding unit in the form of indicators for scheduling request HARQ acknowledgement

(HARQ-ACK) rank indicator channel quality information (CQIPMI) and beam related information (BSI or

BRI)

One form of channel coding is used as shown in Figure 523-1 for HARQ-ACK transmitted on xPUCCH

format 1a1b and for at least one or combination of HARQ-ACK rank indicator the channel quality

information (CQIPMI) and beam related information (BSI or BRI) transmitted on xPUCCH format 2

110 Aaaa

110 Bbbb

Channel coding

Figure 523-1 Processing for UCI

5231 Channel coding for UCI HARQ-ACK

The HARQ-ACK bits are received from higher layers for each subframe HARQ-ACK consists of 1-bit of

information ie 0b corresponding to ACKNACK bit for codeword 0 Each positive acknowledgement

(ACK) is encoded as a binary lsquo1rsquo and each negative acknowledgement (NACK) is encoded as a binary lsquo0rsquo

For the case where xPUCCH format 2 [2] is scheduled [3] the HARQ-ACK feedback consists of the

concatenation of HARQ-ACK bits which the UE needs to feedback for downlink subframes For all cells 1

bit of HARQ-ACK information ka is used The HARQ-ACK bits are processed for transmission according

to section 111 [3]

Define xPUCCH format 2

A NN as the number of HARQ-ACK bits when xPUCCH format 2 is used for transmission

of HARQ-ACK feedback (section 111 in [3])

The sequence of bits 1210 2format xPUCCH

NAN

aaaa is obtained from the HARQ-ACK bits for different

downlink subframes

Define DL

cB as the number of downlink subframes for which the UE needs to feedback HARQ-ACK bits in

cell c as defined in Section 73 of [3]

The number of HARQ-ACK bits for the UE to convey is computed as follows

Set k = 0 ndash counter of HARQ-ACK bits

TS V5G212 V12 (2016-06)

41

set l = 0 ndash counter of downlink subframes

while l lt DL

cB

1 bit HARQ-ACK feedback for this cell

k = k + 1

l = l+1

end while

The sequence of bits xPUCCH format 2

0 1 2 1

A NNa a a a

is encoded as follows

xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M

where i = 0 1 2 hellip 31 and the basis sequences niM are defined in Table 52263-1

The output bit sequence 1210 Bbbbb is obtained by circular repetition of the sequence

31210

~

~

~

~bbbb

32mod

~ii bb

where i = 0 1 2 hellip B-1 and where RB

sc8B N

5232 Channel coding for UCI channel quality information

The channel quality bits input to the channel coding block are denoted by 13210 Aaaaaa where A is

the number of bits The number of channel quality bits depends on the transmission format as indicated in

section 52331 for wideband reports

For the channel quality information bits 13210 Aaaaaa channel coding defined in section 5231

shall be applied The output bit sequence 0 1 2 1 Bb b b b where RB

sc8B N is obtained after the channel

coding

52321 Channel quality information formats for wideband reports


feedback for wideband reports for xPDSCH transmissions The bit width of precoding matrix depends on

the number of the corresponding CSI-RS port ie for 248 Tx antenna ports the bit width of PMI is

equal to 2 bits 4 bits and 8 bits respectively

Table 52321-1 Fields for channel quality information feedback for one wideband CQI reports

Field Bit width


TS V5G212 V12 (2016-06)

42

Wideband CQI for codeword 0 4 4 4



The channel quality bits in Table 52321-1 form the bit sequence 13210 Aaaaaa with 0a

corresponding to the first bit of the first field in each of the tables 1a corresponding to the second bit of

the first field in each of the tables and 1Aa corresponding to the last bit in the last field in each of the

tables The first bit corresponds to MSB and the last bit LSB

5233 Channel coding for UCI beam-related information

The beam-related information (BSI or BRI) bits input to the channel coding block are denoted by

0 1 2 3 1 Aa a a a a where A is the number of bits The number of BSI information bits for wideband report

is given in section 52341 and the number of BRI information bits for wideband report is given in section

52342

For the beam-related information (BSI or BRI) bits 13210 Aaaaaa channel coding defined in section

5231 shall be applied The output bit sequence 0 1 2 1 Bb b b b where RB

sc8B N is obtained after the

channel coding

52331 Beam state information format for wideband report

Table 52331-1 shows the fields and the corresponding bit widths for the BSI feedback for wideband

report

Table 52331-1 Fields for BSI feedback for one wideband report

Field Bit width

BRS index 9

Wide-band BRSRP 7

The BSI information bits in Table 52341-1 form the bit sequence 0 1 2 3 1 Aa a a a a with 0a




52332 Beam refinement information format for wideband report

Table 52322-1 shows the fields and the corresponding bit widths for the BRI feedback for wideband

report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7

The BRI information bits in Table 52342-1 form the bit sequence 0 1 2 3 1 Aa a a a a with 0a




5234 Channel coding for multiple UCIs

When the UE has to simultaneously transmit multiple UCIs on xPUCCH in a subframe the UCIs shall be

combined into a single stream of bits 0 1 2 3 1 Aa a a a a in the order of HARQ-ACK bits scheduling

request bit rank indicator bit channel quality information bits beam state information bits and beam

refinement information bits starting from 0 1 2 3 1 Aa a a a a

For the combined information bits 13210 Aaaaaa channel coding defined in section 5231 shall be

applied The output bit sequence 0 1 2 1 Bb b b b where RB

sc8B N is obtained after the channel coding

524 Uplink control information on xPUSCH without xUL-SCH data

When control data are sent via xPUSCH without xUL-SCH data the following coding steps can be

identified

Channel coding of control information

Control information mapping

Channel interleaver

5241 Channel coding of control information

Control data arrives at the coding unit in the form of channel quality information (CQI andor PMI) beam

related information (BSI andor BRI) and rank indication Different coding rates for the control information

are achieved by allocating different number of coded symbols for its transmission When the UE transmits rank indicator or beam-related information it shall determine the number of coded symbols Q for the

above information bits as

min

xPUSCH xPUSCH xPUSCH


symb sc

CQI MIN

O M NQ N M

O

where O is the number of rank indicator bits or beam-related information bits as defined in section

5226 CQI MINO is the number of CQI bits including CRC bits assuming rank equals to 1 xPUSCH

scM is the

scheduled bandwidth for xPUSCH transmission in the current subframe expressed as a number of

subcarriers in [2] where a number of subcarriers used for PCRS transmission are not counted and xPUSCH

symbN is the number of OFDM symbols in the current xPUSCH transmission subframe where symbol(s)

that DMRS is mapped on is not counted

TS V5G212 V12 (2016-06)

44

For rank indication RI mQ Q Q and [xPUSCH RI CQI

offset offset offset ] where RI

offset shall be determined according

to [3]

For BSI information BSI mQ Q Q and [xPUSCH BSI CQI

offset offset offset ] where BSI


to [3]

For BRI information BRI mQ Q Q and [xPUSCH BRI CQI

offset offset offset ] where BRI

offset shall be determined

according to [3]

For CQI andor PMI information xPUSCH xPUSCH

CQI symb sc m ACK RI BSI BRIQ N M Q Q Q Q Q

The channel coding and rate matching of the control data is performed according to section 5226 The

coded output sequence for channel quality information is denoted by 0 1 2 3 1

CQIQq q q q q and coded

vector sequence output for rank indication is denoted by 0 1 2 1

RI

RI RI RI RI

Qq q q q

5242 Control information mapping

The input are the coded bits of the channel quality information denoted by 0 1 2 3 1 CQIQq q q q q The

output is denoted by 0 1 2 3 1

Hg g g g g

where

CQIH Q and mH H Q and wherei

g 0 1i H

are column vectors of length mQ H is the total number of coded bits allocated for CQIPMIBSIBRI

information

The control information shall be mapped as follows

Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while


The vector sequences 0 1 2 1

Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q

are channel interleaved according

section 5228 The bits after channel interleaving are denoted by 0 1 2 1 RIH Qh h h h

TS V5G212 V12 (2016-06)

45

53 Downlink transport channels and control information

531 Broadcast channel

Figure 531-1 shows the processing structure for the xBCH transport channel Data arrives to the coding

unit in the form of a maximum of one transport block every transmission time interval (TTI) of 40ms The

following coding steps can be identified


Channel coding

Rate matching

The coding steps for xBCH transport channel are shown in the figure below

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd

Figure 531-1 Transport channel processing for xBCH


Error detection is provided on xBCH transport blocks through a Cyclic Redundancy Check (CRC)



the transport block and set to 16 bits and L is the number of parity bits The lowest order information bit a0

is mapped to the most significant bit of the transport block as defined in [4]

The parity bits are computed and attached to the xBCH transport block according to section 511 setting

L to 16 bits After the attachment the CRC bits are scrambled according to the 5GNB transmit antenna

configuration with the sequence 1510 antantant xxx as indicated in Table 5311-1 to form the sequence

of bits 13210 Kccccc where

TS V5G212 V12 (2016-06)

46

kk ac for k = 0 1 2 hellip A-1

2mod AkantAkk xpc for k = A A+1 A+2 A+15

Table 5311-1 CRC mask for xPBCH

Number of transmit antenna ports for BRS xPBCH CRC mask

1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding

Information bits are delivered to the channel coding block They are denoted by 13210 Kccccc where

K is the number of bits and they are tail biting convolutionally encoded according to section 5131

After encoding the bits are denoted by)(1

)(3

)(2

)(1

)(0

iD

iiiiddddd with 2 and 10i and where D is the

number of bits on the i-th coded stream ie KD

5313 Rate matching

A tail biting convolutionally coded block is delivered to the rate matching block This block of coded bits is

denoted by)(1

)(3

)(2

)(1

)(0

iD

iiiiddddd with 2 and 10i and where i is the coded stream index and D is the

number of bits in each coded stream This coded block is rate matched according to section 5142

After rate matching the bits are denoted by 13210 Eeeeee where E is the number of rate matched bits

as defined in section 661 of [2]

531A Extended broadcast channel


unit in the form of a maximum of one transport block The following coding steps can be identified


Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd


531A1 Transport block CRC attachment



delivered to layer 1 by 13210 Aaaaaa and the parity bits by 13210 Lppppp A is the size of the

transport block and set to 248 bits [Editorrsquos Note May be revisited pending final xSIB content] and L is the

number of parity bits The lowest order information bit a0 is mapped to the most significant bit of the

transport block as defined in [4]


L to 16 bits

531A2 Channel coding

Information bits are delivered to the channel coding block They are denoted by 13210 Kccccc ( kk ac )

where K is the number of bits and they are tail biting convolutionally encoded according to section

5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48



532 Downlink shared channel

Figure 532-1 shows the processing structure for each transport block for the xDL-SCH transport

channel Data arrives to the coding unit in the form of a maximum of two transport blocks every

transmission time interval (TTI) per DL cell The following coding steps can be identified for each transport

block of a DL cell



Channel coding

Rate matching


The coding steps for one transport block of xDL-SCH are shown in the figure below The same

processing applies for each transport block on each DL cell

TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment


(code block CRC attachment)

Figure 532-1 Transport block processing for xDL-SCH


Error detection is provided on transport blocks through a Cyclic Redundancy Check (CRC)

The entire transport block is used to calculate the CRC parity bits Denote the bits in a transport block delivered to layer 1 by

13210 Aaaaaa and the parity bits by13210 Lppppp A is the size of the

transport block and L is the number of parity bits The lowest order information bit a0 is mapped to the


The parity bits are computed and attached to the transport block according to section 511 setting L to 24

bits and using the generator polynomial gCRC24A(D)




TS V5G212 V12 (2016-06)

50



5323 Channel coding

Code blocks are delivered to the channel coding block They are denoted by 13210 rKrrrrr ccccc

where r is the code block number and Kr is the number of bits in code block number r The total number

of code blocks is denoted by C and each code block is individually LDPC or turbo encoded according to

section 5132



After turbo encoding (optional) the bits are denoted by )(

1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and

where rD is the number of bits on the i-th coded stream for code block number r ie 4 rr KD

5324 Rate matching











The bits after code block concatenation are denoted by13210 Gfffff where G is the total number of

coded bits for transmission This sequence of coded bits corresponding to one transport block after code

block concatenation is referred to as one codeword in section 631 of [2] In case of multiple transport

blocks per TTI the transport block to codeword mapping is specified according to section 53315

53315A or 53315B depending on the DCI Format

533 Downlink control information

Figure 533-1 shows the processing structure for one DCI The following coding steps can be identified

Information element multiplexing

CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching

The coding steps for DCI are shown in the figure below

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee

Figure 533-1 Processing for one DCI

5331 DCI formats

The fields defined in the DCI formats below are mapped to the information bits a0 to aA-1 as follows

Each field is mapped in the order in which it appears in the description including the zero-padding bit(s)

if any with the first field mapped to the lowest order information bit a0 and each successive field mapped

to higher order information bits The most significant bit of each field is mapped to the lowest order

information bit for that field eg the most significant bit of the first field is mapped to a0

Note All DCI formats shall have the same payload size of 60 bits

53311 Format A1

DCI format A1 is used for the scheduling of xPUSCH

The following information is transmitted by means of the DCI format A1 in subframe n

- DCI format discriminator ndash 2 bits where 00 indicates format A1

- xPUSCH range ndash 2bits as defined in section 92 of [3]

- Transmission timing of xPUSCH ndash 3 bits where this field indicates transmission time offset value

lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52

If this DCI format assigns more than zero RB then the corresponding xPUSCH is scheduled in subframe n+4+l+m

Otherwise this field shall be set to all zeros

where the value of m is indicated by the ldquotransmission timing of CSI-RS BRRSrdquo field

- RB assignment ndash 9 bits

If the indicated value is smaller than or equal to 324 then this field assigns more than zero RB as described in section 92 of [3]

Else if the indicated value is equal to 325 then this format assigns zero RB

Else if the indicated value is equal to 326 then this format assigns zero RB and used for random access procedure initiated by a xPDCCH order

Otherwise then this format is assumed to be misconfigured and UE shall discard the corresponding xPDCCH

If this DCI format assigns more than zero RB - HARQ process number ndash 4 bits

- MCS ndash 4 bits

- NDI ndash 1 bit

Else if this DCI format is used for random access procedure initiated by a xPDCCH order - Frequency band index nRACH in section 572 in [2] ndash 3 bits

- OCC indicator frsquo in section 572 in [2] ndash 1 bit where 0 indicates frsquo = 0 and 1 indicates for frsquo=1

- Cyclic shift indicator in section 572 in [2] ndash 2 bits

- Reserved ndash 3 bits which shall be set to all zeros

Otherwise - Reserved ndash 9 bits which shall be set to all zeros

- CSI BSI BRI request ndash 3 bits

If the indicated value is 000 then none of CSIBSIBRI is requested

Else if the indicated value is 001 then this DCI format triggers BSI reporting

Else if the indicated value is 010 then this DCI format allocates BRRS and also triggers corresponding BRI reporting

Else if the indicated value is 011 then this DCI format allocates BRRS but does not trigger BRI reporting

Else if the indicated value is 100 then this DCI format allocates CSI-RS and also triggers corresponding CSI reporting

TS V5G212 V12 (2016-06)

53

The values 101 110 and 111 are reserved

- Transmission timing of CSI-RS BRRS ndash 2 bits where this field indicates transmission time

offset value misin0 1 2 3

If this DCI format allocates either of CSI-RS or BRRS then the corresponding transmission is allocated in subframe n + m

Otherwise it shall be set to all zeros

- Indication of OFDM symbol index for CSI-RS BRRS allocations ndash 2 bits

If this DCI format allocates CSI-RS then this field indicates OFDM symbols used for CSI-RS transmission

00 13th 01 14th 10 13amp14th 11 Reserved

Else if this DCI format allocates BRRS and higher-layer gives either of 1 or 2 symbol BRRS configuration then this field indicates OFDM symbols used for BRRS transmission



00 5 symbols in slot 0 01 5 symbols in slot 1 10 10 symbols 11 Reserved


If this DCI format allocates either of CSI-RS or BRRS transmission - Process indicator ndash 2 bits

00 Process 0 01 Process 1 10 Process 2 11 Process 3

Else if this DCI format triggers BSI request - Number of BSI reports ndash 2 bits

00 1 BSI report 01 2 BSI reports 10 4 BSI reports 11 Reserved

- UCI on xPUSCH wo xUL-SCH data indicator ndash 1 bit

If no UCI report is triggered then this field is invalid and shall be set to zero

Otherwise the indicated value of 0 allows multiplexing of xUL-SCH data and UCI and the indicated value of 1 allows only UCI transmission on xPUSCH

- Beam switch indication ndash 1 bit as described in section 834 and in section 844 of [3]

- SRS request ndash 3 bits

MSB 2 bits are used for the indication of SRS configurations

00 No SRS request 01 Config 0 10 Config 1 11 Config 2

LSB 1 bit

TS V5G212 V12 (2016-06)

54

If SRS is not requested this field is invalid and shall be set to zero

If SRS is requested 0 indicates SRS transmission on the 13th OFDM symbol and 1

indicates SRS transmission on the 14th OFDM symbol in subframe n+4+l+ m+1

- Antenna port(s) and number of layers ndash 3 bits as specified in Table 53311-1

- SCID ndash 1bit where this field indicates which nSCID is applied for both DMRS in subframe n and CSI-RS in subframe n+m

If the indicated value is 0 then nSCID =0 is applied


- Precoding matrix indicator ndash 3 bits as specified in Table 533A2-1 of [2]

- TPC command for xPUSCH ndash 2 bits as defined in section 6111 of [3]

- UL dual PCRS ndash 1 bit

If single-layer transmission is triggered by this DCI format

If the indicated value is 0 then the scheduled xPUSCH uses a PCRS AP corresponding to a DM-RS AP

If the indicated value is 1 then the scheduled xPUSCH uses two PCRS AP(s) the first AP is corresponding to the allocated DM-RS AP and the second AP is one whose REs are co-located in the same subcarrier with the first PCRS AP

Otherwise this field is not valid and shall be set to zero

If the number of information bits in format A1 is less than 60 bits zeros shall be appended to format A1

until the payload size equals to 60 bits

Table 53311-1 Antenna port(s) and number of layers indication by UL DCI formats

Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43

4 2 Layers ports 40 41


6 7 Reserved

53312 Format A2


All of the information fields in the DCI format A1 are also used for DCI format A2 except the following field - DCI format discriminator ndash 2 bits where 01 indicates format A2

TS V5G212 V12 (2016-06)

55



53313 Format B1

DCI format B1 is used for the scheduling of xPDSCH

The following information is transmitted by means of the DCI format B1 in subframe n

- DCI format discriminator ndash 2 bits where 10 indicates format B1

- xPDSCH range ndash 2bits as defined in section 814 of [3]







- MCS ndash 4 bits

- NDI ndash 1 bit

- Redundancy version ndash 2 bits

- Bit-mapping index for HARQ-ACK multiplexing (BMI) ndash 3bits as described in section 84 of [3]







TS V5G212 V12 (2016-06)

56






















If this DCI format triggers any UCI report - Transmission timing of xPUCCH for UCI report ndash 3 bits where this field indicates

transmission time offset value kisin0 1 hellip 7

TS V5G212 V12 (2016-06)

57

xPUCCH transmission is allocated in subframe n + 4 + k + m

- Frequency resource index of xPUCCH for UCI report ndash 4 bits






LSB 1 bit



indicates SRS transmission on the 14th OFDM symbol in subframe n +4 +m+k+1

- Antenna port(s) and number of layers indicationndash4 bits as specified in Table 53313-1




- TPC command for xPUCCH ndash 2 bits as defined in section 612 of [3]

- DL PCRS ndash 2 bits

00 No PCRS 01 PCRS on AP 60 10 PCRS on AP 61 11 PCRS on AP 60 and 61

If the number of information bits in format B1 is less than 60 bits zeros shall be appended to format B1


Table 53313-1 Antenna port(s) and number of layers indication by DL DCI formats

Value Message

0 1 Layer port 8 (Ch estimation wo OCC)




4 2 Layers ports 8 9 (Ch estimation wo OCC)


TS V5G212 V12 (2016-06)

58

6 2 Layers ports 8 12 (OCC = 2)




10-15 Reserved

53314 Format B2


All of the information fields in the DCI format B1 are also used for DCI format B2 except the following field

DCI format discriminator ndash 2 bits where 11 indicates format B2



5332 CRC attachment

Error detection is provided on DCI transmissions through a Cyclic Redundancy Check (CRC)

The entire payload is used to calculate the CRC parity bits Denote the bits of the payload by

13210 Aaaaaa and the parity bits by13210 Lppppp A is the payload size and L is the number

of parity bits

The parity bits are computed and attached according to section 511 setting L to 16 bits resulting in

13210 Bbbbbb where B = A+ L

After attachment the CRC parity bits are scrambled with the corresponding RNTI 1510 rntirntirnti xxx

where 0rntix corresponds to the MSB of the RNTI to form the sequence of bits 13210 Bccccc The

relation between ck and bk is

kk bc for k = 0 1 2 hellip A-1

2mod Akrntikk xbc for k = A A+1 A+2 A+15

5333 Channel coding



After encoding the bits are denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd

with 2 and 10i and where D is the


TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd

with 2 and 10i and where i is the coded stream index and D is the


After rate matching the bits are denoted by 13210 Eeeeee where E is the number of rate matched

bits

TS V5G212 V12 (2016-06)

2

Document History

Version Date Change Verizon POC

01 2016-03-31 Draft version created

02 2016-03-31 Agreements after April 5GTF F2F



10 2016-05-18 First version approved

11 2016-06-15 CR001 ndash Introduction of DCI formats A1 A2 B1 B2






12 2016-06-29

New release including CR002 CR003 CR004 CR005 and CR006

Document Approvals

Name Title Company Date of Approval

TS V5G212 V12 (2016-06)

3

Table of Contents

1 Scope 5

2 References 5


31 Symbols 5

32 Abbreviations 5


41 Uplink 6

42 Downlink 7


















List of Figures







TS V5G212 V12 (2016-06)

4





List of Tables

Table 41-1 6

Table 41-2 6

Table 42-1 7

Table 42-2 7













Table 5226-2 0











TS V5G212 V12 (2016-06)

5

1 Scope



2 References




non-specific




present document









31 Symbols



32 Abbreviations


5GNB 5G NodeB



TS V5G212 V12 (2016-06)

6















41 Uplink



physical channel

Table 41-1


xUL-SCH xPUSCH

Table 41-2


UCI xPUCCH xPUSCH

TS V5G212 V12 (2016-06)

7

42 Downlink




Table 42-1


xDL-SCH xPDSCH

xBCH xPBCH ePBCH

Table 42-2


DCI xPDCCH








information type

511 CRC calculation




gCRC24A(D) = [D24

+ D23

+ D18

+ D17

+ D14

+ D11

+ D10

+ D7 + D

6 + D

5 + D

4 + D

3 + D + 1] and

gCRC24B(D) = [D24

+ D23

+ D6 + D


gCRC16(D) = [D16

+ D12


gCRC8(D) = [D8 + D

7 + D

4 + D



231

2222

123

024

122

123

0 pDpDpDpDaDaDa AAA



TS V5G212 V12 (2016-06)

8

151

1414

115

016

114

115

0 pDpDpDpDaDaDa AAA


7

1

6

6

1

7

0

8

1

6

1

7

0 pDpDpDpDaDaDa A

AA



ak and bk is










Code Rate Kmax Kmin

56 1620 540

34 1458 486

23 1296 432

12 972 324


code block number




if Ble Kmax


else

TS V5G212 V12 (2016-06)

9


end if



code block number r


if C = 1



else



of Kmin


120574 = 119865primemod 119862


if 119903 le 119862 minus 120574 minus 1



else



end if

end for r

end if

s = 0



TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

3

Table of Contents

1 Scope 5

2 References 5


31 Symbols 5

32 Abbreviations 5


41 Uplink 6

42 Downlink 7


















List of Figures







TS V5G212 V12 (2016-06)

4





List of Tables

Table 41-1 6

Table 41-2 6

Table 42-1 7

Table 42-2 7













Table 5226-2 0











TS V5G212 V12 (2016-06)

5

1 Scope



2 References




non-specific




present document









31 Symbols



32 Abbreviations


5GNB 5G NodeB



TS V5G212 V12 (2016-06)

6















41 Uplink



physical channel

Table 41-1


xUL-SCH xPUSCH

Table 41-2


UCI xPUCCH xPUSCH

TS V5G212 V12 (2016-06)

7

42 Downlink




Table 42-1


xDL-SCH xPDSCH

xBCH xPBCH ePBCH

Table 42-2


DCI xPDCCH








information type

511 CRC calculation




gCRC24A(D) = [D24

+ D23

+ D18

+ D17

+ D14

+ D11

+ D10

+ D7 + D

6 + D

5 + D

4 + D

3 + D + 1] and

gCRC24B(D) = [D24

+ D23

+ D6 + D


gCRC16(D) = [D16

+ D12


gCRC8(D) = [D8 + D

7 + D

4 + D



231

2222

123

024

122

123

0 pDpDpDpDaDaDa AAA



TS V5G212 V12 (2016-06)

8

151

1414

115

016

114

115

0 pDpDpDpDaDaDa AAA


7

1

6

6

1

7

0

8

1

6

1

7

0 pDpDpDpDaDaDa A

AA



ak and bk is










Code Rate Kmax Kmin

56 1620 540

34 1458 486

23 1296 432

12 972 324


code block number




if Ble Kmax


else

TS V5G212 V12 (2016-06)

9


end if



code block number r


if C = 1



else



of Kmin


120574 = 119865primemod 119862


if 119903 le 119862 minus 120574 minus 1



else



end if

end for r

end if

s = 0



TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

4





List of Tables

Table 41-1 6

Table 41-2 6

Table 42-1 7

Table 42-2 7













Table 5226-2 0











TS V5G212 V12 (2016-06)

5

1 Scope



2 References




non-specific




present document









31 Symbols



32 Abbreviations


5GNB 5G NodeB



TS V5G212 V12 (2016-06)

6















41 Uplink



physical channel

Table 41-1


xUL-SCH xPUSCH

Table 41-2


UCI xPUCCH xPUSCH

TS V5G212 V12 (2016-06)

7

42 Downlink




Table 42-1


xDL-SCH xPDSCH

xBCH xPBCH ePBCH

Table 42-2


DCI xPDCCH








information type

511 CRC calculation




gCRC24A(D) = [D24

+ D23

+ D18

+ D17

+ D14

+ D11

+ D10

+ D7 + D

6 + D

5 + D

4 + D

3 + D + 1] and

gCRC24B(D) = [D24

+ D23

+ D6 + D


gCRC16(D) = [D16

+ D12


gCRC8(D) = [D8 + D

7 + D

4 + D



231

2222

123

024

122

123

0 pDpDpDpDaDaDa AAA



TS V5G212 V12 (2016-06)

8

151

1414

115

016

114

115

0 pDpDpDpDaDaDa AAA


7

1

6

6

1

7

0

8

1

6

1

7

0 pDpDpDpDaDaDa A

AA



ak and bk is










Code Rate Kmax Kmin

56 1620 540

34 1458 486

23 1296 432

12 972 324


code block number




if Ble Kmax


else

TS V5G212 V12 (2016-06)

9


end if



code block number r


if C = 1



else



of Kmin


120574 = 119865primemod 119862


if 119903 le 119862 minus 120574 minus 1



else



end if

end for r

end if

s = 0



TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

5

1 Scope



2 References




non-specific




present document









31 Symbols



32 Abbreviations


5GNB 5G NodeB



TS V5G212 V12 (2016-06)

6















41 Uplink



physical channel

Table 41-1


xUL-SCH xPUSCH

Table 41-2


UCI xPUCCH xPUSCH

TS V5G212 V12 (2016-06)

7

42 Downlink




Table 42-1


xDL-SCH xPDSCH

xBCH xPBCH ePBCH

Table 42-2


DCI xPDCCH








information type

511 CRC calculation




gCRC24A(D) = [D24

+ D23

+ D18

+ D17

+ D14

+ D11

+ D10

+ D7 + D

6 + D

5 + D

4 + D

3 + D + 1] and

gCRC24B(D) = [D24

+ D23

+ D6 + D


gCRC16(D) = [D16

+ D12


gCRC8(D) = [D8 + D

7 + D

4 + D



231

2222

123

024

122

123

0 pDpDpDpDaDaDa AAA



TS V5G212 V12 (2016-06)

8

151

1414

115

016

114

115

0 pDpDpDpDaDaDa AAA


7

1

6

6

1

7

0

8

1

6

1

7

0 pDpDpDpDaDaDa A

AA



ak and bk is










Code Rate Kmax Kmin

56 1620 540

34 1458 486

23 1296 432

12 972 324


code block number




if Ble Kmax


else

TS V5G212 V12 (2016-06)

9


end if



code block number r


if C = 1



else



of Kmin


120574 = 119865primemod 119862


if 119903 le 119862 minus 120574 minus 1



else



end if

end for r

end if

s = 0



TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

6















41 Uplink



physical channel

Table 41-1


xUL-SCH xPUSCH

Table 41-2


UCI xPUCCH xPUSCH

TS V5G212 V12 (2016-06)

7

42 Downlink




Table 42-1


xDL-SCH xPDSCH

xBCH xPBCH ePBCH

Table 42-2


DCI xPDCCH








information type

511 CRC calculation




gCRC24A(D) = [D24

+ D23

+ D18

+ D17

+ D14

+ D11

+ D10

+ D7 + D

6 + D

5 + D

4 + D

3 + D + 1] and

gCRC24B(D) = [D24

+ D23

+ D6 + D


gCRC16(D) = [D16

+ D12


gCRC8(D) = [D8 + D

7 + D

4 + D



231

2222

123

024

122

123

0 pDpDpDpDaDaDa AAA



TS V5G212 V12 (2016-06)

8

151

1414

115

016

114

115

0 pDpDpDpDaDaDa AAA


7

1

6

6

1

7

0

8

1

6

1

7

0 pDpDpDpDaDaDa A

AA



ak and bk is










Code Rate Kmax Kmin

56 1620 540

34 1458 486

23 1296 432

12 972 324


code block number




if Ble Kmax


else

TS V5G212 V12 (2016-06)

9


end if



code block number r


if C = 1



else



of Kmin


120574 = 119865primemod 119862


if 119903 le 119862 minus 120574 minus 1



else



end if

end for r

end if

s = 0



TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

7

42 Downlink




Table 42-1


xDL-SCH xPDSCH

xBCH xPBCH ePBCH

Table 42-2


DCI xPDCCH








information type

511 CRC calculation




gCRC24A(D) = [D24

+ D23

+ D18

+ D17

+ D14

+ D11

+ D10

+ D7 + D

6 + D

5 + D

4 + D

3 + D + 1] and

gCRC24B(D) = [D24

+ D23

+ D6 + D


gCRC16(D) = [D16

+ D12


gCRC8(D) = [D8 + D

7 + D

4 + D



231

2222

123

024

122

123

0 pDpDpDpDaDaDa AAA



TS V5G212 V12 (2016-06)

8

151

1414

115

016

114

115

0 pDpDpDpDaDaDa AAA


7

1

6

6

1

7

0

8

1

6

1

7

0 pDpDpDpDaDaDa A

AA



ak and bk is










Code Rate Kmax Kmin

56 1620 540

34 1458 486

23 1296 432

12 972 324


code block number




if Ble Kmax


else

TS V5G212 V12 (2016-06)

9


end if



code block number r


if C = 1



else



of Kmin


120574 = 119865primemod 119862


if 119903 le 119862 minus 120574 minus 1



else



end if

end for r

end if

s = 0



TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

8

151

1414

115

016

114

115

0 pDpDpDpDaDaDa AAA


7

1

6

6

1

7

0

8

1

6

1

7

0 pDpDpDpDaDaDa A

AA



ak and bk is










Code Rate Kmax Kmin

56 1620 540

34 1458 486

23 1296 432

12 972 324


code block number




if Ble Kmax


else

TS V5G212 V12 (2016-06)

9


end if



code block number r


if C = 1



else



of Kmin


120574 = 119865primemod 119862


if 119903 le 119862 minus 120574 minus 1



else



end if

end for r

end if

s = 0



TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

9


end if



code block number r


if C = 1



else



of Kmin


120574 = 119865primemod 119862


if 119903 le 119862 minus 120574 minus 1



else



end if

end for r

end if

s = 0



TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

10

srk bc

1 ss

end for k



crk = ltNULLgt

end for k

end for r





is

Z = 6144


block




if ZB

L = 0


BB

else

L = 24


LCBB

end if

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

11





if 1C


else if 1C


KKK


K

BKCC


end if



NULLc k0

end for

k = F

s = 0

for r = 0 to C-1

if Cr

KK r

else

KK r

end if

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

12

while LKk r

srk bc

1 kk

1 ss

end while

if C gt1




while rKk

)( rKLkrrk pc

1 kk

end while

end if

0k

end for

513 Channel coding



)(3

)(2

)(1

)(0

iD

iiiiddddd

for






LDPC coding

Turbo coding





TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

13







Variable 13 xDL-SCH


13




13


13








iKi cs 1

D D D DD D

G0 = 133 (octal)

G1 = 171 (octal)

G2 = 165 (octal)

kc

)0(kd

)1(kd

)2(kd


TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

14


kd )1(

kd and )2(



5132 LDPC coding





bits stream


119867 =

[

11987511988600 11987511988601 11987511988602

11987511988610 11987511988611 11987511988612

11987511988620 11987511988621 11987511988622

⋯119875

1198860119873119897119889119901119888_119887minus2 1198751198860119873119897119889119901119888_119887minus1

1198751198861119873119897119889119901119888_119887minus2 119875

1198861119873119897119889119901119888_119887minus1

1198751198862119873119897119889119901119888_119887minus2 119875

1198862119873119897119889119901119888_119887minus1

⋮ ⋱ ⋮

119875119886119873119901119886119903119894119905119910_119887minus10 119875

119886119873119901119886119903119894119905119910_119887minus11 119875119886119873119901119886119903119894119905119910_119887minus12 ⋯ 119875










56 24 20 4

34 24 18 6

23 24 16 8

12 24 12 12





(a) D = 648 bits Z = 27 bits

17 13 8 21 9 3 18 12 10 0 4 15 19

2 5 10 26 19 13 13 1 0 -1 -1

3 12 11 14 11 25 5 18 0 9 2 26 26

10 24 7 14 20 4 2 -1 0 0 -1

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

15

22 16 4 3 10 21 12 5 21 14 19 5 -1

8 5 18 11 5 5 15 0 -1 0 0

7 7 14 14 4 16 16 24 24 10 1 7 15

6 10 26 8 18 21 14 1 -1 -1 0

(b) D = 1296 bits Z = 54 bits

48 29 37 52 2 16 6 14 53 31 34 5 18

42 53 31 45 -1 46 52 1 0 -1 -1

17 4 30 7 43 11 24 6 14 21 6 39 17

40 47 7 15 41 19 -1 -1 0 0 -1

7 2 51 31 46 23 16 11 53 40 10 7 46

53 33 35 -1 25 35 38 0 -1 0 0

19 48 41 1 10 7 36 47 5 29 52 52 31

10 26 6 3 2 -1 51 1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

13 48 80 66 4 74 7 30 76 52 37 60 -1

49 73 31 74 73 23 -1 1 0 -1 -1

69 63 74 56 64 77 57 65 6 16 51 -1 64

-1 68 9 48 62 54 27 -1 0 0 -1

51 15 0 80 24 25 42 54 44 71 71 9 67

35 -1 58 -1 29 -1 53 0 -1 0 0

16 29 36 41 44 56 59 37 50 24 -1 65 4

65 52 -1 4 -1 73 52 1 -1 -1 0


(a) D = 648 bits Z = 27 bits

16 17 22 24 9 3 14 -1 4 2 7 -1 26

-1 2 -1 21 -1 1 0 -1 -1 -1 -1

25 12 12 3 3 26 6 21 -1 15 22 -1 15

-1 4 -1 -1 16 -1 0 0 -1 -1 -1

25 18 26 16 22 23 9 -1 0 -1 4 -1 4

-1 8 23 11 -1 -1 -1 0 0 -1 -1

9 7 0 1 17 -1 -1 7 3 -1 3 23 -1

16 -1 -1 21 -1 0 -1 -1 0 0 -1

24 5 26 7 1 -1 -1 15 24 15 -1 8 -1

13 -1 13 -1 11 -1 -1 -1 -1 0 0

2 2 19 14 24 1 15 19 -1 21 -1 2 -1

24 -1 3 -1 2 1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 40 51 41 3 29 8 36 -1 14 -1 6 -1

33 -1 11 -1 4 1 0 -1 -1 -1 -1

48 21 47 9 48 35 51 -1 38 -1 28 -1 34

-1 50 -1 50 -1 -1 0 0 -1 -1 -1

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

16

30 39 28 42 50 39 5 17 -1 6 -1 18 -1

20 -1 15 -1 40 -1 -1 0 0 -1 -1

29 0 1 43 36 30 47 -1 49 -1 47 -1 3

-1 35 -1 34 -1 0 -1 -1 0 0 -1

1 32 11 23 10 44 12 7 -1 48 -1 4 -1

9 -1 17 -1 16 -1 -1 -1 -1 0 0

13 7 15 47 23 16 47 -1 43 -1 29 -1 52

-1 2 -1 53 -1 1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

48 29 28 39 9 61 -1 -1 -1 63 45 80 -1

-1 -1 37 32 22 1 0 -1 -1 -1 -1

4 49 42 48 11 30 -1 -1 -1 49 17 41 37

15 -1 54 -1 -1 -1 0 0 -1 -1 -1

35 76 78 51 37 35 21 -1 17 64 -1 -1 -1

59 7 -1 -1 32 -1 -1 0 0 -1 -1

9 65 44 9 54 56 73 34 42 -1 -1 -1 35

-1 -1 -1 46 39 0 -1 -1 0 0 -1

3 62 7 80 68 26 -1 80 55 -1 36 -1 26

-1 9 -1 72 -1 -1 -1 -1 -1 0 0

26 75 33 21 69 59 3 38 -1 -1 -1 35 -1

62 36 26 -1 -1 1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

25 26 14 -1 20 -1 2 -1 4 -1 -1 8 -1

16 -1 18 1 0 -1 -1 -1 -1 -1 -1

10 9 15 11 -1 0 -1 1 -1 -1 18 -1 8

-1 10 -1 -1 0 0 -1 -1 -1 -1 -1

16 2 20 26 21 -1 6 -1 1 26 -1 7 -1

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

10 13 5 0 -1 3 -1 7 -1 -1 26 -1 -1

13 -1 16 -1 -1 -1 0 0 -1 -1 -1

23 14 24 -1 12 -1 19 -1 17 -1 -1 -1 20

-1 21 -1 0 -1 -1 -1 0 0 -1 -1

6 22 9 20 -1 25 -1 17 -1 8 -1 14 -1

18 -1 -1 -1 -1 -1 -1 -1 0 0 -1

14 23 21 11 20 -1 24 -1 18 -1 19 -1 -1

-1 -1 22 -1 -1 -1 -1 -1 -1 0 0

17 11 11 20 -1 21 -1 26 -1 3 -1 -1 18

-1 26 -1 1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

39 31 22 43 -1 40 4 -1 11 -1 -1 50 -1

-1 -1 6 1 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

17

25 52 41 2 6 -1 14 -1 34 -1 -1 -1 24

-1 37 -1 -1 0 0 -1 -1 -1 -1 -1

43 31 29 0 21 -1 28 -1 -1 2 -1 -1 7

-1 17 -1 -1 -1 0 0 -1 -1 -1 -1

20 33 48 -1 4 13 -1 26 -1 -1 22 -1 -1

46 42 -1 -1 -1 -1 0 0 -1 -1 -1

45 7 18 51 12 25 -1 -1 -1 50 -1 -1 5

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

35 40 32 16 5 -1 -1 18 -1 -1 43 51 -1

32 -1 -1 -1 -1 -1 -1 -1 0 0 -1

9 24 13 22 28 -1 -1 37 -1 -1 25 -1 -1

52 -1 13 -1 -1 -1 -1 -1 -1 0 0

32 22 4 21 16 -1 -1 -1 27 28 -1 38 -1

-1 -1 8 1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

61 75 4 63 56 -1 -1 -1 -1 -1 -1 8 -1

2 17 25 1 0 -1 -1 -1 -1 -1 -1

56 74 77 20 -1 -1 -1 64 24 4 67 -1 7

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

28 21 68 10 7 14 65 -1 -1 -1 23 -1 -1

-1 75 -1 -1 -1 0 0 -1 -1 -1 -1

48 38 43 78 76 -1 -1 -1 -1 5 36 -1 15

72 -1 -1 -1 -1 -1 0 0 -1 -1 -1

40 2 53 25 -1 52 62 -1 20 -1 -1 44 -1

-1 -1 -1 0 -1 -1 -1 0 0 -1 -1

69 23 64 10 22 -1 21 -1 -1 -1 -1 -1 68

23 29 -1 -1 -1 -1 -1 -1 0 0 -1

12 0 68 20 55 61 -1 40 -1 -1 -1 52 -1

-1 -1 44 -1 -1 -1 -1 -1 -1 0 0

58 8 34 64 78 -1 -1 11 78 24 -1 -1 -1

-1 -1 58 1 -1 -1 -1 -1 -1 -1 0


(a) D = 648 bits Z = 27 bits

0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

22 0 -1 -1 17 -1 0 0 12 -1 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

6 -1 0 -1 10 -1 -1 -1 24 -1 0 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

2 -1 -1 0 20 -1 -1 -1 25 0 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

23 -1 -1 -1 3 -1 -1 -1 0 -1 9 11 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

18

24 -1 23 1 17 -1 3 -1 10 -1 -1 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

25 -1 -1 -1 8 -1 -1 -1 7 18 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

13 24 -1 -1 0 -1 8 -1 6 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

7 20 -1 16 22 10 -1 -1 23 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

11 -1 -1 -1 19 -1 -1 -1 13 -1 3 17 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

25 -1 8 -1 23 18 -1 14 9 -1 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

3 -1 -1 -1 16 -1 -1 2 25 5 -1 -1 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (b) D = 1296 bits Z = 54 bits

40 -1 -1 -1 22 -1 49 23 43 -1 -1 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

50 1 -1 -1 48 35 -1 -1 13 -1 30 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

39 50 -1 -1 4 -1 2 -1 -1 -1 -1 49 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

33 -1 -1 38 37 -1 -1 4 1 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

45 -1 -1 -1 0 22 -1 -1 20 42 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

51 -1 -1 48 35 -1 -1 -1 44 -1 18 -1 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

47 11 -1 -1 -1 17 -1 -1 51 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

5 -1 25 -1 6 -1 45 -1 13 40 -1 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

33 -1 -1 34 24 -1 -1 -1 23 -1 -1 46 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

1 -1 27 -1 1 -1 -1 -1 38 -1 44 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

-1 18 -1 -1 23 -1 -1 8 0 35 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

49 -1 17 -1 30 -1 -1 -1 34 -1 -1 19 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 (c) D = 1944 bits Z = 81 bits

57 -1 -1 -1 50 -1 11 -1 50 -1 79 -1 1

0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

3 -1 28 -1 0 -1 -1 -1 55 7 -1 -1 -1

0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

19

30 -1 -1 -1 24 37 -1 -1 56 14 -1 -1 -1

-1 0 0 -1 -1 -1 -1 -1 -1 -1 -1

62 53 -1 -1 53 -1 -1 3 35 -1 -1 -1 -1

-1 -1 0 0 -1 -1 -1 -1 -1 -1 -1

40 -1 -1 20 66 -1 -1 22 28 -1 -1 -1 -1

-1 -1 -1 0 0 -1 -1 -1 -1 -1 -1

0 -1 -1 -1 8 -1 42 -1 50 -1 -1 8 -1

-1 -1 -1 -1 0 0 -1 -1 -1 -1 -1

69 79 79 -1 -1 -1 56 -1 52 -1 -1 -1 0

-1 -1 -1 -1 -1 0 0 -1 -1 -1 -1

65 -1 -1 -1 38 57 -1 -1 72 -1 27 -1 -1

-1 -1 -1 -1 -1 -1 0 0 -1 -1 -1

64 -1 -1 -1 14 52 -1 -1 30 -1 -1 32 -1

-1 -1 -1 -1 -1 -1 -1 0 0 -1 -1

-1 45 -1 70 0 -1 -1 -1 77 9 -1 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 0 0 -1

2 56 -1 57 35 -1 -1 -1 -1 -1 12 -1 -1

-1 -1 -1 -1 -1 -1 -1 -1 -1 0 0

24 -1 61 -1 60 -1 -1 27 51 -1 -1 16 1

-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0

5133 Turbo coding

51331 Turbo encoder





G(D) =

where

g0(D) = 1 + D2 + D

3

g1(D) = 1 + D + D3




kk xd )0(

)(

)(1

0

1

Dg

Dg

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

20

kk zd )1(

kk zd )2(

for 1210 Kk








DD D

DD D

Input

Turbo code internal

interleaverOutput

Output



kc

kc

kx

kx

kz

kz










KK xd )0(

1)0(1 KK zd KK xd

)0(2

1)0(3

KK zd

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

21

KK zd )1(

2)1(

1 KK xd KK zd )1(

2 2)1(

3 KK xd

1)2(

KK xd 2)2(1 KK zd 1

)2(2

KK xd 2)2(3

KK zd







quadratic form

Kififi mod)( 221




1 40 3 10 48 416 25 52 95 1120 67 140 142 3200 111 240

2 48 7 12 49 424 51 106 96 1152 35 72 143 3264 443 204

3 56 19 42 50 432 47 72 97 1184 19 74 144 3328 51 104

4 64 7 16 51 440 91 110 98 1216 39 76 145 3392 51 212

5 72 7 18 52 448 29 168 99 1248 19 78 146 3456 451 192

6 80 11 20 53 456 29 114 100 1280 199 240 147 3520 257 220

7 88 5 22 54 464 247 58 101 1312 21 82 148 3584 57 336

8 96 11 24 55 472 29 118 102 1344 211 252 149 3648 313 228

9 104 7 26 56 480 89 180 103 1376 21 86 150 3712 271 232

10 112 41 84 57 488 91 122 104 1408 43 88 151 3776 179 236

11 120 103 90 58 496 157 62 105 1440 149 60 152 3840 331 120

12 128 15 32 59 504 55 84 106 1472 45 92 153 3904 363 244

13 136 9 34 60 512 31 64 107 1504 49 846 154 3968 375 248

14 144 17 108 61 528 17 66 108 1536 71 48 155 4032 127 168

15 152 9 38 62 544 35 68 109 1568 13 28 156 4096 31 64

16 160 21 120 63 560 227 420 110 1600 17 80 157 4160 33 130

17 168 101 84 64 576 65 96 111 1632 25 102 158 4224 43 264

18 176 21 44 65 592 19 74 112 1664 183 104 159 4288 33 134

19 184 57 46 66 608 37 76 113 1696 55 954 160 4352 477 408

20 192 23 48 67 624 41 234 114 1728 127 96 161 4416 35 138

21 200 13 50 68 640 39 80 115 1760 27 110 162 4480 233 280

22 208 27 52 69 656 185 82 116 1792 29 112 163 4544 357 142

23 216 11 36 70 672 43 252 117 1824 29 114 164 4608 337 480

24 224 27 56 71 688 21 86 118 1856 57 116 165 4672 37 146

25 232 85 58 72 704 155 44 119 1888 45 354 166 4736 71 444

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

22

26 240 29 60 73 720 79 120 120 1920 31 120 167 4800 71 120

27 248 33 62 74 736 139 92 121 1952 59 610 168 4864 37 152

28 256 15 32 75 752 23 94 122 1984 185 124 169 4928 39 462

29 264 17 198 76 768 217 48 123 2016 113 420 170 4992 127 234

30 272 33 68 77 784 25 98 124 2048 31 64 171 5056 39 158

31 280 103 210 78 800 17 80 125 2112 17 66 172 5120 39 80

32 288 19 36 79 816 127 102 126 2176 171 136 173 5184 31 96

33 296 19 74 80 832 25 52 127 2240 209 420 174 5248 113 902

34 304 37 76 81 848 239 106 128 2304 253 216 175 5312 41 166

35 312 19 78 82 864 17 48 129 2368 367 444 176 5376 251 336

36 320 21 120 83 880 137 110 130 2432 265 456 177 5440 43 170

37 328 21 82 84 896 215 112 131 2496 181 468 178 5504 21 86

38 336 115 84 85 912 29 114 132 2560 39 80 179 5568 43 174

39 344 193 86 86 928 15 58 133 2624 27 164 180 5632 45 176

40 352 21 44 87 944 147 118 134 2688 127 504 181 5696 45 178

41 360 133 90 88 960 29 60 135 2752 143 172 182 5760 161 120

42 368 81 46 89 976 59 122 136 2816 43 88 183 5824 89 182

43 376 45 94 90 992 65 124 137 2880 29 300 184 5888 323 184

44 384 23 48 91 1008 55 84 138 2944 45 92 185 5952 47 186

45 392 243 98 92 1024 31 64 139 3008 157 188 186 6016 23 94

46 400 151 40 93 1056 17 66 140 3072 47 96 187 6080 47 190

47 408 155 102 94 1088 171 204 141 3136 13 28 188 6144 263 480

514 Rate matching










if 119903 lt 120574


else


end if

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

23

Set 00 k

Set k = 0 and j = 0

while k lt E


119890119896 = 119889(1198960+119895) mod 119863

k = k +1

end if

j = j +1

end while




kd )1(

kd and )2(




Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw


The bit stream )0(



1

)0(2

)0(1

)0(0


The bit stream )1(



1

)1(2

)1(1

)1(0

Kvvvv

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

24

The bit stream )2(



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






CCsubblockR such

that

CCsubblock

CCsubblock CRD








into the CCsubblock


)1(2)1(1)1()1(

1221

1210

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


jP that is




CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

25


permuted CCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to CCsubblockCP

y)0(


CCsubblock CRK





32 lt 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 gt




)1(kkK vw

for k = 0hellip 1K

)2(2 kkK vw

for k = 0hellip 1K


01 1E

Set k = 0 and j = 0

while k lt E

if NULLwwKj mod

wKjk we mod

k = k +1

end if

j = j +1

end while





TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

26



Sub-block

interleaver

Sub-block

interleaver

Sub-block

interleaver

Bit

collection

virtual circular

buffer

Bit selection

and pruning

)0(kd

)1(kd

)2(kd

ke

)0(kv

)1(kv

)2(kv

kw




1

)0(2

)0(1

)0(0




1

)1(2

)1(1

)1(0

Kvvvv



1

)2(2

)2(1

)2(0

Kvvvv




)(2

)(1

)(0

iD






subblockR such that

TCsubblock

TCsubblock CRD


TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

27

If DCR TCsubblock





the TCsubblock


)1(2)1(1)1()1(

1221

1210

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy

For )0(kd and )1(

kd


jP that is




TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

TCsubblock

CRCPCRPCRPCRP

CCPCPCPCP

CPPPP

yyyy

yyyy

yyyy

)1()1()1()2()1()1()1()0(

)1()2()1()0(

)1()2()1()0(


permuted TCsubblock


)(

1

)(2

)(1

)(0

i

K

iiivvvv

where )(

0i


v to TCsubblockCP

y)0(


TCsubblock CRK

For )2(kd


1

)2(2

)2(1

)2(0

Kvvvv where )(

)2(kk yv and where

KRkC

R

kPk TC


subblock

mod1mod)(






32 lt 0 16 8 24 4 20 12 28 2 18 10 26 6 22 14 30 1 17 9 25 5 21 13 29 3 19 11 27 7 23 15 31 gt




TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

28

)1(2 kkK vw

for k = 0hellip 1K

)2(12 kkK vw

for k = 0hellip 1K



section 512

-

w

IRcb K

C





NN

C

soft

IR

where











- NL is equal to 2

- Otherwise



if 1 Cr

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

29

set CGQNE mL

else

set CGQNE mL

end if

Set

2

820 idxTC

subblock

cbTCsubblock rv

R

NRk where

TCsubblockR


51411

Set k = 0 and j = 0

while k lt E


cbNjkk we mod)( 0

k = k +1

end if

j = j +1

end while




for 10 Gk



Set 0k and 0r

while Cr

Set 0j

while rEj

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

30

rjk ef

1 kk

1 jj

end while

1 rr

end while




according to [2]






Rate matching



Channel interleaver



TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

31


(CRC attachment)

Channel coding


1B10 bbb

Rate matching



1A10 aaa

)1( Krrr1r0 ccc

)1( Drrr1r0 ddd

)1( Errr1r0 eee

1G10 fff


1H10ggg

ChannelCoding [FFS]

ChannelCoding [FFS]

ChannelCoding [FFS]

][ )1( O10 ooo

1 CQIL QN10 qqq

][110

RI

O

RIRIRIooo

][110

ACK

O

ACKACKACKooo

RI

Q

RI

1

RI

0 RI

qqq1

ACK

Q

ACK

1

ACK

0 ACK

qqq1

1 RIL QNH10 hhh










TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

32














1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd



5224 Rate matching

















TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

33




done independently




1

0

min



sc symbC

rr

O M NQ M N

K

where


xPUSCH




xPUSCH



counted

xPUSCH-initial














Qm Encoded RI

2 y] [ 0

RIo

4 y x x] [ 0

RIo

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

34

6 ]y x x x x [ 0

RIo

Table 5226-2 0

RIo to RI mapping

0

RIo RI

0 1

1 2




RI

RI RI RI RI

Qq q q q is



RIQ




RI

RI RI RI

Qq q q

where RI

iq


obtained as follows

Set i j k to 0

while RIQi

] [ˆ1

RIQi

RIi

RI


T

N

RI

k

RI

k

RI

k

L

qqq ]ˆˆ[



mQii

1 kk

end while



CQIPMIBSIBRI)



TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

35

1

0

( )min



mr

r

O L M N QQ M N

QK

where



otherwise8

110 OL and

CQI m

Q QQ and xPUSCH CQI





xPUSCH initial

symbN

xPUSCH initial




from






xPUSCH



xPUSCH



on are not counted








operation




mapped onto

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

36





Field Bit width


Wideband CQI 4 4 4








Field Bit width

Beam index 9N

Wide-band BRSRP 7N




Field Bit width

BRRS-RI 3N













TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

37






0 1 1 0 0 0 0 0 0 0 0 1

1 1 1 1 0 0 0 0 0 0 1 1

2 1 0 0 1 0 0 1 0 1 1 1

3 1 0 1 1 0 0 0 0 1 0 1

4 1 1 1 1 0 0 0 1 0 0 1

5 1 1 0 0 1 0 1 1 1 0 1

6 1 0 1 0 1 0 1 0 1 1 1

7 1 0 0 1 1 0 0 1 1 0 1

8 1 1 0 1 1 0 0 1 0 1 1

9 1 0 1 1 1 0 1 0 0 1 1

10 1 0 1 0 0 1 1 1 0 1 1

11 1 1 1 0 0 1 1 0 1 0 1

12 1 0 0 1 0 1 0 1 1 1 1

13 1 1 0 1 0 1 0 1 0 1 1

14 1 0 0 0 1 1 0 1 0 0 1

15 1 1 0 0 1 1 1 1 0 1 1

16 1 1 1 0 1 1 1 0 0 1 0

17 1 0 0 1 1 1 0 0 1 0 0

18 1 1 0 1 1 1 1 1 0 0 0

19 1 0 0 0 0 1 1 0 0 0 0

20 1 0 1 0 0 0 1 0 0 0 1

21 1 1 0 1 0 0 0 0 0 1 1

22 1 0 0 0 1 0 0 1 1 0 1

23 1 1 1 0 1 0 0 0 1 1 1

24 1 1 1 1 1 0 1 1 1 1 0

25 1 1 0 0 0 1 1 1 0 0 1

26 1 0 1 1 0 1 0 0 1 1 0

27 1 1 1 1 0 1 0 1 1 1 0

28 1 0 1 0 1 1 1 0 1 0 0

29 1 0 1 1 1 1 1 1 1 0 0

30 1 1 1 1 1 1 1 1 1 1 1

31 1 0 0 0 0 0 0 0 0 0 0


1

0

2modO

n





TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

38









13210


ig 10 Hi





as follows

Set i j k to 0


TQNjjk mL

qqg ] [1

mL QNjj

1 kk

end while


TNQiik Lm

ffg ] [ 1

Lm NQii

1 kk

end while





TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

39


H

gggg ACK

Q

ACKACKACK

ACK

qqqq1210

andRI

Q

RIRIRI

RIqqqq

1210






Lmmuxmux NQRR


)1(2)1(1)1()1(

1221

1210


muxmuxmuxmux

mux

CRCRCRCR

CCCC

C

yyyy

yyyy

yyyy


RI

RI RI RI RI

Qq q q q

is


y in


Set i to 0

while i lt RIQ

RI

i iy q

1 ii

end while


1210


Set i to 0

while i ltCQIQ

RIi Q i

y g

1 ii

end while


121

HQQQgggg

CQICQICQI


vector 0


TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

40







BRI)




110 Aaaa

110 Bbbb

Channel coding









to section 111 [3]





NAN


downlink subframes

Define DL





TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

41


while l lt DL

cB


k = k + 1

l = l+1

end while


0 1 2 1

A NNa a a a


xPUCCH format 2

1

0

mod 2A NN

i n i nn

b a M



31210

~

~

~

~bbbb

32mod

~ii bb


sc8B N








coding







Field Bit width


TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

42












52342




channel coding



report


Field Bit width

BRS index 9

Wide-band BRSRP 7







report


TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

43

Field Bit width

BRRS index 3

Wide-band BRRS-RP 7















identified



Channel interleaver






min



symb sc

CQI MIN

O M NQ N M

O



scM is the





TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

44




to [3]




to [3]




according to [3]







RI

RI RI RI RI

Qq q q q




Hg g g g g

where


g 0 1i H


information


Set j k to 0

while CQIj Q

TQjjk m

qqg ] [ 1

mQjj

1 kk

end while



Hg g g g

and

0 1 2 1

RI

RI RI RI RI

Qq q q q



TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

45







Channel coding

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd












TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

46





1510 antantant xxx

1 lt0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0gt

2 lt1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1gt

4 lt0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1gt

8 lt1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0gt

5312 Channel coding




)(3

)(2

)(1

)(0

iD



5313 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD









Channel coding

Rate matching


TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

47

CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

110 Eeee

)(1

)(1

)(0

iD

iiddd










L to 16 bits




5131


)(3

)(2

)(1

)(0

iD



531A3 Rate matching


denoted by)(1

)(3

)(2

)(1

)(0

iD



TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

48







block of a DL cell



Channel coding

Rate matching




TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

49

Channel coding

Rate matching

Code block

concatenation

110 Aaaa

110 Bbbb

110 rKrrr ccc

110 rDrrr ddd

110 rErrr eee

110 Gfff

Transport block

CRC attachment















TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

50



5323 Channel coding




section 5132




1

)(3

)(2

)(1

)(0

i

Dr

ir

ir

ir

ir r

ddddd

with 2 and 10i and


5324 Rate matching



















CRC attachment

Channel coding

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

51

Rate matching


CRC attachment

Channel coding

Rate matching

110 Aaaa

110 Kccc

)(1

)(1

)(0

iD

iiddd

110 Eeee


5331 DCI formats







53311 Format A1






lisin0 1 hellip 7

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

52










- MCS ndash 4 bits

- NDI ndash 1 bit












TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

53

























LSB 1 bit

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

54


















Value Message

0 1 Layer port 40

1 1 Layer port 41

2 1 Layer port 42

3 1 Layer port 43



6 7 Reserved

53312 Format A2



TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

55



53313 Format B1











- MCS ndash 4 bits

- NDI ndash 1 bit









TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

56
























TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

57








LSB 1 bit














Value Message







TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

58





10-15 Reserved

53314 Format B2






5332 CRC attachment




of parity bits








5333 Channel coding




)(3

)(2

)(1

)(0

iD

iiiiddddd



TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

TS V5G212 V12 (2016-06)

59

5334 Rate matching


denoted by )(1

)(3

)(2

)(1

)(0

iD

iiiiddddd




bits

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Verizon 5G TF; Air Interface Working Group; Verizon 5th ...5gtf.net/V5G_212_v1p2.pdf · TS V5G.212...

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