of 37
8/2/2019 vlsi unit8
1/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Chapter 8
CMOS Testing
8/2/2019 vlsi unit8
2/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
functionality tests or logic verification
second set of tests is run on the first batch of chips
manufacturing tests
Testing a die (chip) can occur at the
Wafer level
Packaged chip level
Board level
System level
Field level
8/2/2019 vlsi unit8
3/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Logic Verification
8/2/2019 vlsi unit8
4/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Manufacturing Tests
Typical defects include:
Layer-to-layer shorts (e.g., metal-to-metal)
Discontinuous wires (e.g., metal thins when crossing verticaltopology jumps)
Missing or damaged vias Shorts through the thin gate oxide to the substrate or well
These in turn lead to particular circuit maladies, including:
Nodes shorted to power or ground
Nodes shorted to each other
Inputs floating/outputs disconnected
8/2/2019 vlsi unit8
5/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Manufacturing Test Principles:
8/2/2019 vlsi unit8
6/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Stuck-at Faults
Short-circuit and Open-circuit Faults
Fault Models
8/2/2019 vlsi unit8
7/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Stuck-at Faults
8/2/2019 vlsi unit8
8/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Short-circuit Faults
8/2/2019 vlsi unit8
9/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Open-circuit Faults
8/2/2019 vlsi unit8
10/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Observability
Controllability
Fault Coverage Automatic Test Pattern Generation
(ATPG)
8/2/2019 vlsi unit8
11/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Delay Fault Testing
8/2/2019 vlsi unit8
12/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Design for Testability
Adhoc testing
Scan-based approaches
Built-in self-test (BIST)
8/2/2019 vlsi unit8
13/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Partitioning large sequential circuits
Adding test points
Adding multiplexers Providing for easy state reset
Adhoc testing
8/2/2019 vlsi unit8
14/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Scan Design:
8/2/2019 vlsi unit8
15/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Parallel Scan:
8/2/2019 vlsi unit8
16/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Partial Scan:
8/2/2019 vlsi unit8
17/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Shift Register Latch
8/2/2019 vlsi unit8
18/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Circuit Design of Scannable Elements:
8/2/2019 vlsi unit8
19/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
8/2/2019 vlsi unit8
20/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
8/2/2019 vlsi unit8
21/37McGraw-Hill The McGraw-Hill Companies, Inc., 2004
8/2/2019 vlsi unit8
22/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Built-in Self-Test (BIST)
8/2/2019 vlsi unit8
23/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Built-in Self-Test (BIST):Pseudo random sequence generator:
LFSR(Linear Feedback Shift Register)CFSR(Complete Feedback Shift Register)
8/2/2019 vlsi unit8
24/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
8/2/2019 vlsi unit8
25/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
BILBO
8/2/2019 vlsi unit8
26/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
IDDQ Testing
8/2/2019 vlsi unit8
27/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Design for Manufacturability
Increase the spacing between wires wherepossible
Increase the number of vias at wireintersections beyond one if possible
8/2/2019 vlsi unit8
28/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Redundancy
Power
Process Spread Yield Analysis
8/2/2019 vlsi unit8
29/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Boundary Scan
8/2/2019 vlsi unit8
30/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
The Test Access Port (TAP)
8/2/2019 vlsi unit8
31/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
The TAP Controller
8/2/2019 vlsi unit8
32/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Instruction Register
8/2/2019 vlsi unit8
33/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Test Data Registers
8/2/2019 vlsi unit8
34/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Boundary Scan Register
8/2/2019 vlsi unit8
35/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
8/2/2019 vlsi unit8
36/37
McGraw-Hill The McGraw-Hill Companies, Inc., 2004
Bypass Register
8/2/2019 vlsi unit8
37/37
TDO Driver