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VSIPL Forum
VSIPL Design Principles
James LebakMassachusetts Institute of Technology
Lincoln Laboratory
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VSIPL Forum
Outline
VSIPL is an API that is…• Portable• Object-based• For signal and image processing applications• On embedded platforms
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VSIPL Forum
VSIPL Portability Goals
• Enable source-code portability between platforms– Require only a simple re-compile of application
• Achieve portability by use of a standard API– ANSI C API– Agreed to and maintained by the VSIPL forum– Forum membership consists of both users and implementors– Test suite to verify conformance to API
• Maintain performance– API must not restrict ability of implementations to optimize
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VSIPL Forum
Achieving Portability
• VSIPL gives good portability for the computationportion of applications
• Multiple implementations exist– Vendor-optimized for specific platforms– Third-party optimized for single-board G4 systems– TASP reference implementation for general workstation
use
• Implementations exist with very little performancepenalty
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VSIPL Forum
Outline
VSIPL is an API that is…• Portable• Object-based• For signal and image processing applications• On embedded platforms
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VSIPL Forum
Object-Based Libraries
• Traditional libraries are functional– e.g. BLAS (Basic Linear Algebra Subroutines, FORTRAN
scientific library)
• VSIPL is object-based– Application uses VSIPL abstract data types– Implementation of these data types is hidden to allow
vendor-private optimizations– Primary abstract data types are blocks and views
saxpy( n, alpha, x, incx, y, incy)
Length
y=αx+y
vsip_vadd_f(x, y, y)
Stride
Views of Data(Include data arrays, lengths, strides)
DataArray
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VSIPL Forum
Blocks and Views
• Blocks and views are the primary VSIPL abstract data types– A block is a contiguous storage area– Data in a block may be viewed as a vector, matrix, or 3-tensor– Calculations are performed using views
• View characteristics:– Offset from start of block– Length (number of elements in view)– Stride (spacing between elements in view)
1 2 3 4 5 6 7 8 9
Example data in a block
1 2 3 4 5 6 7 8 9
View of entire block as a vector
(offset 0, length 9, stride 1)
View of even-numbered elements
(offset 1, length 4, stride 2)
View of block as 3 by 3 matrix
(offset 0, row length 3, row stride 1,
column length 3, column stride 3)
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 91 2 34 5 67 8 9
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VSIPL Forum
Outline
VSIPL is an API that is…• Portable• Object-based• For signal and image processing applications• On embedded platforms
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VSIPL Forum
VSIPL Functionality
VSIPL contains a wide range of functions including:
Linear Algebra• Inner, Outer, Kronecker product• Matrix-Vector, Matrix-Matrix Multiply• QR, LU, Cholesky, Singular Value
Decompositions• Solvers based on above
Signal Processing• FFT
–1D, 2D, 3D–Multiple 1D– In-place and
out-of-place–Real-to-complex and
complex-to-real• Convolution (1D, 2D)• Correlation (1D, 2D)• FIR/IIR Filters• Window functions
Vector/Matrix Elementwise Ops• Arithmetic (+,-,*,/)• Comparison operations (<,>,=)• Selection operations
– Min, max
• Boolean operations– AND, OR, NOT
• Data conversion
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VSIPL Forum
Supported Data Types
Boolean, integer, floating-point, and index types• Implementations must support at least one integer and
one floating-point type
Complex integer and floating-point data• Input data may be stored split or interleaved• Implementation allowed to choose preferred order for VSIPL
space (must support import of data in either order)
Standard defines portable precision specifiers for user-defined typesFloat
At least n decimal digits of accuracy
Integer
Exactly n bitsAt least n bitsFastest type of at least n bits
Real PartImaginary Part
Split InterleavedInput data layout examples
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VSIPL Forum
Object-Based Linear Algebra
• Algorithm setup is done before inner loop calls• Implementation is free to choose algorithm
– Gram-Schmidt or Householder method could be used– Choice can be made by create call
qrdObject = vsip_qrd_create_f(M, N, VSIP_QRD_SAVEQ);...vsip_qrd_f(qrdObject, A);vsip_qrd_prodq_f(qrdObject, VSIP_MAT_HERM, VSIP_MAT_LSIDE, w);
Allocate memory;
setup to use Q later
A=QR
w = QHw
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VSIPL Forum
Core LiteProfile
Core Profile
VSIPL Profiles
• VSIPL Profiles provide functionality for specific areas– Core lite targeted at vector signal processing– Core targeted at adaptive signal processing
Functionality
float, complex, signed int typesFFT, FIR Filters
Vector arithmeticMatrix arithmeticRandom numbers
ConvolutionCorrelation
Matrix decomposition and solvers
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VSIPL Forum
Outline
VSIPL is an API that is…• Portable• Object-based• For signal and image processing applications• On embedded platforms
– Early binding– Separate memory spaces– Separate development and performance modes
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VSIPL Forum
Early Binding
Principle of Early Binding: Allocate resources for anoperation as early as possible for better performance
Examples:• FFT
• Object and data memory allocation
Setup phaseCalculate coefficients and
store in FFT object
Calculation phaseCalculate the FFT using
stored coefficients
Setup phaseAllocate block and views
and bind to data
Calculation phaseOperate on data
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VSIPL Forum
VSIPL Data Spaces
• User manipulates data using– Direct access– I/O functions– Other math libraries– Communication libraries
(e.g. MPI, MPI/RT)
• VSIPL will not operate ondata in user space
User Data Space
• User manipulates data usingVSIPL functions (only)
• Memory hierarchy detailshidden
• Implementation mayoptimize memory use
– Chaining– Deferred execution– Strip-mining
VSIPL Data Space
VSIPL has two logical memory spaces
These logical spaces may be the
same physical address space,
depending on the implementation
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VSIPL Forum
Example VSIPL Implementations
Real Part
Imaginary Part
User Space
(interleaved complex)
VSIPL Space
(split complex)
User Space
(DRAM)
VSIPL Space
(SRAM)
User Space
=VSIPL Space• Workstation
– No special memorymanagement needed
• Digital Signal Processor– e.g. SHARC– User space is in DRAM– Library may manage
movement of data throughSRAM
• Vector Processor– e.g. Altivec– User can store data in either
complex format– Library can store data
internally in best format• VSIPL code is portable to different platforms
• Vendor can optimize for each platform
• VSIPL code is portable to different platforms
• Vendor can optimize for each platform
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VSIPL Forum
VSIPL Error Checking
• VSIPL provides separate modes for debuggingand for deployment
– Vendors may provide either or both modes– May be one library or two– Operate the same except for error reporting and timing
• Development mode– Extensive error checking– All errors are fatal
• Production mode– Expected to be faster– Implies no error checking– Programming errors may have unpredictable results
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VSIPL Forum
Summary
• VSIPL was designed to be– Portable, without sacrificing performance– Object-based– Useful for signal and image processing– Targeted at embedded systems
• Other talks today will explore VSIPL in more detail