+ All Categories
Home > Documents > Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™...

Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™...

Date post: 06-May-2018
Category:
Upload: donhu
View: 588 times
Download: 20 times
Share this document with a friend
32
Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5
Transcript
Page 1: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover

DateWLP Remover V1.5

Page 2: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 2

One DuPont SolutionCooLam KaptoneThermo conductive/Thermal resistantSubstrate system

TM

APL/WB seriesDryfilm photoresist

EKC WLP Removers- DryFilm- HDMS PI/PBO- Liquid resistHDMS seriesPhoto sensitivePolyimide coatings

EKC Cleaners and Removers Post Etch Residues removers for- Al-Cu / Low-k- Metal gate & High-kCleaners for- Cu / W post CMP

Vertrel VentralCF depositionCleaning agents

®®

CMP slurrySTI, IMD (Ceria)Gate, Barrier metalsCu, W (Colloidal Silica)

Syton MazinBG polishWafer polish

® ®

Solder/AuBall

Bump(Solder)

BPR(Cu)Polyimide (Stress buffer)

Polyimide (Buffer/PKG)

UnderfillPackaging

&Assembly

AssemblyBoard

Substrate

Cu wiring

CuVia

CuVia

W Via

Low-k dielectric

TEOS

P-SiN (Passivation)

WaferProcess

®

Page 3: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 3

Spin on HDM Polyimide

Polyimide (Stress buffer)

Polyimide (Stress buffer)

Image and develop HDM Polyimide

Plate seed layer

Laminate image and developDuPont WBR Dry Film

Plate Bump

Reflow and remove DuPont WBR Dry Film with WLP EKC162™

Typical Process flow for RDL using the One DuPont Solution

Page 4: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 4

Agenda

◆ Application

◆ Chemistry

◆ Compatibility

◆ Process Information

◆ Results

◆ Summary

Page 5: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 5

Application

EKC162™ is ideal for every WLP Remover/Stripping application.

◆ DryFilm and Liquid resist removal for:• Au, Ni, Cu, PbSn, SnAg and high lead Bumps• TSV Formation

◆ Stencil and electroplated bumps ◆ GaAs Backside Via application◆ Full rework capability ◆ Removes uncured HD-4000 Series PI ◆ Compatible with normally cured HD-4000 Series and HD-8800 Series

for wafer level & chip scale packaging

Page 6: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 6

Chemistry

EKC’s unique qualifications to provide a solution

◆ Formulation expertise◆ Proven capability in the optimization of raw materials◆ Years of experience working at interconnect levels with

complex metal combinations◆ A wealth of analysis and applications knowledge◆ Quality systems geared to semiconductor level needs◆ An established organization for worldwide support

Page 7: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 7

Chemistry

Physical and Chemical Properties

Property WLP EKC162™ pH >14

Solubility in Water Complete

Evaporation Rate <1 (Butyl acetate = 1)

Flash Point (°C) >120

Boiling Range 120 – 135°C (248 – 275°F)

Freezing Point (°C) - 24°C * Specific Gravity 1.0989 Vapor Density >1 (Air = 1) Appearance Clear liquid

* Remover was left overnight at -24°C and did not freeze

Page 8: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 8

Compatibility

Observations of surface condition and etch rates on typical wafer materials from the lab and from beta tests showed excellent compatibility

n High lead soldern Eutectic soldern Lead free solder (SnAg)n Copper, Electroless Cu seed layern TiW/Cu/Aun Cu/Ni n Aun Compatible with normally cured HD-4000 Series and HD-8800 Series for

wafer level & chip scale packaging

Page 9: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 9

Compatibility

Method:Samples of various materials were immersed in EKC162™ to determine compatibility. Exposure time of the samples to the chemistry was 65°C for seven days. After exposure the samples were weighed and visually examined for signs of incompatibility. The stripping solution was also analyzed to confirm there were no significant changes in metals contamination.

Material Appearance Weight Change Metals ExtractionEPDM Pass Pass PassFEP Pass Pass PassFRP Pass Pass PassHDPE Pass Pass PassKalrez 8201 O-ring Pass Pass PassPFA Pass Pass PassPolypropylene (natural) Pass Pass PassPolypropylene (white) Pass Pass PassPTFE Pass Pass PassPVC Pass Pass PassPVDF Fail Pass FailSimriz O-ring Pass Pass PassType 316 SS Pass Pass PassType 304 SS Pass Pass Pass

Page 10: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 10

Compatibility55oC/20min HD-4000 Series PI on Cu

Purpose:• To evaluate the compatibility of EKC162™ with HD-PI 4000 series

partially cured at 250°C for 2 hoursExperimental Results:

No PI attack2055EKC162™

ObservationsTime (min)Temp (°C)Chemistry

• Insignificant difference was observed between the processed and unprocessed microscopic images of HD-4000 Series.

• This indicates that out EKC162™ is compatible with HD-4000 Series.

BeforeAfter

55°C/20 minutes

Page 11: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 11

5. Test ResultsCompatibility55oC/20min HD-8800 Series PBO on bare Si

X 50 X 200Optical Microscope

1. No PBO appearance change and PBO crack.

2. No Solder PBO appearance change and PBO crack.

Page 12: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 12

PBO samples: HD-8800 Series PBO Cured @300C 5um thickness films with patterns, attached to 6” Si wafers

5.301

After 55C, 20min

5.189

Initial

5.602

After 55C,60min

Thickness (um)

Measured @EKC (with Step Height Measurement)

Thickness gain (swelling) ratio of PBO was within 10% after 60min treatment @55C: 8%,

4

4.5

5

5.5

6

0 20 40 60 80Treatment time (min)

Thic

knes

s (u

m)

EKC162™

6. PBO Compatibility StudyCompatibility55oC/20min HD-8800 Series PBO on bare Si

Page 13: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 13

Process Information

Typical Semitool SST Process Recipe

Temperature: 50°C

Flow Rate: 1.5 gal/min

Step Time RPM Process Source Manifold Drain1 0:05 35 Warming-up Chamber - Chm 12 0:10 35 WLP EKC162TM to drain T1 M1 Chm 13 0:05 35 Delay to drain Chamber - Chm 14 30:00 35 WLP EKC162TM reclaim to reclaim T1 M1 T15 0:10 500 N2 purge to reclaim N2 M1 T16 0:05 500 Chamber to drain Chamber - Chm 17 2:00 50 DI water rinse to drain CDIW M1, M2 WD18 3:00 500 DI water rinse to drain CDIW M1, M2 WD19 0:30 1200 N2 dry/purge N2 M1, M2, M3 WD110 5:00 600 N2 dry/purge N2 M3 WD1

Page 14: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 14

Process Information

Process Recommendations for Wet Bench

Consult with EKC’s Sales & Engineering staff to establish a process optimized to your specific situation and for any other support needs

Strip Rinse Dry

• 15 - 30 minutes • 40 - 55°C • Mechanical agitation

or Nitrogen bubbling recommended

• Compatible with IPA rinse• No intermediate rinse

required • QDR suggested • 5 – 10 cycles • DI water

• SRD recommended• DI water

Page 15: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 15

Cu etch rate (A/min)

0

2

4

6

8

10

12

14

16

18

0hr 6hr 12hr 18hr 24hr 30hr 36hr 42hr 48hr 54hr 60hr 66hr 72hrHours

A/m

in

Bath Life (2 wafers every 6 hrs)Bath Loading ( 170 300mm 120um thick)2nd - Bath Loading ( 186 300mm 120um thick)

Process InformationBath Life Studies

75 liter tank300 mm wafers - 120 um filmTemp: 60CBlue line = 2 wafers/6hrPink line = 170 wafersRed Line = 186 wafers

Page 16: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 16

Process InformationDryFilm Resist Loading Capability

• Loading = 170 - 300mm wafers, 120mu thick WBR Dry Film in 1 tank 75 liters

• Chemical: 2~3-month old EKC162

• Wet bench tank: Double tank, 75LX2, total around 150L. - Commercial wet bench (Grand Plastic Tech, local Taiwan company).

• Reach the cleaning limit at the ~42th hour

Wafer size Film Thickness um

Loading (wafers/75liters)

12 120 17012 100 20412 75 2728 120 383 8 100 4588 75 6128 70 654

Customer Data

Calculated Data

Page 17: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 17

Resist/PI Removed by EKC162™Co-designed and Optimized for:

DuPont WBR2000 -negative tone acrylic DFR (thick)

DuPont MX5000 series (5-50 um, TSV ,MEMS, tenting applications etc..)

HD-4000 Series PI uncured

Competitive Resists tested:

JSRTHB151N-Negative tone bumping resist (thick)

AZ125NXT -Negative tone bumping resist (thick)

AZ4562 positive bumping resist (thin)

Morton GA3.0/GA4.0 negative tone acrylic DFR (thick)

TOK P50120 negative tone acrylic DFR (thick)

Ashai Kasei DFR CXA240 & CX8040-negative tone acrylic DFR (thick)

Page 18: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 18

Optical Microscope Observation WBR2000 Dry Film Resist Wafer

EKC162™/55C/20minEutectic PbSn Bump

EKC162™/55C/20minPbSn Bump

Page 19: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 19

DuPont WBR 2000 seires55°C, 20 min PbSn Bump 55°C, 30min Cu Bump

DuPont MX 5000 seires55°C, 1 min

Page 20: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 20

HD-4000 Series (Post Develop PI on Cured PI)55˚C, 20 min

Before Clean After EKC162™ CleanRemoved Uncured HDMS 4000 PI with no attack to the cured HDMS 4000 PI

Page 21: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

Competitive Resist Data

Page 22: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 22

50 um – 35 °C 25- 40 mins 70um- 45-55 °C 20-40 mins

70um , SEZ SWT – 60 °C 180-330 secs

JSRTHB151N – 50 & 70um35 - 60°C, 20-40 min PbSn Bump

Page 23: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 23

AZ 125NXT – 100um65°C, 45 min Cu Bump, Cu Line

100 µm dots, layout 1 : 0.3

100 µm dots, layout 1 : 0.7

75 µm dense lines

90 µm dense lines

80 µm dense lines 100 µm dense lines

75 µm dots, layout 1 : 1

90 µm dots, layout 1 : 1

80 µm dots, layout 1 : 1

100 µm dots, layout 1 : 1

Page 24: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 24

AZ 456250°C, 3 min PbSn Bump

Page 25: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 25

Morton GA 3.055°C, 20 min PbSn Bump

Page 26: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 26

60°C 18min50°C 25min

TOK P50120 – 100um50 & 60°C, 25 & 15 min PbSn Bump

Page 27: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 27

Asahi CXA240 55°C, 30 min Pb Bump

Asahi CX804045°C 60 & 90 min Pb Bump

60 min 90 min

Page 28: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 28

Results and Summary◆ Removes and dissolves DuPont WBR Dry Film faster than

competitive films◆ Compatible with normally cured HD-4000 Series and HD-8800

Series for wafer level & chip scale packaging◆ Completely removes uncured HD-4000 Series PI ◆ Completely removes liquid resist◆ Complete, reliable removal of resists, without re-deposit problems◆ Shorter stripping times, at lower temperatures◆ Wide process latitude◆ Full rework capability ◆ Long bath life and high wafer capacity, without sludge

accumulation in the process tool◆ Compatibility with a wide range of metallurgies◆ Capability to handle both electroplated and photo stencil solder

bumping processes ◆ Effective, efficient spray tool and wet bench processing

Page 29: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 29

Page 30: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

Supplement Slides

Page 31: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 31

Safety Health & Environment (SHE)Handling and Storage

◆ Keep tightly closed and store in a dry, well ventilated area 40˚ to 90˚F (5˚ to 32˚C) is recommended

◆ Keep in original vented containers◆ Keep away from strong oxidizing agents, acids, and ketones◆ Prevent skin and ey contact◆ Avoid inhalation of vapor or mist

Personal Protection◆ Respiratory Protection = No personal respiratory equipment required when operated under

proper ventilation, such as a wet bench or fume hood . In case of insufficient ventilation, wear suitable respiratory equipment. (see MSDS for details)

◆ Wear Nitrile, Neoprene or Latex clothing and gloves, and chemical resistant boots when there is a probability of liquid contact.

◆ Wear chemical goggles◆ Avoid contact with skin, eyes and clothing. Remove and wash contaminated clothing and

gloves, including the inside, before re-use.Disposal

◆ Can be landfilled or incinerated, when in compliance with local regulations. Incineration at a facility with appropriate permits or authorizations is the recommended method of disposal.

◆ Spent CSX-W62 should be segregated from ketones and gamma butyrolactone. (See MSDS for more details)

◆ Dispose of package in compliance with local regulation (See MSDS for more details)

Page 32: Wafer Level Packaging EKC162™ Photoresist & PI/PBO … · Wafer Level Packaging EKC162™ Photoresist & PI/PBO Remover Date WLP Remover V1.5

© 2008 EKC Technology / DuPont Electronic Technologies 32

Safety Health & Environment (SHE)Hazard Classification/Identification◆ Based on the EU Commissions Directive 2001/59/E, which sets out Annex VI to the Dangerous

Substances Directive, 67/548/EEC as amended, classifies substance with a LD50/dermal/rat or rabbit of ,50 mg/kg as very toxic by skin contact.

◆ The purpose of Annex VI is to provide a harmonized basis for the classification and labeling of dangerous substances and preparations with EU Member State countries.

◆ The 'trigger' levels for toxic substances within preparation blends is based on a volume percentage level, in the absence of any credible toxicity data for that preparation blend.◆ In the case of TMAH we have been guided to use a Guinea Pig toxicity study, this classes the substances as

“Highly Toxic” (T+). This change in classification is due to the skin tox data of Eastman Kodak (25 to 50 mg/kg)

◆ In the absence of data on the product itself, the conventional method as per Dir 1999/45/EC, the so called preparations directive needs to be applied and it specifies that a preparation containing a “Highly Toxic” substance (T+) in concentrations between 1-7% be classified as toxic.

◆ The contradiction we have is that the classification criteria is on rats or rabbits, whereas our data (Eastman Kodak) was done on guinea pigs.

◆ It is known that guinea pigs are often more sensitive than rats or rabbits and consequently the classification in question could be overstated.


Recommended