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1 www.stringtechnologies.net www.unistring.com VLSI forum 2 www.stringtechnologies.net www.unistring.com VLSI forum VLSI design styles– An Introduction By K. Vasu Senior Application Engineer VLSI & EH group Unistring Tech Solutions Pvt. Ltd # D10, 5th Floor, Eureka court, Beside Image hospitals, Ameerpet, Hyderabad, ph:040-23732798, 09440318188 www.unistring.com String Technologies #309, Vederi complex, opp Dilshuk Nagar bus Depot, Dilsukh nagar, Hyderabad, ph: 040 – 24151900 www.stringtechnologies.net UTS VLSI forum 3 www.stringtechnologies.net www.unistring.com VLSI forum Chips Integrated circuits consist of: A small square or rectangular “die”, < 1mm thick Small die: 1.5 mm x 1.5 mm => 2.25 mm 2 Large die: 15 mm x 15 mm => 225 mm 2 Larger die sizes mean: More logic, memory Less volume Less yield Dies are made from silicon (substrate) Substrate provides mechanical support and electrical common point 4 www.stringtechnologies.net www.unistring.com VLSI forum What is VLSI What is VLSI? “Very Large Scale Integration” Defines integration level 1980s hold-over from outdated taxonomy for integration levels Obviously influenced from frequency bands, i.e. HF, VHF, UHF Sources disagree on what is measured (gates or transistors?) SSI – Small-Scale Integration (0-10 2 ) MSI – Medium-Scale Integration (10 2 -10 3 ) LSI – Large-Scale Integration (10 3 -10 5 ) VLSI – Very Large-Scale Integration (10 5 - 10 7 ) ULSI – Ultra Large-Scale Integration (>= 10 7 )
Transcript
Page 1: What is VLSIvlsionline.com/images/Introduction1.pdf · VLSI design styles–An Introduction VLSI forum By K. Vasu S enior Application Engineer VLSI & EH group Unistring Tech Solutions

1www.stringtechnologies.net

www.unistring.com

VL

SI

foru

m2

www.stringtechnologies.net

www.unistring.com

VL

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VLSI design styles–

An Introduction

By

K. Vasu

Senior Application Engineer

VLSI & EH group

Unistring Tech Solutions Pvt. Ltd

# D10, 5th Floor, Eureka court, Beside Image hospitals, Ameerpet,

Hyderabad, ph:040-23732798, 09440318188

www.unistring.com

String Technologies

#309, Vedericomplex, oppDilshukNagarbus Depot, Dilsukhnagar, H

yderabad,

ph: 040 –24151900

www.stringtechnologies.net

UTS VLSI forum

3www.stringtechnologies.net

www.unistring.com

VL

SI

foru

m

Chips

•Integrated circuits consist of:

–A small square or rectangular “die”, < 1mm thick

•Small die: 1.5 m

m x 1.5 m

m => 2.25 m

m2

•Large die: 15 m

m x 15 m

m => 225 m

m2

–Larger die sizes m

ean:

•More logic, mem

ory

•Less volume

•Less yield

–Dies are made from silicon (substrate)

•Substrate provides m

echanical support and electrical common point

4www.stringtechnologies.net

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VL

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What is VLSI

•What is VLSI?

–“V

ery Large Scale Integration”

–Defines integration level

–1980s hold-over from outdated taxonomy for integration levels

•Obviously influenced from frequency bands, i.e. HF, VHF, UHF

–Sources disagree on what is measured (gates or transistors?)

•SSI –Small-Scale Integration (0-102)

•MSI –Medium-Scale Integration (102-103)

•LSI –Large-Scale Integration (103-105)

•VLSI –Very Large-Scale Integration (105-107)

•ULSI –Ultra Large-Scale Integration (>= 107)

Page 2: What is VLSIvlsionline.com/images/Introduction1.pdf · VLSI design styles–An Introduction VLSI forum By K. Vasu S enior Application Engineer VLSI & EH group Unistring Tech Solutions

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VLSI design M

ethodologies

•Full-Custom VLSI Design

•Sem

i-Custom VLSI Design

Standard cell based IC technology

Structured ASIC IC technology

Programmable Logic Device (PLD) IC technology

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Issues in Full Custom design

•Placement

•Routing

•Sizing

•Design Rules

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•Best size, power, perform

ance

•Hand design

•Physical design tools

Issues in Full Custom design (continued ..)

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Sem

i-Custom standard cell based IC Technology

•Standard Cell

–A library of pre-designed cell

–Place and route

–Integrate to yield final layout

ASIC

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•Gate Arrays

–Array of prefabricated gates

–“place” and route

–Higher density, faster tim

e-to-m

arket

–Does not integrate as well with full-custom

Sem

i-Custom G

ate Arrays Technology

Structured

ASIC

10

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SI

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m

Sem

i-custom Programmable Logic Device

(PLD) IC

Technology

(2) Complex Programmable Logic Devices (CPLD)

-Large granularity devices

-Typically consists of 50 Sim

ple Programmable Logic Devices

(SPLD)

(1) Field Programmable G

ate Arrays (FPGA)

-Medium granularity devices

-Mem

ber of class of devices called Field Programmable Logic (FPL)

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FPGA CPLD

Full-custom Vs Sem

i-custom

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Design Abstraction Levels n+

n+

S

G

D

+

DEVIC

E

CIR

CUIT

GATE

MODULE

SYSTEM

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ASIC design flow

architectural

simulation

floorplan

register-transfer

design

logic

design

circuit

design

layout

functional/

perform

ance

verification

testability

detailed

specs

tapeout

14

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ASIC Synthesis Flow

High-Level

Synthesis

Logic

Synthesis

Physical

Design

Fabrication and

Packaging

15

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VL

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mFPGA Design Process

Functional Design

Register Transfer

Level Design

Synthesis

Place and Route

Physical Design

Requirements

VHDL M

odel

VHDL M

odel

Logic Sim

ulation

Behavioral Sim

ulation

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Thank you


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