Yipeng Liu, Technical Marketing Director

CDNLive 2015

Taiwan

August 11, 2015

Why Scalability for IoT is Critical to Success

2 © 2015 Cadence Design Systems, Inc. All rights reserved.

• IoT consists of distributed

services based on sensing,

sharing, and controlling

through new nodes

• The nodes are the big

hardware opportunity

– Low cost

– Low energy

– Unique form factors

– Lots of new sensors

– Always alert

• Always alert node may be

independent device or

subsystem in SoC

IoT – The incredible opportunity for innovation

Cloud

Things

Fog

3 © 2015 Cadence Design Systems, Inc. All rights reserved.

Layered cognition

Quiescent system

nW

Active Power

Always Alert

Always On

Application Filter

Cloud Server Farm

Always Alert -detect activity of interest

1-1000 uW

“Hello audio”

Subsystem event processing

1mW - 50 mW

“Turn up volume”

System application processing

50mW-1000mW

“Play ‘Little Apple’”

Cloud application processing

>> 1Watt

“What’s the meaning of life?”

4 © 2015 Cadence Design Systems, Inc. All rights reserved.

The “Things” in IoT

• Characteristics of “Thing”?– A physical entity (node)

– Has one to many sensors

– Connected to the Fog

– Range from very simple to very complicated

– Some can only be powered by batteries

– Most are “always alert”

• Some examples of things– Thermostat, refrigerators, lights, lamppost, smart meter

– Wearable devices: fitness band, watch

• We will focus on the complex, always alert devices

5 © 2015 Cadence Design Systems, Inc. All rights reserved.

• Signal processing workload is growing in complexity over time

• Every IoT application is slightly different

• Energy efficiency is extremely important

• Microcontrollers have limited DSP capabilities

• Cost and ease of use drive desire for one processor core

• No processor cores are ideally suited for all essential functions

– Sensing

– Computation

– Communication

Key design challenges for always alert IoT devices

6 © 2015 Cadence Design Systems, Inc. All rights reserved.

Tensilica Fusion DSP

7 © 2015 Cadence Design Systems, Inc. All rights reserved.

Introducing Tensilica Fusion DSPUltra-low power processing for always on/wearables/IoT

• Sensor fusion

• Biometric monitoring

• Pedestrian dead reckoning

Sensing

• Voice trigger

• Face trigger

• Gesture trigger

Wake-up Processing

• Speech recognition

• Speech pre-processing

• Audio playback

Audio/Voice/ Speech

• Bluetooth Low Energy

• Wi-Fi

• Zigbee

Communications

8 © 2015 Cadence Design Systems, Inc. All rights reserved.

• Base architecture– Built on Xtensa® technology

– Dual-issue, VLIW processor

– Based on HiFi 3 architecture

• Configuration options – Single-precision FPU

• Speeds S/W porting

– AVS (audio/voice/speech)• SW compatibility with HiFi 3 Audio DSP

• Access to 150+ HiFi audio/voice software packages

– 16-bit Quad MAC• Accelerates communications standards like BLE/Wi-Fi

• Accelerates voice algorithm performance

– BLE/Wi-Fi AES-128 • Encryption acceleration for wireless

– Advanced bit manipulation• Accelerates performance of bit operations for

implementation of baseband MAC/PHY

Tensilica Fusion DSP architecture

Xtensa Core ISA

Dual Instruction Issue

Single/Dual MAC DSP

(32b, 24b, 16b)

FPU AVSAES-

128

16-bit

Quad MACAdv. Bit

Manipulation

9 © 2015 Cadence Design Systems, Inc. All rights reserved.

Tensilica Fusion usage scenarios16-bit

Quad

MAC

FPU AVS AES Adv. Bit

Ops

Featu

res

Voice Activation

Sensor Fusion

Audio/Voice/

Speech

Wireless Comms

En

d

Pro

du

cts

Activity Band/

Watch/Phone

Healthcare Band

Smart Home

???

Automotive

10 © 2015 Cadence Design Systems, Inc. All rights reserved.

Tensilica Fusion benchmarks

0

2

4

6

16-bit fixed-point FIR inner

loop

32-bit FP FIR(100 taps x 256

rea;)

MP3 decode 32-bit FP FFT(256 complex)

6-axispedestriannavigation

sensor fusion

Rela

tive P

erf

orm

ance

(Avera

ge R

ISC

= 1

.0)

Superior DSP Performance

RISC A RISC B

Fusion DSP

0

1

2

3

4

0 1 2D

hry

sto

ne

2.1

pe

r M

Hz, w

ith

IP

A

Dhrystone 2.1 per MHz, no IPA, no in-lining

Decent Control Capability

11 © 2015 Cadence Design Systems, Inc. All rights reserved.

Tensilica Fusion SW support from Cadence and partners

DSP Math Libraries (Fixed and Floating Point)

Voice Codecs

Audio Codecs

DSP Audio Framework

Face Trigger

Sensor processing SW

Voice Trigger

Voice Recognition

Voice Pre-Processing

Audio Pre and Post Processing

© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the

Cadence logo are trademarks of Cadence Design Systems, Inc. in the United States and other

countries. All other trademarks are the property of their respective owners and are not affiliated

with Cadence.

12 © 2015 Cadence Design Systems, Inc. All rights reserved.

• Most energy efficient for always on such as Sensory Truly HandsFree Voice Trigger

• Efficient floating-point support for sensor fusion

• Write in C/C++ using advanced compiler with auto-vectorization

• Based upon the Xtensa® 32-bit RISC processor

Leading low-power DSP performance and control

• Multiple configuration options to fit the targeted application

• No waste, maximum efficiency

Configurable - get the right core immediately

• Compatible with HiFi. 70+ partners. 150+ SW packages

• Optimized DSP library with fixed and float kernels

• Cycle-accurate ISS and models for all simulation levels

Comprehensive tools, software, and ecosystem

Proven Xtensa architecture with billions of cores shipped

Fusion DSP benefitsIdeal solution for

IoT, wearable, and

always on functions

© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, Tensilica, and Xtensa are registered trademarks of Cadence Design Systems, Inc. in

the United States and other countries. All other trademarks are the property of their respective owners.