Wideband closed-form expressions for direct extraction of HBT small-signal parameters for all amplifier bias classes D. Dousset, A. Issaoun, F.M. Ghannouchi and A.B. Kouki Abstract: An accurate, robust and broadband method for the direct extraction of heterojunction bipolar transistor (HBT) small-signal model parameters is proposed. This new approach, modified from previous work by the authors, including additional equivalent-circuit elements, g o and C ce , can be applied accurately to all transistor bias points covering the entire forward bias region. First, hot and cold bias conditions are used to determine the parasitic elements (L b , L c , L e , C bep , C cep and C bcp ), then the access resistances ( R b , R c , R E ) are determined using DC flyback measurement. Finally, the intrinsic elements are extracted analytically through a judicious and rigorous derivation of closed-form expressions of the Z-parameters deduced from the measured S-parameters. The analytical expressions allow us to obtain a unique physical solution without having to use a nonlinear system. The method is applied at multiple bias points and over a wide range of signal frequencies. As the physical solution is unique, all the circuit elements are determined without any optimisation or any knowledge of the geometrical or process parameters of the device. To assess the effectiveness of the present method three HBT devices, with 2 25 mm 2 ,2 20 mm 2 and 2 10 mm 2 emitter areas from two different foundries, are studied. Excellent agreement is obtained between the model and measurements up to 20 GHz and for all amplifier bias classes. 1 Introduction Heterojunction bipolar transistors (HBTs) have become very promising devices for future applications at microwave and millimetre-wave frequencies. An accurate linear device model, valid for a wide range of operating biases and signal frequencies, is required for the design of high-performance linear microwave circuits and as part of large-signal models. Various HBT models employ different equivalent-circuit topologies. Although there are many variants of such topologies, the intrinsic part of the equivalent circuit is always represented by a T [1–3] or P [4–6] topology. The P-type intrinsic circuit is used in this study, because the distributed nature of the base-collector capacitance is modelled more easily than in the circuit using T topology [7]. A number of extraction techniques have been proposed over the years to obtain all the required linear equivalent- circuit elements directly from the measured S, Y, or Z parameters [8–19]. These techniques rely on a wide range of approaches combining special dedicated measurements, analytical approaches and/or optimisation. The analytical approach remains by far the preferred method for parameter extraction. However, the analytical expressions needed for the Z, Y or H parameters, as a function of the small-signal equivalent-circuit elements, are very cumber- some with a number of unknowns that are greater than the number of equations. Costa et al. [8] bypassed this suggested problem by using specific test-structures to determine the extrinsic elements, thereby reducing the number of unknowns. Schaper et al . [9] have proposed an iterative approach and assumed that the ratio of the intrinsic to extrinsic base- collector capacitance is less than one, which is not the case for all HBTs. Other authors [10–14] have combined analytical methods and optimisation techniques to solve the problem. In such cases, the uniqueness of the solution is questionable. Wei et al . [15] have proposed a direct extraction method of all the equivalent circuit elements using the Z-parameters computed from the measured S- parameters. The main drawback of this method is that the intrinsic elements depend strongly on a g parameter having a small value ðg ¼ C BC =ðC CC þ C BC Þffi 1Þ, which is not applicable to all transistors as will be shown in the following. Moreover, a small error with this parameter induces a large one with the intrinsic parameters. Recently, a peeling technique was proposed in [16]. One drawback of this extraction scheme is that any error in the values of the extrinsic or intrinsic elements removed from the circuit will increase the error in the extracted values of the remaining elements. More recently, a procedure combining the analytical and optimisation approaches was developed in [17] and a purely analytical approach was presented in [18] . The approach proposed in [17] led to quite accurate results, with reasonable confidence in the optimisation process and a relatively low global residual error between simulation and measurement. However, it remains desirable to avoid the optimisation process altogether and improve the parameter extraction accuracy. In [18], the approach proposed requires D. Dousset and F.M. Ghannouchi are with Ecole Polytechnique de Montr! eal, P.O. Box 6090, succ. Centre-ville, Montr! eal, Qc, Canada H3C 3A7 A. Issaoun and A.B. Kouki are with Ecole de technologie sup! erieure, 1100 Notre-Dame St. W, Montr! eal, Qc, Canada H3C 1K3 E-mail: [email protected]r IEE, 2005 IEE Proceedings online no. 20045077 doi:10.1049/ip-cds:20045077 Paper first received 22nd July 2004 and in final revised form 18th May 2005 IEE Proc.-Circuits Devices Syst., Vol. 152, No. 5, October 2005 441
Transcript
Wideband closed-form expressions for directextraction of HBT small-signal parametersfor all amplifier bias classes
D. Dousset, A. Issaoun, F.M. Ghannouchi and A.B. Kouki
Abstract: An accurate, robust and broadband method for the direct extraction of heterojunctionbipolar transistor (HBT) small-signal model parameters is proposed. This new approach, modifiedfrom previous work by the authors, including additional equivalent-circuit elements, go and Cce,can be applied accurately to all transistor bias points covering the entire forward bias region. First,hot and cold bias conditions are used to determine the parasitic elements (Lb, Lc, Le, Cbep, Ccep andCbcp), then the access resistances (Rb,Rc,RE) are determined using DC flyback measurement.Finally, the intrinsic elements are extracted analytically through a judicious and rigorous derivationof closed-form expressions of the Z-parameters deduced from the measured S-parameters. Theanalytical expressions allow us to obtain a unique physical solution without having to use anonlinear system. The method is applied at multiple bias points and over a wide range of signalfrequencies. As the physical solution is unique, all the circuit elements are determined without anyoptimisation or any knowledge of the geometrical or process parameters of the device. To assessthe effectiveness of the present method three HBT devices, with 2 25mm2, 2 20mm2 and2 10mm2 emitter areas from two different foundries, are studied. Excellent agreement is obtainedbetween the model and measurements up to 20GHz and for all amplifier bias classes.
1 Introduction
Heterojunction bipolar transistors (HBTs) have becomevery promising devices for future applications at microwaveand millimetre-wave frequencies. An accurate linear devicemodel, valid for a wide range of operating biases and signalfrequencies, is required for the design of high-performancelinear microwave circuits and as part of large-signal models.Various HBT models employ different equivalent-circuittopologies. Although there are many variants of suchtopologies, the intrinsic part of the equivalent circuit isalways represented by a T [1–3] or P [4–6] topology. TheP-type intrinsic circuit is used in this study, because thedistributed nature of the base-collector capacitance ismodelled more easily than in the circuit using T topology[7].
A number of extraction techniques have been proposedover the years to obtain all the required linear equivalent-circuit elements directly from the measured S, Y, or Zparameters [8–19]. These techniques rely on a wide range ofapproaches combining special dedicated measurements,analytical approaches and/or optimisation. The analyticalapproach remains by far the preferred method forparameter extraction. However, the analytical expressionsneeded for the Z, Y or H parameters, as a function of the
small-signal equivalent-circuit elements, are very cumber-some with a number of unknowns that are greater than thenumber of equations. Costa et al. [8] bypassed thissuggested problem by using specific test-structures todetermine the extrinsic elements, thereby reducing thenumber of unknowns.
Schaper et al. [9] have proposed an iterative approachand assumed that the ratio of the intrinsic to extrinsic base-collector capacitance is less than one, which is not the casefor all HBTs. Other authors [10–14] have combinedanalytical methods and optimisation techniques to solvethe problem. In such cases, the uniqueness of the solution isquestionable. Wei et al. [15] have proposed a directextraction method of all the equivalent circuit elementsusing the Z-parameters computed from the measured S-parameters. The main drawback of this method is that theintrinsic elements depend strongly on a g parameter havinga small value ðg ¼ CBC=ðCCC þ CBCÞ ffi 1Þ, which is notapplicable to all transistors as will be shown in thefollowing. Moreover, a small error with this parameterinduces a large one with the intrinsic parameters. Recently,a peeling technique was proposed in [16]. One drawback ofthis extraction scheme is that any error in the values of theextrinsic or intrinsic elements removed from the circuit willincrease the error in the extracted values of the remainingelements.
More recently, a procedure combining the analytical andoptimisation approaches was developed in [17] and a purelyanalytical approach was presented in [18]. The approachproposed in [17] led to quite accurate results, withreasonable confidence in the optimisation process and arelatively low global residual error between simulation andmeasurement. However, it remains desirable to avoid theoptimisation process altogether and improve the parameterextraction accuracy. In [18], the approach proposed requires
D. Dousset and F.M. Ghannouchi are with Ecole Polytechnique de Montr!eal,P.O. Box 6090, succ. Centre-ville, Montr!eal, Qc, Canada H3C 3A7
A. Issaoun and A.B. Kouki are with Ecole de technologie sup!erieure, 1100Notre-Dame St. W, Montr!eal, Qc, Canada H3C 1K3
both biased and unbiased measurements and uses a set ofnine blocks of expressions that lead to a quite involvednonlinear system, to be solved with care, to avoid anonphysical solution. While this approach may lead to aquite accurate extraction of model parameters, it remainsvery sensitive to the accurate extraction of block B9, inaddition to requiring that the extraction procedure berepeated for the biased and unbiased conditions.
In the present work, a small-signal equivalent-circuitparameters-extraction procedure for the direct extraction ofall the circuit elements is presented. This method usesjudiciously derived closed-form expressions for the equiva-lent circuit’s Z-parameters and does not require anyoptimisation. Furthermore, the solution of nonlinearequations is avoided and special bias conditions, hot andcold, are required only when parasitic elements cannot bede-embedded through measurement or electromagneticsimulation techniques. This approach, of which a simplifiedversion was applied to class C amplifiers in [19], bringsimproved accuracy over [17] with increased simplicity androbustness over [18]. By including additional equivalent-circuit elements over [19], i.e. go and Cce, it is shown thatthis extraction technique can be applied accurately to alltransistor bias classes covering the entire forward biasregion. The technique is applied to a wide range oftransistors of different sizes and makes. The resultingaccurate multiple bias parameter extraction is better atdescribing the bias-dependent parameter, which in turnleads to improved large-signal modelling.
2 Theory
Figure 1 shows the small-signal lumped-element equivalentcircuit used for the HBT transistors in this study. Thiscircuit includes all the extrinsic elements as well as theelements of the active portion of the HBT. The extrinsicregion is modelled by the lead inductances Lb, Lc and Le,the access resistances Rb, Rc and RE and the parasitic padcapacitances Cbep, Ccep and Cbcp. Cce models the overlappingarea of the emitter runners and collector mesa. The activeportion of the HBT is modelled using Cce, Cbe, Cc, Rbb, Rbe,
baseCbcp
Lb Rb Rbb
VbeVbe
CbcRbc
gm
Lc
go
Cbc
Cc
Ccc
Rc Lc collector
Cbcp
Cccp
inner shell RE
gm = goejωτd
emitter
Fig. 1 Small-signal equivalent-circuit diagram of the HBTThe dashed box denotes the intrinsic bias-dependent part
2×10−3
−2×10−3
−4×10−3
−6×10−3
0
0 2 4 6 8 10 12 14 16 18 20
P1 (S)
frequency, GHz
15×10−6
10×10−6
5×10−6
−5×10−6
0
extraction region of P1
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
frequency, GHz
10×1023
8×1023
6×1023
4×1023
2×1023
0
8×1022
6×1022
4×1022
2×1022
−2×1022
0
0 2 4 6 8 10 12 14 16
0 2 4 6 8 10 12
P3 (Ω) = slope
extraction region of P3
4.876 GHz
ω2×1021 (rad/s)2
ω2×1020 (rad/s)2
P2 (fF)
frequency, GHz
frequency, GHz
80
75
70
65
600 2 4 6 8 10 12 14 16 18 20
62.5
62.0
61.5
61.00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
extraction region of P2
frequency, GHz
frequency, GHz
extraction region of P4
P4
5
4
3
2
1
00 2 4 6 8 10 12 14 16 18 20
0.5
0.4
0.3
0.2
0.1
02 3 4 5 6 7 8 9
Fig. 2 Plots of expressions (1)–(4) along with the details on the regions of extraction of the different parameter coefficients, Pi
go, gmo and td, which are considered to be bias-dependentand gathered in the inner shell. The extrinsic elements arebias-independent and therefore can be de-embedded usingtechniques such as electromagnetic technique [21] ortechniques using special measurements [14, 16, 17]. Weare left with the intrinsic Z-parameters, zie
11, zie21, zie
12 and zie22
that can be characterised by the equations developed inAppendix 8.
Using the assumptions gm gmoð1 jotdÞ andð1þ gmoRbeÞ=gmoRbe 1, as long as fo10GHz, the realand imaginary parts of relations (14)–(20), see Appendix 8,can be approximated by
< 1
Zie12 Zie
21
P1 Cbc þ Ccð Þ ReCbe þ RbbCð Þo2 ð1Þ
oI Zie21
ReCbe RbbCbcRbbC tdð Þ þ t2d
Cbc þ Cc
o2 þ 1
P2ð2Þ
o2< Zie22 Zie
12
go
1þ gmoRbeð Þ2 Cbc þ Ccð ÞP2
ReCbeRbbCðReCbe tdÞo4
P2þ P3o2
ð3Þ
< Zie11 Zie
12
P4 ð4Þ
where Re ¼ Rbe=1þ gmoRbe, < ½X ¼ real part of X andI ½X ¼ imaginary part of X.
The independent parameters in these equations can bedetermined independently from each other through con-sidering the variation with respect to o or o2 of their leftsides as shown in Fig. 2, along with the details of regions ofextraction of Pi parameters.
3 Extraction procedure
3.1 Extraction of extrinsic elementsThe first step in extracting the elements of the equivalentcircuit is the extraction of the parasitic capacitances and ofthe remaining extrinsic elements. The accuracy of this firststep greatly influences the values of the intrinsic deviceelements. Hence, we have used the methods outlined in [14]and [17]. These methods require reverse-bias measurementsfor extracting intrinsic capacitances. Forward-bias measure-ments especially for high base-current densities are requiredto extract the parasitic inductances where the influence ofthe parasitic capacitances remains negligible in comparisonto the inductances. Forward-bias measurements for variousbase-current densities are also needed to extract the parasiticresistances. These extracted extrinsic elements are then usedto de-embed the measured S parameters of the device and,hence, obtain those corresponding to the intrinsic circuitshown by the dashed line of Fig. 1. After de-embedding ofthe parasitic elements, the access resistances are determinedusing extra measurements such as flyback.
Fig. 3 Plot of expressions (7)–(9) against frequency showing theextraction regions of Rbb, Cce and td
S21/21
S12∗5
S11
S22
Fig. 4 Comparison of de-embedded S-parametersBetween test structure technique () and electromagnetic technique() for a 2 25mm2 HBT device over 1–50GHz at Vce¼ 25V andIc¼ 15mA
3.2 Extraction of Rbe and gmoFor the sake of consistency with the large-signal model,we have used DC measurements to extract Rbe and gmo.The dynamic resistance of the base-emitter junction isgiven by
Rbe ¼ NEVT=Ib ð5ÞThe DC transconductance is given by
gmo ¼ Ic=NF VT ð6Þwhere VT is the thermal voltage. Ib and Ic are, respectively,the base and collector currents at the considered bias point.NE and NF are, respectively, the emission coefficients of thebase-emitter and base-collector junctions and they areextracted using forward Gummel measurement.
3.3 Extraction of the remaining intrinsicelementsFor the extraction of Rbb, we have retained the approach of[20], then Rbb is given by
Rbb ¼ limf!1
<Zie11 Zie
22 Zie12
þ Zie
12 Zie12 Zie
21
Zie22 Zie
12
ð7Þ
The capacitance Cce, which models the overlapping area ofthe emitter runners and collector mesa [16], is extractedusing the following equation:
Cce¼1
oI Y ie
22 þ Y ie12
Y ie22 Y ie
11
1 1
jACcoþ Y ie
21 Y ie12
Y ie11 þ Y ie
12
0BBB@
1CCCAA1
26664
37775
ð8Þ
where
A ¼ < Zie11 Zie
22 Zie12
þ Zie
12 Zie12 Zie
21
= Zie
22 Zie12
and A1 ¼ Y ie
21 þ Y ie11
= Y ie
11 þ Y ie12
The small-signal time delay which models all the transittimes of the electrons across the device is extracted using thefollowing equation:
td ¼ 1
off 1þ joRbeCbeð Þ Zie
12 Zie21
Zie22 þ Zie
12
ð9Þ
Table 1: Extracted Pi and elements of the small-signal model for four biasing points of the 2 25lm2 transistor
Pi and circuit elements Vce¼ 2V, Ic¼ 10mA,Ib¼ 74.1mA
Vce¼ 3V, Ic¼15mA,Ib¼108.3mA
Vce¼4V, Ic¼ 20mA,Ib¼141.4mA
Vce¼ 5V, Ic¼ 25mA,Ib¼ 184.4mA
P1 0.7203106 0.8149106 1.0309 106 1.4341106
P2 29.2 1015 21.71015 18.56 1015 17.18 1015
P3 119.9 184.5 202.5 207.7
P4 3.981 3.66 3.131 3.293
Cbe, pF 1.28 2.17 2.69 3.14
Cbc, fF 11.1 8.8 8.1 7.64
Cc, fF 17.3 12 9.2 7.96
Rbb, O 6.5 6.3 6.1 6.4
td, ps 1.19 1.69 1.81 1.58
g0, mS 0.111 0.129 0.167 0.222
gm0, mS 362.14 538.89 710.22 873.98
Rbe, O 425.92 293.83 227.63 177.3
Cce, fF 11 13 14 15
Table 2: Extracted Pi and elements of the small-signal model for four biasing points of the 2 10lm2 transistor
Pi and circuit elements Vce¼ 1.5V, Ic¼1.0mA,Ib¼ 6.95mA
Expressions (7)–(9) are plotted as functions of frequency inFig. 3 along with the extraction regions of Rbb, Cce and td.
Numerical values of parameters Pi are determined at lowfrequencies using a mean value in the constant region. Rbb,Cce and td are extracted in the high-frequency region using amean value of the constant region. Knowing the values ofP1, P2, P3, P4, Rbb, gmo and Rbe, the remaining intrinsicelements are steadily and uniquely obtained as follows:
go ¼ gmoRbeP1 ð10Þ
Cbe ¼P2P3
Reð11Þ
Cbc ¼ P2 Cc þ 2goReCbeð Þ ð12Þ
Cc ¼P2P4
Rbb goReCbe
1þ goReCbe
P2 2goReCbe
1ð13Þ
4 Results and discussions
In order to validate and to assess the accuracy of theproposed work, measurements were taken using a micro-wave probing system (S.uss Microtec) and a vector networkanalyser (Anritsu 37397C) over the frequency range1–20GHz on several transistors of different emitter areas.Then, the outlined extraction technique was used to extractthe parameters of the different transistors. This Sectionstarts by studying the extraction effect of the extrinsicelements using different approaches on the proposedmethod. Next, results obtained for two AlGaAs/GaAstransistors of 2 25mm2 and of 2 10mm2 emitter areaswill be presented. The powerfulness of the method is furtherproved by studying a third transistor (2 20mm2) from adifferent foundry. Following this, the stability of theextraction algorithm with the choice of the differentfrequency regions is presented. Finally we end the Sectionby showing the effect of Cce on the fit of the S parameterswhen it is neglected.
As the present work focuses on the direct extraction ofthe intrinsic elements, the literature tells us that de-embedding techniques are essentially of three types. Thefirst uses cold and hot measures of the S parameters of thedevice such as [14]. The second uses test-structure measure-ments such as [17] and the last uses electromagnetic
techniques such as [21]. In Fig. 4, we have presented acomparison between two de-embedding techniques, i.e. theelectromagnetic technique and the test-structure technique.This result, as well as others not shown here for the sake ofspace, proves that any of the mentioned methods can beused to accurately de-embed the parasitic elements.
For two transistors of 2 25mm2 and of 2 10mm2
emitter areas, the used measurements were de-embeddedusing an electromagnetic technique, i.e. [21], and flybackmeasurements were used to extract the access resistances[22]. The obtained resistance values are Rb¼ 1.3O,Rc¼ 5.3O and RE¼ 1.3O, for the 2 25 transistor, andRb¼ 0.9O, Rc¼ 13.7O and RE¼ 3O, for the 2 10transistor. Then, the described extraction procedure wasapplied for various biasing points distributed over the wholeforward IcVce region of the two considered transistors. Asrepresentative amplifier classes, Figs. 2 and 3 were drawnfor four biasing points resulting in the extraction of the Pi
(i¼ 1–4) coefficients and of the intrinsic circuit elementslisted in Tables 1 and 2, respectively, for the 2 25mm2 andthe 2 10mm2 transistors. Finally, these values wereplugged into a design circuit in the HP-ADS simulatorusing the equivalent-circuit diagram of Fig. 1. The obtainedsimulations for the considered bias points are compared tomeasurements in Fig. 5, for the 2 25mm2 transistor, andin Fig. 6, for the 2 10mm2 transistor. It is worthwhile topoint out that the fitting of measurements, shown in theseFigures, using the simulations is achieved without anyoptimisation. As the collector current increases, the S12
parameter gets smaller and smaller and harder to measurecorrectly at high frequencies; this is why a small discrepancyappears in S12 between measurements and simulations inFig. 5.
To show the power of the proposed method, varioustransistors from different foundries were studied. As anexample of these transistors the obtained results for a2 20mm2 emitter area (QA202D2) transistor from WINTechnologies will be shown. Test structure measurementswere used to extract the bias-independent elements. Theobtained values are Rb¼ 1.6O, Rc¼ 1.44O, RE¼ 1.22O,for the access resistances, Lb¼ 17pH, Lc¼ 8.7pH,Le¼ 22.39pH, Ccep¼ 33.22 fF, Cbep¼ 33.22 fF and Cbcp¼33.22 fF, for the parasitic elements. The Pi coefficients andthe intrinsic circuit element values obtained are listed inTable 3, for four bias points distributed over the whole
Table 3: Extracted Pi and elements of the small-signal model for four biasing points of the 2 20lm2 transistor
Pi and circuit elements Vce¼ 1V, Ic¼ 26.8mA,Ib¼ 320mA
forward region. Figure 7 shows the comparison of the Sparameters between the simulations and measurements forthe four considered bias points from 1GHz to 20GHz.
In applying the present method, the user has to make avisual decision as to which region of frequency of a givenparameter has to be extracted (generally the flat region).However, in order to test the sensitivity of our method andto show the effect on the S-parameter modelling, somelarger frequency ranges have been chosen for the parameterextractions. We have derived the circuit elements fromFigs. 2 and 3 which are the plots of the algorithm for the2 20mm2 transistor at Vce¼ 2V, Ic¼ 12.77mA,Ib¼ 160mA. Then, nonoptimum regions are chosen asshown in Table 4 and circuit elements are derived. Resultsare given in Table 5 for both optimum and nonoptimumextraction regions. Finally, the obtained fit of the calculatedS parameters using these two approaches are compared tomeasurements in Fig. 8. As we can see, by choosingnonoptimum extraction regions for different parameters,this affects only the fit of the magnitude of S11 (which canbe corrected by reducing Rbb).
Throughout the different transistors that we have studied,it turns out that the circuit element Cce is present in sometransistors with an effect on the fit of the modelled Sparameters, whereas for others it is negligible as also noticedby other authors (e.g. [16]). The value of Cce is found to bebias-dependent and it increases as the collector currentincreases, which is noticeable from the previous results. Inneglecting the Cce element, a significant error will result inthe fit of the measured S parameters. This is particularlytrue for the phase of S22 as shown in Fig. 9, for the 2 25transistor.
Table 4: Extraction regions for different parameters forshowing the sensitivity of the method
P1 P2 P3 P4 Rbb td Cce
Fmini 0.1 0.299 0.1 1.294 5.274 2.09 3.085
Fmaxi 1.095 8.06 14.229 20 20 20 20
Table 5: Extracted Pi and elements of small-signal modelfor 2 20lm2 transistor showing variation of elements asfunction of frequency region of extraction. At bias point:Vce¼ 2V, Ic¼ 12.77mA, Ib¼ 160lA
We end this Section with a discussion on the inclusion ofgo in the small-signal equivalent circuit, as most authorsconsider that this circuit element is zero for III–V baseddevices. It turns out that, from the different transistors wehave studied, as seen in Tables 1–3, this assumption iscorrect for low collector currents, however the value of go
increases as the collector current increases. Not including go
in the small-signal equivalent circuit results in a deteriora-tion of the S22 parameter fit.
5 Conclusion
In this paper, a small-signal equivalent-circuit parameter-extraction procedure for the direct extraction of all theintrinsic elements is presented. This method uses derivedclosed-form expressions for the equivalent circuit’s Zparameters deduced from measured multi-biased S para-meters over a wide frequency bandwidth. The fact that theoutput conductance, go, as well as the intrinsic collector-emitter capacitance, Cce, were taken into account in theHBT model, the developed technique was found to beaccurate for the extraction of the model’s parameters for allamplifier bias classes and over a wide frequency bandwidth.In addition, this newly developed technique offers uniquephysical solutions for the model parameters, and does notrequire any optimisation or any specific test structures. Thisprocedure was tested on various transistors of differentemitter areas from two different foundries. An excellentagreement is shown between the measured and the
simulated S parameters, from 100MHz to 20GHz, cover-ing the whole forward IcVce region. It is expected that thedeveloped technique can be applied in the investigation ofthe variation of intrinsic parameters with biasing, which is acrucial problem for HBT large-signal modelling purposes.
6 Acknowledgment
The authors would like to acknowledge the support ofNortel Networks and WIN Semiconductors for providingthe measurements. This work was supported in part by theNational Research Council of Canada (NSERC).
7 References
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mag
nitu
de o
f S(1
,2)
phas
e of
S(1
,2)
0.08
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,1)
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,1)
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S(2
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Fig. 8 Measured (–) and model-calculated S-parameters, from an optimum choice (o) and from a nonoptimum choice () of the frequencyregions, for the 2 20mm2 HBT device, over 1–20 GHz range, showing the sensibility of the proposed method to the regions of extraction at thebias pointVce¼ 2.0V, Ic¼ 12.768mA, Ib¼ 160mA
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Fig. 9 Measured () and model-calculated with Cce () and without Cce (r) magnitude and phase of the S parameters at Vce¼ 4 VIc¼ 20 mA of the 2 25mm2 transistor
By using straightforward mathematical manipulations onthese equations, they can be transformed into the followingpolynomial alternative equations in o, which are more
useful in extracting the elements of the small signal model:
