Wireless Brochure

7/30/2019 Wireless Brochure

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ENABLING WIRELESS COMMUNICATIONS AROUND THE WORLD

WIRELESS COMMUNICATIONS


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Picocel

WiMAX

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TD-LTE

Picocell

ENABLING WIRELESS COMMUNICATIONSAROUND THE WORLD

From femtocells to macrocells to microwave backhaulto SATCOM from LTE to TD-SCDMA to WCDMAto multi-carrier GSM from North America to Europeto Asia to space Xilinx is enabling wireless communicationsworldwide with the signal processing and interfacingcapabilities required to support todays high bandwidthsystems in the most cost and power-effective manner.


XILINX ENABLING WIRELESS INFRASTRUCTURE


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RemoteRadio Head

MobileReceiver

Public Safety

MobileRadio

Base TransceiverStation (BTS)

CommercialSATCOM

ResidentialFemtocell

MicrowaveBackhaul Cell Tower

W-CDMA

CDMA2000

TD-SCDMA

LTEAPCO25

WiFi

TETRA

BTS

XILINX IN WIRELESS COMMUNICATIONS

1

Reduce CapEx and OpEx

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Increase Revenue

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Lower Development Costs and Risk

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Improve TimetoMarket

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THE POWER OF XILINX PLATFORMS ENDLESS POSSIBILITIES FOR WIRELESS

Xilinx Targeted Design Platforms integrate the latestsilicon innovations with complete development environmentsspecifically tailored for wireless applications. Constructed ina manner that is both modular and layered, the platforms area comprehensive set of silicon devices, intellectual property(IP), application software, design tools, and development kitswith application-specific reference designs empowering

wireless equipment manufacturers to implement the rightprogrammable solution for their systems.


Targeted Design Platforms for Radio and Baseband Processing

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at low cost. Within seconds, it can be reconfigured to support any of todays major

commercial air interfaces, including LTE, WiMAX, W-CDMA, TD-SCDMA,

CDMA2000 and MC-GSM. In addition, crest factor reduction (CFR) and DPD

can enable PA efficiencies of 40% and more

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flexibility needed to get to market faster with product differentiation at lower

cost and power. While geared towards LTE applications, the baseband platform

can also be used for rapid SDR development of wideband waveforms basedon OFDM modulation

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Design Platform adds the higher layers of the protocol stack running on a

Wintegra WinPath network processor connected via Gigabit Ethernet. With the

reconfigurable nature of the platform, designs can be modified to enhance

results and support custom design of other air interfaces or waveforms for

commercial, civil or military applications


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Domain IP, Domain Tools, FMC Radio Daughter Cards

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Air Interface-specific IP, Wireless Targeted

Design Platforms, Development Tools

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Connectivity Connectivity

Channel Card

LTE TurboLTE DownlinkLTE Uplink

Digital Front End

DUC / DDCCFRDPD

WIRELESS TARGETED DESIGN PLATFORMS

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WIRELESS IN FRASTRUCTURETARGETED DESIG N PLATFORMS

COMPREHENSIVE LTE eNodeB REFERENCE DESIGN


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REDEFINING RADIO DESIGN

Radio designs are becoming increasingly complex dueto the need to support more than one air interfacefor multi-mode radios or multiple waveforms for civilor military radios. In order to compete in the market, ascalable platform is required that can cost effectivelyaccommodate various configurations of these airinterfaces. The Multi-mode Radio Targeted DesignPlatform is a fully scalable design platform addressing

LTE, TD-SCDMA, WiMAX, W-CDMA, CDMA2000,and MC-GSM applications.

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processors to run the DPD coefficient update engine 5HGXFHV&DS([DQG2S([FRVWVWKURXJKLQFUHDVHG3RZHU$PSOLHUHIFLHQF\

using advanced IP such as CFR and DPD LogiCORE IP cores

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reference designs for all air interfaces

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REDEFINING BASEBAND DESIGN

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architecture of Xilinx FPGAs

Baseband processing represents a key area for productGLIIHUHQWLDWLRQ+RZHYHUWKHDGYHQWRI*V\VWHPVposes a difficult challenge to equipment manufacturersas they struggle to evolve traditional DSP centric channelcards to meet a new set of technical and commercialimperatives. In particular, LTE is acting as a catalyst forchange, by driving increased datarates, reduced end-to-end latency, and the use of more processing intensive

advanced algorithms. In addition, fierce competitivepressure means dramatic and sustained reductionsin both CapEx and OpEx. With LTE-Advanced on theKRUL]RQWKHVHSUHVVXUHVZLOOFRQWLQXHWRJURZ7KH/7(Baseband Targeted Design Platform is designed to helpmanufacturers innovate to meet these challenges.

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MULTI-MODE RADIO AND LTE BASEBAND


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CONNECTIVITY AND NETWORK TRANSPORTFOR WIRELESS INFRASTRUCTURES

7KHPRYHPHQWIURPDWUDGLWLRQDOPRQROLWKLFFHQWUDOL]HGbasestation architecture to a distributed basestationarchitecture relying upon remote radio heads is fastbecoming a trend. This transition gives way to standard-based connectivity protocols in place of expensiveproprietary connectivity interfaces within the basestation,primarily between the baseband and radio card.

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Connectivity Standardization

for Baseband

SRIO The protocol is the predominantchip-to-chip connectivity standard used todayin channel cards for creating multi-processorfarms comprising of FPGA, processor, andDSP devices. Xilinx offers Serial RapidIOendpoint IP that is among the industrys mostwidely deployed soft IP and has alreadypassed RIOLAB level 1, 2, and 3 complianceand interoperability test criteria.

CPRI and OBSAI Xilinx offers CPRIIP cores designed to standard CPRIspecification v4.1 and OBSAI IP cores

designed to OBSAI specification v4.1 withIHDWXUHVVXFKDVIUDPHV\QFKURQL]DWLRQ

accurate round trip measurement andmessaging to implement channel cardconnectivity to remote radio heads.

PCI Express and Gigabit Ethernet Hard-coded Gigabit Ethernet and PCIExpress blocks greatly simplify systemintegration with the backplanes and generalcontrol processors. These blocks offer amuch cheaper option for sector-basedarchitectures where the chip-to-chip

bandwidth is much lower than traditionalfunctional architectures.

Connectivity Standardization

for Radio

CPRI and OBSAI Xilinx CPRI and OBSAIIP cores implement features necessary to

build connectivity termination at the radio

heads. In addition, Xilinx offers a multi-hop

remote radio head reference design to

demonstrate how Xilinx CPRI IP features

can be leveraged in a system design.

JESD204A Data converter devices are

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high speed serial interfaces to support

higher sample rates. Xilinxs FPGAs are

compliant WRWKH-(6'$%VWDQGDUGand the company offers reference designs

to create tailored receive and transmit

JESD204A interfaces to connect with the

high performance data converter devices.

Xilinx FPGA-based JESD204 reference

designs ease the transition from IO limited

parallel LVDS based data converters to

Serdes-based multi-module high

performance data converters to reduce

board complexity and cost.


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CPRI OBSAI

GigE PCI Express SRIO

JESD204A/B

Layers 2 and Above

Layer 1 (PHY) Radio

CONNECTIVITY AND NETWORK TRANSPORT

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COMPLETE CONNECTIVITY SOLUTIONS

Timing and Synchronization in Mobile Radio Access Networks

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In addition, Xilinx FPGAs provide all the necessary building blocks to implement

Synchronous Ethernet. The clock data recovery unit associated with the SerDes

recovers clock information from the received data, which could be used as a

local reference clock after clock jitter cleanup.


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WiFi


ADDRESSING THE GREATERCOMMUNICATIONS MARKET

Xilinx programmable platforms and production-proven IPaddress the broader range of markets and applications,including radio network controllers, MILCOM, publicsafety communications, microwave backhaul, SATCOMand others.

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Public Safety

Femtocell

MicrowaveBackhaul

CommercialSATCOM

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TETRA

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ADDRESSING THE GREATER COMMUNICATIONS MARKET


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IP

TURNKEYSOLUTION

REFERENCE

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Reference Designs

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WIRELESS ECOSYSTEM

Xilinx works closely with a world-class networkof third-party specialists that serves the wirelessinfrastructure market. Each company is backed byteams of experts in their field and together withXilinx brings targeted solutions for customers tothe marketplace. These offerings range from individualIP blocks to design platform integration and fullturnkey design solutions. Xilinx customers choose

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Sample IP Library:

FEATURES Radio IP Baseband IP Connectivity IP

Digital Up Conversion (DUC Compiler)

Digital Down Conversion (DDC Compiler)

Crest Factor Reduction (CFR)

Digital Pre-Distortion (DPD)

LTE MIMO Decoder

LTE Turbo Decoder

Common Public Radio Interface (CPRI)

Open Base Station Architecture Initiative (OBSAI)

Serial RapidIO (SRIO)

IEEE1588

Sample Available Reference Designs:

FEATURES Multi-mode Radio LTE Baseband Connectivity

WiMAX DFE

WiMAX DFE for Spartan DSP

W-CDMA DFE

CDMA2000 DFE

MC-GSM DFE

LTE Downlink Transmitter

LTE Uplink Receiver

CPRI Multi-hop RRH

JEDEC JESD204A

Designing Narrowband and Wideband DUC/DDC

using FIR, CIC and DDS

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WIRELESS ECOSYSTEM


14/16

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6\VWHP*HQHUDWRUIRU'63ZLWK6LPXOLQN modeling and simulation environment

for smooth flow from design capture to FPGA hardware implementation

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and Simulink

3ODQ$KHDG Design and Analysis Tool for floorplanning, hierarchy exploration,

quick timing analysis, and block-based implementation

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DSP building blocks are available for the Simulink modeling environment.

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RTL design flows, which range in complexity from basic building blocks such

as memories and FIFOs, to complex system-level building blocks for LTE.

CORE Generator streamlines the design process, improves design quality

and helps one finish faster.

DESIGN AND DEVELOPMENT TOOLS

Xilinx offers a variety of design and development tools,at both the system and device levels, that provideexcellent design and debug capabilities, allowing thefastest means of designing, verifying, and deployingprogrammable solutions in infrastructure equipment. Atthe system level, Xilinx offers bit accurate C models ofthe LTE Baseband Targeted Design Platform for systemlevel simulations. For a more sophisticated environment,

CoWares SPD simulation environment includes an LTEmodel library that leverages Xilinxs LTE models. For highlevel synthesis, Xilinx alliance members Synfora andAutoESL offer synthesis tools based on C.



15/16


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Corporate Headquarters

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Europe

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Japan

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Date post:	04-Apr-2018
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