WM8766 Evaluation Board User Handbook · PDF fileThere are three options for inputting digital...

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WM8766 Evaluation Board User Handbook

WOLFSON MICROELECTRONICS plc

www.wolfsonmicro.com

November 2003, Rev 1.2

Copyright 2003 Wolfson Microelectronics plc

INTRODUCTION

The WM8766 is a 24-bit, 192kHz 6-Channel DAC.

This evaluation platform and documentation should be used in conjunction with the latest version of the WM8766 datasheet. The datasheet gives device functionality information as well as timing and data format requirements.

This evaluation platform has been designed to allow the user ease of use and give optimum performance in device measurement as well as providing the user with the ability to listen to the excellent audio quality offered by the WM8766.

GETTING STARTED

PACKING LIST The WM8766 Evaluation Kit contains:

• 1 WM8766-EV1B Evaluation Board

• 2 WM8766-EV1S 3.5” floppy disks containing control software

• This manual -1 WM8766-EV1M

CUSTOMER REQUIREMENTS Minimum customer requirements are:

• D.C. Power supply of +12V and -12V

• D.C. Power supply of +2.7V to +5.5V

• PC and printer cable (for software control)

Minimum spec requirements are:

• Win95/98/NT/2000/XP

• 486 Processor

DAC Signal Path Requires:

• Digital coaxial or optical data source

• 1 set of active stereo speakers

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EVALUATION BOARD OPERATION

POWER SUPPLIES

Using appropriate power leads with 4mm connectors, supplies should be connected as described in Table 1.

REF-DES SOCKET NAME SUPPLY

J1 +5V +5V

J3 DVDD +2.7V to +3.6V

J4 AVDD +2.7V to +5.5V

J6 -12V -12V

J7 +12V +12V

J2 DGND 0V

J5 AGND 0V

Table 1 Power Supply Connections

The DGND and AGND connections may be connected to a common GND on the supply with no reduction in performance.

Note:

Refer to WM8766 datasheet for limitations on individual supply voltages.

Important: Exceeding the recommended maximum voltage can damage EVB components. Under voltage may cause improper operation of some or all of the EVB components.

BOARD FUNCTIONALITY

There are three options for inputting digital data into the WM8766 evaluation board. There is a coaxial input (J10) via a standard phono connector or an optical input (U1) via a standard optical receiver module. A direct digital input is also available via one side of a 2x8 pin header (H1).

The analogue outputs of the board are via phono connectors J21 (VOUT2R), J28 (VOUT2L), J14 (VOUT3R), J18 (VOUT3L), J9 (VOUT4R), J12 (VOUT4L).

All WM8766 device pins are accessible for easy measurement via the 1x14 pin headers (J16 and J25) running up each side of the device.

Level-shift IC (U7) is used to shift the fixed +5V digital input from the CS8427 (U3) down to the same level as DVDD and vice-versa.

BOARD INPUT

When used in Slave Mode digital clock signals must be applied to the WM8766. A digital (AES/EBU, UEC958, S/PDIF, EIAJ CP340/1201) signal input may be applied to the coaxial input (J10), or the optical input (U1), allowing the CS8427 (U3) to generate the necessary clocks. A direct digital input is also available via one side of a 2x8 pin header (H1) data must be input in one of the WM8766 supported formats - see datasheet.

Note:

When used in Master Mode, an SPDIF signal must still be applied to phono connector J10. This input signal is used to allow correct operation of the CS8427 as well as being used to generate the MCLK for the WM8766.

BOARD OUTPUT

The WM8766 eval board can also be used with the 8 channel WM8768. As a result, the board has decals for 4 stereo channels (VOUT1-4). Since the WM8766 provides 3 stereo channels, VOUT1L/R are left unpopulated on the board. Instead, VOUT1L/R of the chip are output on VOUT2L/R of the eval board. Similarly, VOUT2L/R and VOUT3L/R of the chip are output on VOUT3L/R and VOUT4L/R of the board respectively (see Table 5).

There are 6 analogue signal output phono connectors starting at VOUT2L/R: J21 (VOUT2R), J28 (VOUT2L), J14 (VOUT3R), J18 (VOUT3L), J9 (VOUT4R) and J12 (VOUT4L). Each of these outputs is passed through a post DAC active low-pass filter.

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INTERFACES

KEY

123

H1

J2

SW1

SW2

13579111315

246810121416

12

J3 J5 J6 J7J1 J4

LNK2

J15

1J19

J8

1

J11

1J13

1

J17

1

J20

1

J27

1

1357911

24681012

J16

J25

1234567891011121314

12

34

56

OPE

N

0 1

1

11

1

1

1

1

1

1

1

LNK1

LNK7LNK6LNK5LNK4

J22

J23

J24VOUT2L

VOUT2R

VOUT3L

VOUT4L

VOUT3R

VOUT4R

Figure 1 Interfaces

HEADERS H1 SIGNAL

1/2 DACDAT

3/4 GND

5/6 DACLRC

7/8 GND

9/10 DACBCLK

11/12 GND

13/14 DACMCLK_IN

15/16 GND

J16 WM8766 PIN NAME J19 WM8766 PIN NAME

1 1 MODE 1 15 TESTREF

2 2 MCLK 2 16 VREFN

3 3 BCLK 3 17 VREFP

4 4 LRCLK 4 18 VMID

5 5 DVDD 5 19 NC

6 6 DGND 6 20 NC

7 7 DIN1 7 21 VOUT1L

8 8 DIN2 8 22 VOUT1R

9 9 DIN3 9 23 VOUT2L

10 10 DNC 10 24 VOUT2R

11 11 ML/I2S 11 25 VOUT3L

12 12 MC/IWL 12 26 VOUT3R

13 13 MD/DM 13 27 AGND

14 14 MUTE 14 28 AVDD

Table 2 Headers

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LINKS LINKS AND JUMPERS DESCRIPTION

LNK1 (Master/Slave) Pins 1 and 2 SHORT – Master Mode

Pins 2 and 3 SHORT – Slave Mode

LNK2 (Mute) Pins 1 and 2 SHORT – MUTE On

Pins 2 and 3 SHORT – MUTE Off

LNK4 (MD/DM) Pins 1 and 2 SHORT – DEEMPH Activated

Pins 2 and 3 SHORT – DEEMPH De-activated

LNK7 (MODE) Pins 1 and 2 SHORT – Hardware Mode

Pins 2 and 3 SHORT – Software Mode

LNK6 (MC/IWL)

[Hardware Mode Only]

LNK5 (ML/I2S)

[Hardware Mode Only]

LNK6 LNK5 FORMAT 2-3 2-3 24-bit Right Justified 2-3 1-2 20-bit Right Justified 1-2 2-3 16-bit I2S 1-2 1-2 24-bit I2S

J15 (AVDD) OPEN - No Power to AVDD (used for current measurements)

SHORT - Power to AVDD

J19 (DVDD) OPEN - No Power to DVDD (used for current measurements)

SHORT - Power to DVDD

J22 Pins 1 and 2 SHORT – Connect DIN1 to DACDAT

Pins 2 and 3 SHORT – Connect DIN1 to GND





J8, J11, J13, J17, J20, J27 OPEN - VOUT signals are AC coupled before the LPF

SHORT - VOUT signals are not AC coupled before the LPF

Table 3 Links

SWITCHES SWITCH DESCRIPTION

SW2 After an input data format change has been made using SW2, the CS8427 will only latch the new settings after SW1 has been pressed and released.

SW1

(DATA FORMAT)

1 2 3 4 5 6 DATA FORMAT

1 0 0 1 0 0 I2S Compatible

1 0 0 0 0 1 24-bit Right Justified

1 0 0 0 0 0 Left Justified

Table 4 Switches

ANALOGUE OUTPUTS CHIP BOARD

VOUT1L/R VOUT2L/R

VOUT2L/R VOUT3L/R

VOUT3L/R VOUT4L/R

Table 5 Analogue Outputs

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WM8766 OPERATION

HARDWARE MODE

To operate the WM8766 in hardware mode, the jumper on link LNK7 (MODE) must short pins 1 and 2 together. The 3-pin links on the board (LNK1, 2, 4, 5, 6) then become the active source for changing the device functions. The diagram shown in Figure 2 used with the settings specified in Table 6 will assist in setting the WM8766-EV1B into a known state. This is to ease the initial use of the WM8766 until the user becomes familiar with device operation.

H1

J2

SW1

SW2

J3 J5 J6 J7J1 J4

LNK2

J15

1

J19

J8

1

J11

1

J13

1

J17

1

J20

1

J27

1

J16

J25

12

34

56

OP

EN

0 1

1

1

1

1

1

1

1

1

1

1

LNK1

LNK7LNK6LNK5LNK4

J22

J23

J24VOUT2L

VOUT2R

VOUT3L

VOUT4L

VOUT3R

VOUT4R

+5V DGND

+2.7Vto

+3.6V -12V +12VAGND

+2.7Vto

+5.5V

Figure 2 Recommended DAC Setup

LINKS AND JUMPERS

DESCRIPTION

H1 All jumpers in place

LNK1 (Master/Slave) Pins 2 and 3 SHORT - Slave Mode

LNK2 (MUTE) Pins 2 and 3 SHORT – MUTE off

LNK4 (MD/DM) Pins 2 and 3 SHORT – No De-emphasis

LNK7 (MODE) Pins 1 and 2 SHORT – Hardware Mode

LNK6 (MC/IWL)

LNK5 (ML/I2S)

LNK6 LNK5 FORMAT 1-2 1-2 24-bit I2S

J15 (AVDD) SHORT - Power to AVDD

J19 (DVDD) SHORT - Power to DVDD




J8, J11, J13, J17, J20, J27

OPEN - VOUT signals are AC coupled before the LPF

Table 6 DAC Hardware Jumper Setup (Slave Mode)

Please refer to Table 3 of this document and the WM8766 datasheet for further details on device configuration in hardware mode.

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SOFTWARE CONTROL

To operate the WM8766 in SPI (3-wire) software mode, the jumper on link LNK7 (MODE) must short pins 2 and 3 together. The SPI interface then becomes active on device pins 11(ML/I2S), 12(MC/IWL) and 13(MD/DM). The serial interface on the board can be connected to a PC via the printer port or any other standard parallel port. The port used can be selected through the software provided. The software supplied with this kit gives the user access to all the possible features provided by the WM8766.

Please refer to the WM8766 datasheet for full details of the serial interface timing.

ML/I2S

MC/IWL

MD/DM B15 B6B7B8B9B10B11B12B13B14 B1 B2 B3 B4B5 B0

Figure 3 SPI Serial Interface

REGISTER B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT

R0(00h) 0 0 0 0 0 0 0 UPDATE LDA1[7:0] 011111111

R1(01h) 0 0 0 0 0 0 1 UPDATE RDA1[7:0] 011111111

R2(02h) 0 0 0 0 0 1 0 PL[8:5] IZD ATC PDWN

All DAC

DEEMP

ALL DAC

MUTE

All DAC

100100000

R3(03h) 0 0 0 0 0 1 1 PHASE[8:6] DACIWL[5:4] DACBCP DACLRP DACFMT[1:0] 000000000

R4(04h) 0 0 0 0 1 0 0 UPDATE LDA2[7:0] 011111111

R5(05h) 0 0 0 0 1 0 1 UPDATE RDA2[7:0] 011111111

R6(06h) 0 0 0 0 1 1 0 UPDATE LDA3[7:0] 011111111

R7(07h) 0 0 0 0 1 1 1 UPDATE RDA3[7:0] 011111111

R8(08h) 0 0 0 1 0 0 0 UPDATE MASTDA[7:0] 011111111

R9(09h) 0 0 0 1 0 0 1 DEEMP[8:6] DMUTE[5:3] DZFM[2:1] ZCD 000000000

R10(0Ah) 0 0 0 1 0 1 0 DACRATE[8:6] DACMS PWRDNALL

DACD[3:1] 0 010000000

R12(0Ch) 0 0 0 1 1 0 0 0 0 MPD 0 0 0 0 0 0 000000000

R15(0Fh) 0 0 0 1 1 1 1 0 0 0 MPD 0 0 0 0 0 00000000

R31(1Fh) 0 0 1 1 1 1 1 RESET 000000000

Table 7 Mapping of Program Registers

Please refer to the WM8766 datasheet for full details of the register features.

Important: It must be noted that the CS8427 SPDIF decoder IC will only work at a rate of 256fs. This will limit the sample rates that may be set using the WM8766 unless an external source is used supplying signals directly to the relevant pins of header H1.

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SERIAL INTERFACE SOFTWARE DESCRIPTION

SOFTWARE INSTALLATION

There are 2 floppy disks supplied with this evaluation kit. To install the software:

1. Insert disk 1

2. Select the ‘Start’ button on the Windows task bar and the ‘Run…’ option.

3. Type “A:\setup” and then press OK.

4. Follow the on-screen instructions

SOFTWARE OPERATION

The WM8766 software can be configured for use with the WM8796, WM8798 and WM8768. Select the WM8766 in the drop down menu labelled ‘Select device’.

Due to the many features offered by the WM8766 the software has been split into 3 different panels. This eases the complexity of the software making each panel less busy, the panels have also been grouped so that it makes it simple to control each section of the device.

The main menu panel shown in Figure 4 is used to call up the other panels as well as offering a number of pull-down menus.

Figure 4 Software Menu Panel

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The ‘Submit’ button will submit values to every register of the WM8766. The ‘Device Reset’ button writes to the reset register R31 but does not reset the control panel values. If the previous values are to be resubmitted then the ‘Submit’ button should be pressed, if the user would like to start afresh then the ‘Reset Software Panel Settings’ button should also be pressed. Pressing this button does not write to the device, it only resets the panel settings to their default state. Left clicking on the Wolfson logo will open the PCs default web browser and go top the Wolfson Microelectronics website (‘www.wolfsonmicro.com’).

Pressing the ‘Submit Master Control’ button will only submit changes made to the Master Power Down switch.

WRITING TO REGISTERS

Two methods are provided to write to the WM8766 registers:

1. By pressing buttons ‘DAC SETUP CONTROL’ and ‘DAC VOLUME CONTROL’ on the software menu panel (Figure 4), further panels control will open (see Figure 6 and Figure 7). These panels display sliders and buttons that provide a visual interface to the registers of the WM8766. For example when the volume sliders for DAC1 on the DAC VOLUME CONTROL panel are used, they update the settings in registers R0 and R1 accordingly.

2. On the software control panel itself, there is a map of all registers and their current settings. Registers can be directly set from this panel.

Any changes made in the ‘DAC SETUP CONTROL’ and ‘DAC VOLUME CONTROL’ panels will be reflected in the register map on the software control panel and vice versa.

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TEST SETUP FOR STANDARD DAC OPERATION

For the standard ‘DAC Setup’ the device is setup to receive data via the SPDIF_In to the DAC, after conversion the DAC outputs to VOUT1/2/3. Table 8 lists the required board settings to allow this signal path to become active in 24-bit, I2S input data format. This is to ease the initial use of the WM8766 until the user becomes familiar with both device and software operation.

H1

J2

SW1

SW2

J3 J5 J6 J7J1 J4

LNK2

J15

1

J19

J8

1

J11

1

J13

1

J17

1

J20

1

J27

1

J16

J25

12

34

56

OP

EN

0 1

1

1

1

1

1

1

1

1

1

1

LNK1

LNK7LNK6LNK5LNK4

J22

J23

J24VOUT2L

VOUT2R

VOUT3L

VOUT4L

VOUT3R

VOUT4R

+5V DGND

+2.7Vto

+3.6V -12V +12VAGND

+2.7Vto

+5.5V

Figure 5 Recommended DAC Setup

LINKS AND JUMPERS

DESCRIPTION

H1 All jumpers in place

LNK1 (Master/Slave) Pins 2 and 3 SHORT - Slave Mode

LNK2 (MUTE) Pins 2 and 3 SHORT – MUTE off

LNK4 (MD/DM) No Effect

LNK7 (MODE) Pins 2 and 3 SHORT – Software Mode

LNK6 (MC/IWL) No Effect

LNK5 (ML/I2S) No Effect

J15 (AVDD) SHORT - Power to AVDD

J19 (DVDD) SHORT - Power to DVDD




J8, J11, J13, J17, J20, J27

OPEN - VOUT signals are AC coupled before the LPF

Table 8 DAC Software Jumper Setup (Slave Mode)

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DAC CONTROL

Figure 6 DAC Control

The DAC Control panel is used to control the many DAC related features of the WM8766. Pressing the ‘DAC Submit’ button will cause the settings shown on this panel to be written to the WM8766. A full device register write is not sent.

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DAC ATTENUATION CONTROL

Figure 7 DAC Attenuation Control

The DAC Attenuation Control panel is used to control both the digital DAC volume of the WM8766. The volume sliders update in ‘real’ time (i.e. the ‘DAC Attenuation Submit’ button does not have to be pressed to update the output volume level) but will only have an effect on the output if the UPDATEL/R bits are set. Once changes are made to the UPDATEL/R bits, the ‘DAC Attenuation Submit’ button must be left clicked for the change to take effect. Pressing the ‘DAC Attenuation Submit’ button will cause the settings shown on this panel to be written to the WM8766. A full device register write is not sent.

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WM8766-EV1B SCHEMATIC

Figure 8 Functional Diagram

Figure 9 SPDIF Input / Output Interface

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Figure 10 Software Control

Figure 11 Level Shift

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Figure 12 WM8766

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Figure 13 Analogue Output

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Figure 14 Power

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WM8766-EV1B PCB LAYOUT

Figure 15 Top Layer Silkscreen

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Figure 16 Top Layer

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Figure 17 Bottom Layer

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Figure 18 Bottom Layer Silkscreen

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WM8766-EV1B BILL OF MATERIAL

DESCRIPTION REFERENCE

Phono Socket PCB mount RED J9, J14, J21

Phono Socket PCB mount YELLOW J10

Phono Socket PCB mount WHITE J12, J18, J28

74ALVC164245 16 Bit Dual Supply Bus Transceiver SSO U7

DIL Switch 6-Way Rocker SW1

36-way Centronics/IEE488 PCB mountable Connector J29

B3F1000 SPNO PCB mount switch SW2

47k 1206 SMD chip 4 resistor array 5% 0.063W R4. R10, R12

1.32mm PCB Test Terminal BLACK TP1-7, TP11

1.32mm PCB Test Terminal RED TP8-10

0.01uF 0805 SMD Ceramic Capacitor 50V X7R C20

0.1uF 0805 SMD Ceramic Capacitor 50V X7R C1, C3, C6, C8, C10, C13, C14, C21, C28, C35, C37, C39, C48, C49, C51, C52, C56, C57, C60, C61, C62, C63, C68, C69, C74, C75, C76, C77


74HC157 Quad 2-Input Mux SO U9

4mm Non-Insulated Panel Socket 16A J1-7

1x2 PCB Pin Header 0.1" VERTICAL J8, J11, J13, J15, J17, J19, J20, J27

1x3 PCB Pin Header 0.1" VERTICAL J22, J23, J24

2x8 2.54mm pitch PCB Pin Header VERTICAL H1

3.3uH 1210 Surface Mount Inductor '1210A series' L7

MC33078 Low Noise Dual Op-Amp SO U2, U4, U8


100uF 8 Dia 3.5 pitch Oscon Through Hole Cap. 10V 20% C58

10uF 6.3 Dia 2.5 pitch Oscon Through Hole Cap. 16V 20% C23, C31, C38, C53, C64

DS1813 5V active Low Power-On-Reset chip SOT U5

220pF 0805 SMD Ceramic Capacitor 50V NPO C15, C26, C30, C42, C50, C67

680pF 0805 SMD Ceramic Capacitor 50V NPO C17, C24, C32, C40, C54, C65

1nF 0805 SMD Ceramic Capacitor 50V NPO C18

1nF 0805 SMD Ceramic Capacitor 50V NPO C25, C33, C41, C55, C66

TN0200T N- Channel MOSFET SOT23 Q9, Q11, Q12

0R 0603 SMD chip resistor 1% 0.063W R38, R39, R45, R48

0R 0805 SMD chip resistor 1% 0.1W R47, R49, R59, R66, R71, R79

0R 1206 Resistor on 1210 Inductor site L1-5

390R 0805 SMD chip resistor 1% 0.1W R21


1K2 0805 SMD chip resistor 1% 0.1W R57, R60, R69

1K8 0805 SMD chip resistor 1% 0.1W R6, R17, R23, R31, R41, R53

4K7 0805 SMD chip resistor 1% 0.1W R8, R11, R14, R19, R25, R27, R28, R33, R43, R46, R50, R55, R58, R67, R70

10K 0805 SMD chip resistor 1% 0.1W R5, R16, R22, R30, R40, R52, R56

100K 0805 SMD chip resistor 1% 0.1W R20

49R9 0805 SMD chip resistor 1% 0.125W R9, R15, R26, R29, R44, R51

7K5 0805 SMD chip resistor 1% 0.125W R7, R18, R24, R32, R42, R54

47uH 1210 Surface Mount Inductor 'PA series' L6

10uF 6.3 Dia 2.5 pitch Oscon Through Hole Cap. 25V 20% C2, C4, C5, C7, C9, C36, C47, C59


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DESCRIPTION REFERENCE

10uF 10V SMD Tantalum Capacitor case A C27

HSMY-C670 0805 SMD Chip LED YELLOW D1

TORX176 Digital Audio Optical Receiver U1

1x14 2.54mm pitch PCB Pin Header VERTICAL J16, J25

JSK9-16-G0 PCB 1x3 Jumper Switch 0.1" Center-off VERTICAL LNK1, 2, 4, 4, 5, 6, 7

CS8427 96KHz Audio Transceiver U3

WM8766 24-bit; 192kHz 8 channel DAC in 28-pin SO package U6

Table 9 Bill of Materials

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APPENDIX

EXTERNAL DSP CONNECTION TO THE WM8766-EV1B

The WM8766-EV1B evaluation board has been designed to allow it to be easily connected to an external DSP platform with error free operation.

The following information is provided to ease the connection process and ensure that all signals sent and received by the WM8766-EV1B are reliable and at the correct voltage levels.

AUDIO INTERFACE CONNECTIONS

It is recommended that twisted pair (signal twisted with GND) or shielded wires are used to make the audio interface connections between the DSP and WM8766-EV1B platforms. This is to ensure that no interference or noise is picked up by the clocks or data lines, thus reducing performance and reliability.

When the WM8766 is set in Slave Mode, the jumpers on header H1 should be removed, disconnecting the digital input section of the evaluation board. The audio interface timing and data signals from the DSP platform should then be connected as shown in Figure 19. The signals should be connected to H1 and not on the header strips J16 and J25 running up each side of the device. Connecting the signals on the output side of the level-shift IC (U7) will cause drive contention between U7 and the DSP and could result in damage to either or both devices. In most cases, the DSP supplies will be set around 3V for low power portable applications. The inputs to the level-shift IC (74ALVC164245) have a TTL threshold (i.e. Logic High = +2V(min); Logic Low = +0.8V(max)) and low input current requirements (i.e. 15uA max) allowing most DSP's to connect directly.

DACDATGND

GND

GND

GND

DACLRC

DACBCLK

DACMCLK_IN

H1

Figure 19 Connections from DSP Platform

The digital inputs to the WM8766 have a CMOS threshold (i.e. Logic High (min) = DBVDDx0.7; Logic Low (max) = DBVDDx0.3). These are met directly by the level shift IC outputs.

When the WM8766 is set to Master mode, the jumpers on header H1 should be removed, disconnecting the digital input section of the evaluation board. If an external MCLK signal is being used (i.e. supplied by the DSP) then the DSP platform should be connected as shown in Figure 20. The signals should be connected to H1 and not on the header strip J16 running up the side of the device. Connecting the signals on the output side of the level-shift IC (U7) will cause drive contention between U7 and the DSP and could result in damage to either or both devices. In most cases, the DSP supplies will be set around +3V for low power portable applications. The inputs to the level-shift IC (74ALVC164245) have a TTL threshold (i.e. Logic High = +2V(min); Logic Low = +0.8V(max)) and low input current requirements (i.e. 15uA max) allowing most DSPs to connect directly.

The BCLK and LRCLK signals that will be provided by the WM8766 in Master mode should be connected directly from the relevant pins on header strip J16. These are CMOS threshold voltages and should be compatible with most DSP platforms.

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DACDATGND

GNDDACMCLK_IN

H1

Figure 20 Timing Connections from DSP Platform

The digital inputs to the WM8766 have a CMOS threshold (i.e. Logic High (min) = DBVDDx0.7; Logic Low (max) = DBVDDx0.3). These are met directly by the level shift IC outputs.

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EVALUATION SUPPORT

The aim of this evaluation kit is to help you to become familiar with the functionality and performance of the WM8766, 6-channel CODEC.

If you require more information or require technical support please contact Wolfson Microelectronics Applications group through the following channels:

Email: [email protected]

Telephone Apps: (+44) 131 272 7070

Fax: (+44) 131 272 7001

Mail: Applications Department at address on last page.

or contact your local Wolfson representative.

Additional information may be made available from time to time on our web site at http://www.wolfsonmicro.com

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IMPORTANT NOTICE

Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current. All products are sold subject to the WM terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.

WM warrants performance of its products to the specifications applicable at the time of sale in accordance with WM’s standard warranty. Testing and other quality control techniques are utilised to the extent WM deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

In order to minimise risks associated with customer applications, adequate design and operating safeguards must be used by the customer to minimise inherent or procedural hazards. Wolfson products are not authorised for use as critical components in life support devices or systems without the express written approval of an officer of the company. Life support devices or systems are devices or systems that are intended for surgical implant into the body, or support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided, can be reasonably expected to result in a significant injury to the user. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

WM assumes no liability for applications assistance or customer product design. WM does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of WM covering or relating to any combination, machine, or process in which such products or services might be or are used. WM’s publication of information regarding any third party’s products or services does not constitute WM’s approval, license, warranty or endorsement thereof.

Reproduction of information from the WM web site or datasheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this information with alteration voids all warranties provided for an associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use.

Resale of WM’s products or services with statements different from or beyond the parameters stated by WM for that product or service voids all express and any implied warranties for the associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use.

ADDRESS:

Wolfson Microelectronics plc

20 Bernard Terrace

Edinburgh

EH8 9NX

United Kingdom

Tel :: +44 (0)131 272 7000

Fax :: +44 (0)131 272 7001

Email :: [email protected]

Date post:	10-Mar-2018
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