CSCI 6307 Foundation of Systems CSCI 6307 Foundation of Systems Review: Midterm ExamReview: Midterm Exam
Xiang LianThe University of Texas – Pan American
Edinburg, TX [email protected]
Review
• Chapters A1 ~ A4 in your textbook
• Lecture slides
• In-class exercises (1) & (2)
• Assignments 1 & 2
2
Review
• 5 Questions (100 points)
• 1 Bonus Question (20 extra points)
3
Chapter 1 Computer Abstractions and Technology
• Classes of computers
• Evolution of programming languages
• Performance evaluation of computers– What are the criteria of the evaluation?– How to compare the performance of two
computers?
4
Chapter 1 — Computer Abstractions and Technology — 5
CPU Clocking• Operation of digital hardware governed by a
constant-rate clock
Clock (cycles)
Data transferand computation
Update state
Clock period
Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 250×10–12s
Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = 4.0×109Hz
Chapter 1 — Computer Abstractions and Technology — 6
CPU Time
• Performance improved by– Reducing number of clock cycles– Increasing clock rate– Hardware designer must often trade off clock
rate against cycle count
Rate Clock
Cycles Clock CPU
Cycles Clock CPUTime CPU
PeriodClock
Chapter 1 — Computer Abstractions and Technology — 7
Instruction Count and CPI
• Instruction Count for a program– Determined by program, ISA and compiler
• Average cycles per instruction– Determined by CPU hardware– If different instructions have different CPI
• Average CPI affected by instruction mix
Rate Clock
CPICount nInstructio
Period ClockCPICount nInstructioTime CPU
nInstructio per CyclesCount nInstructioCycles Clock
Chapter 2 Instructions• Binary representation
– 2's complement– Positive/negative integers binary numbers– Addition, negation, sign extension
• Instructions– Arithmetic: add, sub, addi– Data transfer: lw, sw, lb– Logical: and, or, andi, sll, srl– Conditional branch: beq, bne, slt, sltu, slti– Jump: jr, j, jal
• Please understand the meanings of these instructions, and use them to write simple assembly programs.
• Given a set of instructions, write down the output of the code
8
Negative Numbers: 2’s Complement
(xnxn-1…x0)2=-xn×2n+xn-1×2n-1+…+x0×20
Ex:
(00)2= =-0×21+0×20=0
(01)2= =-0×21+1×20=1
(10)2= =-1×21+0×20=-2
(11)2= =-1×21+1×20=-1
9
Good: 1.only one zero2.Easy to add negative and positive numbers3.Two useful operations: negation and sign-extending
Exercise: (11)2 +(01)2=?
(11)2 +(10)2=?
Note: Xn not only represents sign, but has weights (different to the previous sign-magnititude representation).
Chapter 2 — Instruction — 9
2’s Complement: Negation
(011)2=3 binary number of -3?
(100)2 : complement of (011)2
+(001)2 : plus one
=(101)2 : -3
10
Exercise: find the negation of (110)2 and (100)2
Chapter 2 — Instruction — 10
2’s Complement: Sign Extension
Extend (001)2 to 6 bits ??????
(???001) 2 : copy the old bits to the right
(000001) 2 : MSBthe remaining bits
Exercise: extending (101)2 to 6 bits and verify that they are the same integer.
11Chapter 2 — Instruction — 11
Instruction Operations-Arithmetic
• Add $s1,$s2,$s3: $s1=$s2+$s3• Sub $s1,$s2,$s3: $s1=$s2-$s3• Addi $s1,$s2, 20: $s1=$s2+20
Exericse:• For $s1=1,$s2=2,$s3=3, write the results
after executing each instructions.• Write an instruction so that $s1=$s1-1.
12Chapter 2 — Instruction — 12
Instruction Operations-Data Transfer
• Lw $s1, 30($s2): $s1mem[$s2+30] (load/read word from memory)
• Sw $s1, 20($s2): $s1mem[$s2+20] (store/write a word to memory)
• Lb $s1, 30($s2): $s1mem[$s2+30] (load/read a byte from memory)
Exercise: read a word/byte at $s2+20 in memory to $s2.
13Chapter 2 — Instruction — 13
Instruction Operation-Logical
• And– And $s1,$s2,$s3
• Or– Or $s1,$s2,$s3
• And immediate– Andi $s1,$s2,20
• Shift left logic– Sll $s1, $s2,10
• Etc.
14Chapter 2 — Instruction — 14
Instruction Operation-Conditional Branch
• Branch if equal– Beq $s1, $s2, 25
• Branch if not equal– Bne $s1, $s2, 25
• Set on less than– Slt $s1,$s2,$s3
• Set on less than unsigned– Sltu $s1,$s2,$s3
• Set on less than immediate– $slti $s1,$s2,20
15Chapter 2 — Instruction — 15
Instruction Operation-Unconditional Jump
• Jump register– Jr $ra
• Jump– J 2500
• Jump-and-link instruction– Jal 2500
16Chapter 2 — Instruction — 16
Chapter 3 Arithmetic
• Overflow of addition operator– How to detect it?
• Multiplication– Two approaches
• Floating point representation– Scientific notation– Conversion from decimal number to binary number– Conversion from binary number to floating point
number– Conversion from floating point number to IEEE
format
17
Addition Overflow
• Occurs when the result is out the range for a given number of bits.
Ex:
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1011 (-5)+ 1100 (-4) 10111 (7×)
0111 (7)+ 0100 (4) 11011 (-5×)
1111 (-1)+ 1100 (-4) 11011 (-5)
0011 (3)+ 0100 (4) 10111 (7)
Chapter 3 — Arithmetic for Computers — 18
Checking of Addition Overflow When Two Operands Differ in Sign• Does not occurs
Ex:
19
1011 (-5)+ 0100 (4) 11111 (-1)
1111 (-1)+ 0100 (4) 10011 (3)
Chapter 3 — Arithmetic for Computers — 19
Overflow Conditions
20
Operation Oprand A Operand B Result indicating overlfow
A+B >=0 >=0 <0
A+B <0 <0 >=0
A-B >=0 <0 <0
A-B <0 >=0 >=0
Chapter 3 — Arithmetic for Computers — 20
Chapter 3 — Arithmetic for Computers — 21
Multiplication• Start with long-multiplication approach
1000× 1001 1000 0000 0000 1000 1001000
Length of product is the sum of operand lengths
multiplicand
multiplier
product
§3.3 Multiplication
Chapter 3 — Arithmetic for Computers — 22
IEEE Floating-Point Format
• S: sign bit (0 non-negative, 1 negative)• Normalize significand: 1.0 ≤ |significand| < 2.0
– Always has a leading pre-binary-point 1 bit, so no need to represent it explicitly (hidden bit)
– Significand is Fraction with the “1.” restored• Exponent: excess representation: actual exponent + Bias
– Ensures exponent is unsigned– Single: Bias = 127; Double: Bias = 1203
S Exponent Fraction
single: 8 bitsdouble: 11 bits
single: 23 bitsdouble: 52 bits
Bias)(ExponentS 2Fraction)(11)(x
Converting Floating Point Numbers
23
5.1875
101. .0011
0.1875×2 =0.375 0
0.375×2 =0.75 0
0.75×2 =1.5 1
0.5×2 =1 1101.0011
1.010011×22 0 10000001 0100110…0(23 bits)
Ex. Convert 5.1875 to its binary representation (single precision).
Chapter 3 — Arithmetic for Computers — 23
Chapter 4 Processor
• CPU overview• Logical design
– Combinational element– State element– Their differences
• Datapath of instruction execution– 5 stages– Calculation of the clock cycle
• Pipeline– Speedup computation– 3 hazards of the pipeline
24
Chapter 4 — The Processor — 25
Logic Design Basics
§4.2 Logic Design C
onventions
• Information encoded in binary– Low voltage = 0, High voltage = 1– One wire per bit– Multi-bit data encoded on multi-wire buses
• Combinational element– Operate on data– Output is a function of input
• State (sequential) elements– Store information
Chapter 4 — The Processor — 26
MIPS Pipeline
• Five stages, one step per stage1. IF: Instruction fetch from memory
2. ID: Instruction decode & register read
3. EX: Execute operation or calculate address
4. MEM: Access memory operand
5. WB: Write result back to register
Determining Clock Cycle (And)
Chapter 4 — The Processor — 27
I-Mem: 400psAdd: 100psMux: 30psALU: 120psRegs: 200psD-Mem: 350psControl: 100ps
300
200
700
600
700
800
800
830950
950
950
980
980
11801180
Chapter 4 — The Processor — 28
Pipelining Analogy• Pipelined laundry: overlapping execution
– Parallelism improves performance
§4.5 An O
verview of P
ipelining Four loads: Speedup
= 8/3.5 = 2.3 Non-stop:
Speedup= 2n/0.5n + 1.5 ≈ 4= number of stages
Chapter 4 — The Processor — 29
Pipeline Speedup
• If all stages are balanced– i.e., all take the same time
– Time between instructionspipelined
= Time between instructionsnonpipelined
Number of stages
• If not balanced, speedup is less
• Speedup due to increased throughput– Latency (time for each instruction) does not
decrease
Chapter 4 — The Processor — 30
Hazards
• Situations that prevent starting the next instruction in the next cycle
• Structure hazards– A required resource is busy
• Data hazard– Need to wait for previous instruction to
complete its data read/write
• Control hazard– Deciding on control action depends on previous
instruction
Good Luck!Good Luck!
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